ADSP-21262 EZ-KIT Lite® Evaluation System Manual Revision 1.2, March 2004 Part Number 82-000800-01 Analog Devices, Inc. One Technology Way Norwood, Mass. 02062-9106 a Copyright Information © 2004 Analog Devices, Inc., ALL RIGHTS RESERVED. This document may not be reproduced in any form without prior, express written consent from Analog Devices, Inc. Printed in the USA. Limited Warranty The EZ-KIT Lite evaluation system is warranted against defects in materials and workmanship for a period of one year from the date of purchase from Analog Devices or from an authorized dealer. Disclaimer Analog Devices, Inc. reserves the right to change this product without prior notice. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under the patent rights of Analog Devices, Inc. Trademark and Service Mark Notice The Analog Devices logo, VisualDSP++, the VisualDSP++ logo, SHARC, SHARC logo, CROSSCORE, the CROSSCORE logo, and EZ-KIT Lite are registered trademarks of Analog Devices, Inc. All other brand and product names are trademarks or service marks of their respective owners. Regulatory Compliance The ADSP-21262 EZ-KIT Lite evaluation system has been certified to comply with the essential requirements of the European EMC directive 89/336/EEC (inclusive 93/68/EEC) and, therefore, carries the “CE” mark. The ADSP-21262 EZ-KIT Lite evaluation system had been appended to the Technical Construction File referenced “DSPTOOLS1” dated December 21, 1997 and was awarded CE Certification by an appointed European Competent Body as listed below. Technical Certificate No: Z600ANA1.013 Issued by: Technology International (Europe) Limited 41 Shrivenham Hundred Business Park Shrivenham, Swindon, SN6 8TZ, UK The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. CONTENTS iv ADSP-21262 EZ-KIT Lite Evaluation System Manual CONTENTS PREFACE Purpose of This Manual ................................................................. xiv Intended Audience ......................................................................... xiv Manual Contents ............................................................................ xv What’s New in This Manual ............................................................ xv Technical or Customer Support ...................................................... xvi Supported Processors ...................................................................... xvi Product Information ...................................................................... xvi MyAnalog.com ........................................................................ xvii DSP Product Information ........................................................ xvii Related Documents ................................................................ xviii Online Documentation ............................................................ xix Printed Manuals ....................................................................... xix VisualDSP++ Documentation Set ......................................... xix Hardware Manuals ................................................................ xx Data Sheets ........................................................................... xx Contacting DSP Publications ..................................................... xx Notation Conventions .................................................................... xxi ADSP-21262 EZ-KIT Lite Evaluation System Manual v CONTENTS GETTING STARTED Contents of EZ-KIT Lite Package ................................................. 1-1 PC Configuration ......................................................................... 1-3 Installation Tasks .......................................................................... 1-3 Installing VisualDSP++ and EZ-KIT Lite Software .................. 1-4 Installing and Registering VisualDSP++ License ....................... 1-4 Setting Up EZ-KIT Lite Hardware .......................................... 1-5 Installing EZ-KIT Lite USB Driver ......................................... 1-7 Windows 98 USB Driver .................................................... 1-8 Windows 2000 USB Driver .............................................. 1-12 Windows XP USB Driver ................................................. 1-13 Verifying Driver Installation .................................................. 1-15 Starting VisualDSP++ ........................................................... 1-16 USING EZ-KIT LITE EZ-KIT Lite License Restrictions .................................................. 2-2 Using External Memory ................................................................ 2-2 Using Analog Audio ...................................................................... 2-3 Using Digital Audio ...................................................................... 2-5 Using LEDs and Push Buttons ...................................................... 2-6 Example Programs ........................................................................ 2-7 Background Telemetry Channel .................................................... 2-8 Using EZ-KIT Lite VisualDSP++ Interface .................................... 2-8 Boot Load ............................................................................... 2-8 vi ADSP-21262 EZ-KIT Lite Evaluation System Manual CONTENTS Target Options ........................................................................ 2-9 While Target is Halted and On Emulator Exit Options ........ 2-9 Other Options .................................................................. 2-10 Core Hang Conditions .......................................................... 2-11 Hardware Breakpoints ........................................................... 2-12 Common Hardware Breakpoint Attributes ......................... 2-13 Global Hardware Breakpoint Options ................................ 2-14 Data Hardware Breakpoints ............................................... 2-14 Instruction Hardware Breakpoints ..................................... 2-15 Other Breakpoints ............................................................. 2-17 Tips and Tricks Using Hardware Breakpoints ..................... 2-18 Latency ......................................................................... 2-18 Restrictions ................................................................... 2-18 Setting a Breakpoint on a Single Address ........................ 2-18 EZ-KIT LITE HARDWARE REFERENCE System Architecture ...................................................................... 3-2 Parallel Port ............................................................................. 3-3 DAI Interface .......................................................................... 3-4 SPI Interface ........................................................................... 3-6 FLAG Pins .............................................................................. 3-6 Expansion Interface ................................................................. 3-7 JTAG Emulation Port .............................................................. 3-7 DIP Switch Settings ...................................................................... 3-8 Electret Microphone Select Switch (SW6) ................................ 3-9 ADSP-21262 EZ-KIT Lite Evaluation System Manual vii CONTENTS Codec Setup Switch (SW7) ..................................................... 3-9 SPDIF Signal Enable Switch (SW8) ....................................... 3-10 Push Button Enable Switch (SW9) ........................................ 3-10 Boot Mode and Clock Ratio Select Switch (SW10) ................ 3-11 Loop-Back Test Switch (SW11) ............................................. 3-12 LEDs and Push Buttons .............................................................. 3-12 General Purpose LEDs (LED8–1) .......................................... 3-13 Reset LEDs (LED9, LED12) ................................................. 3-14 Power LED (LED10) ............................................................ 3-14 SPDIF GPO1 LED (LED11) ................................................ 3-14 USB Monitor LED (LED13) ................................................. 3-14 Push Buttons (SW4–1) .......................................................... 3-14 Board Reset Push Button (SW5) ............................................ 3-15 Connectors ................................................................................. 3-15 Expansion Interface (J1, J2, J3) ............................................. 3-15 Audio In RCA Connector (J4) ............................................... 3-17 Audio Out RCA Connector (J5) ............................................ 3-17 Headphone Out Jack (J6) ...................................................... 3-17 Power Jack (J7) ..................................................................... 3-17 SPDIF In Coax Connector (P1) ............................................ 3-18 SPI Header (P2) .................................................................... 3-18 DAI Header (P3) .................................................................. 3-18 USB Connector (P4) ............................................................. 3-19 JTAG Header (P5) ................................................................ 3-19 viii ADSP-21262 EZ-KIT Lite Evaluation System Manual CONTENTS BILL OF MATERIALS INDEX ix ADSP-21262 EZ-KIT Lite Evaluation System Manual CONTENTS x ADSP-21262 EZ-KIT Lite Evaluation System Manual PREFACE Thank you for purchasing the ADSP-21262 EZ-KIT Lite®, Analog Devices (ADI) evaluation system for SHARC® processors. The SHARC processors are based on a 32-bit super Harvard architecture that includes a unique memory architecture comprised of two large on-chip, dual-ported SRAM blocks coupled with a sophisticated IO processor, which gives SHARC the bandwidth for sustained high-speed computations. SHARC represents today’s de facto standard for floating-point DSP targeted for premium audio applications. The evaluation system is designed to be used in conjunction with the VisualDSP++® development environment to test the capabilities of the ADSP-21262 SHARC processors. The VisualDSP++ development environment gives you the ability to perform advanced application code development and debug, such as: • Create, compile, assemble, and link application programs written in C++, C, and ADSP-21262 assembly • Load, run, step, halt, and set breakpoints in application program • Read and write data and program memory • Read and write core and peripheral registers • Plot memory Access to the ADSP-21262 processor from a personal computer (PC) is achieved through a USB port or an optional JTAG emulator. The USB interface gives unrestricted access to the ADSP-21262 processor and the ADSP-21262 EZ-KIT Lite Evaluation System Manual xi evaluation board peripherals. Analog Devices JTAG emulators offer faster communication between the host PC and target hardware. Analog Devices carries a wide range of in-circuit emulation products. To learn more about Analog Devices emulators and DSP development tools, go to http://www.analog.com/dsp/tools/. ADSP-21262 EZ-KIT Lite provides example programs to demonstrate the capabilities of the evaluation board. VisualDSP++ license provided with this EZ-KIT Lite evaluaL The tion system limits the size of a user program’s code to 10922 words of program memory. The board features: • Analog Devices ADSP-21262 processor D D 136-pin BGA package 300 MHz Core Clock Speed • Synchronous Read Access Memory (SRAM) D 512 Kbit x 8-bit • Flash Memory D • 1M x 8-bit Serial Peripheral Interconnect (SPI) Flash Memory D 512 Kbit • Analog Audio Interface D D D D xii AD1835A codec 4x2 RCA phono jack for 4 channels of stereo output 2x1 RCA phono jack for 1 channel of stereo input Headphone jack for 1 channel stereo output ADSP-21262 EZ-KIT Lite Evaluation System Manual Preface • Digital Audio Interface D D CS8416 SPDIF receiver RCA phono jack input • LEDs D 12 LEDs: 1 power (green), 1 board reset (red), 1 USB reset (red), 1 USB monitor (amber), and 8 general purpose (amber) • Push Buttons D 5 push buttons: 1 reset, 2 connected to DAI, 2 connected to DSP FLAG pins • Expansion Interface (Type A) D Parallel Port, FLAGs, DAI, SPI • Other Features D D D D JTAG ICE 14-pin header 0-ohm resistors for DSP current measurement SPI header DAI header The EZ-KIT Lite board has a total of 1 MB of parallel Flash memory and 512 Kbit of SPI Flash memory. The Flash memories can store user-specific boot code, allowing the board to run as a stand-alone unit. For more information, see “Using External Memory” on page 2-2 and “Boot Mode and Clock Ratio Select Switch (SW10)” on page 3-11. The board also has 512 KB of SRAM, which can be used at runtime. The DAI of the DSP connects to the AD1835A audio codec and the CS8416 SPDIF receiver. These devices allow you to create digital and analog audio signal processing applications. See “Using Analog Audio” on page 2-3 and “Using Digital Audio” on page 2-5 for more information. ADSP-21262 EZ-KIT Lite Evaluation System Manual xiii Purpose of This Manual Additionally, the EZ-KIT Lite board provides access to all of the processor’s peripheral ports. Access is provided in the form of a three-connector expansion interface. See “Expansion Interface” on page 3-7 for details. Purpose of This Manual The ADSP-21262 EZ-KIT Lite Evaluation System Manual provides instructions for using the hardware and installing the software on your PC. The text includes guidelines for running your own code on the ADSP-21262 EZ-KIT Lite. The manual also describes the board’s configuration and components. Finally, a schematic and a bill of materials are provided as a reference for future ADSP-21262 board designs. Intended Audience This manual is a user’s guide and reference to the ADSP-21262 EZ-KIT Lite evaluation system. Programmers who are familiar with the Analog Devices SHARC processor architecture, operation, and programming are the primary audience for this manual. Programmers who are unfamiliar with Analog Devices SHARC processors can use this manual in conjunction with the ADSP-2126x SHARC Core Reference and ADSP-21262/21266 Peripherals Manual and the ADSP-21160 SHARC DSP Instruction Set Reference, which describe the DSP’a architecture and instruction set. Programmers who are unfamiliar with VisualDSP++ should refer to the VisualDSP++ online Help and the VisualDSP++ user’s or getting started guides. For the locations of these documents, see “Related Documents” on page -xviii. xiv ADSP-21262 EZ-KIT Lite Evaluation System Manual Preface Manual Contents The manual consists of: • Chapter 2, “Getting Started” on page 1-1 Provides software and hardware installation procedures, PC system requirements, and basic board information. • Chapter 2, “Using EZ-KIT Lite” on page 2-1 Provides information on the EZ-KIT Lite from a programmer’s perspective and provides an easy-to-access memory map. • Chapter 3, “EZ-KIT Lite Hardware Reference” on page 3-1 Provides information on the hardware aspects of the evaluation system. • Appendix A, “Bill Of Materials” on page A-1 Provides a list of components used to manufacture the EZ-KIT Lite board. • Appendix B, “Schematics” on page B-1 Provides the resources to allow modifications to the EZ-KIT Lite or to use as a reference design. This appendix is not part of the online Help. The online Help viewers should go the PDF version of the ADSP-21262 EZ-KIT Lite Evaluation System Manual located in the Docs\EZ-KIT Lite Manuals folder on the installation CD to see the schematics. What’s New in This Manual This edition of the ADSP-21262 EZ-KIT Lite Evaluation System Manual includes the updated installation and license registration procedures. ADSP-21262 EZ-KIT Lite Evaluation System Manual xv Technical or Customer Support Technical or Customer Support You can reach DSP Tools Support in the following ways. • Visit the DSP Development Tools website at www.analog.com/technology/dsp/developmentTools/index.html • Email questions to [email protected] • Phone questions to 1-800-ANALOGD • Contact your ADI local sales office or authorized distributor • Send questions by mail to Analog Devices, Inc. One Technology Way P.O. Box 9106 Norwood, MA 02062-9106 USA Supported Processors The ADSP-21262 EZ-KIT Lite evaluation system supports Analog Devices ADSP-21262 SHARC DSPs. Product Information You can obtain product information from the Analog Devices website, from the product CD-ROM, or from the printed publications (manuals). xvi ADSP-21262 EZ-KIT Lite Evaluation System Manual Preface Analog Devices is online at www.analog.com. Our website provides information about a broad range of products—analog integrated circuits, amplifiers, converters, and digital signal processors. MyAnalog.com MyAnalog.com is a free feature of the Analog Devices website that allows customization of a webpage to display only the latest information on products you are interested in. You can also choose to receive weekly email notification containing updates to the webpages that meet your interests. MyAnalog.com provides access to books, application notes, data sheets, code examples, and more. Registration: Visit www.myanalog.com to sign up. Click Register to use MyAnalog.com. Registration takes about five minutes and serves as means for you to select the information you want to receive. If you are already a registered user, just log on. Your user name is your email address. DSP Product Information For information on digital signal processors, visit our website at www.analog.com/dsp, which provides access to technical publications, data sheets, application notes, product overviews, and product announcements. You may also obtain additional information about Analog Devices and its products in any of the following ways. • Email questions or requests for information to [email protected] • Fax questions or requests for information to 1-781-461-3010 (North America) or +49 (0) 89 76903-157 (Europe) ADSP-21262 EZ-KIT Lite Evaluation System Manual xvii Product Information Related Documents For information on product related development software, see the following publications. Table 1. Related DSP Publications Title Description ADSP-21262 SHARC Microprocessor Datasheet General functional description, pinout, and timing ADSP-2126x SHARC DSP Core Manual ADSP-2126x SHARC DSP Peripherals Manual Description of internal processor architecture, registers, and all peripheral functions ADSP-21160 SHARC DSP Instruction Set Reference Description of all allowed processor assembly instructions Table 2. Related VisualDSP++ Publications VisualDSP++ 3.5 User’s Guide for 32-Bit Processors Detailed description of VisualDSP++ 3.5 features and usage VisualDSP++ 3.5 Assembler and Preprocessor Manual for SHARC Processors Description of the assembler function and commands for SHARC processors VisualDSP++ 3.5 C/C++ Complier and Library Manual for SHARC Processors Description of the complier function and commands for SHARC processors VisualDSP++ 3.5 Linker and Utilities Manual for 32-Bit Processors Description of the linker function and commands for the 32-bit processors VisualDSP++ 3.5 Loader Manual for 32-Bit Processors Description of the loader function and commands for the 32-bit processors VisualDSP++ 3.5 User’s Guide for 32-Bit Proces- Detailed description of VisualDSP++ 3.5 feasors tures and usage xviii ADSP-21262 EZ-KIT Lite Evaluation System Manual Preface The listed documents can be found through online Help or in the Docs folder of your VisualDSP++ installation. Most documents are available in printed form. you plan to use the EZ-KIT Lite board in conjunction with a L IfJTAG emulator, refer to the documentation that accompanies the emulator. Online Documentation Your software installation kit includes online Help as part of the Windows® interface. These help files provide information about VisualDSP++ and the ADSP-21262 EZ-KIT Lite evaluation system. To view VisualDSP++ Help, click on the Help menu item or go to the Windows task bar and select Start –>Programs –>Analog Devices–>VisualDSP++ for 32-bit Processors –>VisualDSP++ Documentation. To view ADSP-21262 EZ-KIT Lite Help, which now is a part of the VisualDSP++ Help system, go the Contents tab of the Help window and select Manuals –>Hardware Tools –>EZ-KIT Lite Evaluation Systems. For more documentation, please go to http://www.analog.com/technology/dsp/library.html. Printed Manuals For general questions regarding literature ordering, call the Literature Center at 1-800-ANALOGD (1-800-262-5643) and follow the prompts. VisualDSP++ Documentation Set Printed copies of VisualDSP++ manuals may be purchased through Analog Devices Customer Service at 1-781-329-4700; ask for a Customer Service representative. The manuals can be purchased only as a kit. For additional information, call 1-603-883-2430. ADSP-21262 EZ-KIT Lite Evaluation System Manual xix Product Information If you do not have an account with Analog Devices, you will be referred to Analog Devices distributors. To get information on our distributors, log onto www.analog.com/salesdir/continent.asp. Hardware Manuals Printed copies of hardware reference and instruction set reference manuals can be ordered through the Literature Center or downloaded from the Analog Devices website. The phone number is 1-800-ANALOGD (1-800-262-5643). The manuals can be ordered by a title or by product number located on the back cover of each manual. Data Sheets All data sheets can be downloaded from the Analog Devices website. As a general rule, printed copies of data sheets with a letter suffix (L, M, N, S) can be obtained from the Literature Center at 1-800-ANALOGD (1-800-262-5643) or downloaded from the website. Data sheets without the suffix can be downloaded from the website only—no hard copies are available. You can ask for the data sheet by part name or by product number. If you want to have a data sheet faxed to you, the phone number for that service is 1-800-446-6212. Follow the prompts and a list of data sheet code numbers will be faxed to you. Call the Literature Center first to find out if requested data sheets are available. Contacting DSP Publications Please send your comments and recommendations on how to improve our manuals and online Help. You can contact us at [email protected]. xx ADSP-21262 EZ-KIT Lite Evaluation System Manual Preface Notation Conventions The following table identifies and describes text conventions used in this manual. conventions, which apply only to specific chapters, may L Additional appear throughout this document. Example Description Close command (File menu) or OK Text in bold style indicates the location of an item within the VisualDSP++ environment’s and boards’ menu system and user interface items. {this | that} Alternative required items in syntax descriptions appear within curly brackets separated by vertical bars; read the example as this or that. [this | that] Optional items in syntax descriptions appear within brackets and separated by vertical bars; read the example as an optional this or that. [this,…] Optional item lists in syntax descriptions appear within brackets delimited by commas and terminated with an ellipsis; read the example as an optional comma-separated list of this. PF9–0 Registers, connectors, pins, commands, directives, keywords, code examples, and feature names are in text with letter gothic font. filename Non-keyword placeholders appear in text with italic style format. [ Note: A note providing information of special interest or identifying a related topic. In the online version of this book, the word Note appears instead of this symbol. Caution: A caution providing information about critical design or programming issues that influence operation of a product. In the online version of this book, the word Caution appears instead of this symbol. ADSP-21262 EZ-KIT Lite Evaluation System Manual xxi Notation Conventions xxii ADSP-21262 EZ-KIT Lite Evaluation System Manual 1 GETTING STARTED This chapter provides the information you need to begin using ADSP-21262 EZ-KIT Lite evaluation system. For correct operation, install the software and hardware in the order presented in “Installation Tasks” on page 1-3. The chapter includes the following sections. • “Contents of EZ-KIT Lite Package” on page 1-1 Provides a list of the components shipped with this EZ-KIT Lite evaluation system. • “PC Configuration” on page 1-3 Describes the minimum requirements for the PC to work with the EZ-KIT Lite evaluation system. • “Installation Tasks” on page 1-3 Describes the step-by-step procedures for setting up the hardware and software. Contents of EZ-KIT Lite Package Your ADSP-21262 EZ-KIT Lite evaluation system package contains the following items. • ADSP-21262 EZ-KIT Lite board • EZ-KIT Lite Installation Procedure ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-1 Contents of EZ-KIT Lite Package • CD containing: D VisualDSP++ 3.5 for 32-bit processors with a limited license D ADSP-21262 EZ-KIT Lite debug software D USB driver files D Example programs D ADSP-21262 EZ-KIT Lite Evaluation System Manual (this document) • VisualDSP++ 3.5 Installation Quick Reference Card • Universal 7.5V DC power supply • USB 2.0 type cable • Registration card (please fill out and return) If any item is missing, contact the vendor where you purchased your EZ-KIT Lite or contact Analog Devices, Inc. The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. 1-2 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started PC Configuration For correct operation of the VisualDSP++ software and the EZ-KIT Lite, your computer must have the minimum configuration: Windows 98, Windows 2000, Windows XP Intel (or comparable) 166MHz processor VGA Monitor and color video card 2-button mouse 50 MB free on hard drive 32 MB RAM Full-speed USB port CD-ROM Drive [ EZ-KIT Lite does not run under Windows 95 or Windows NT. Installation Tasks The following task list is provided for the safe and effective use of the ADSP-21262 EZ-KIT Lite. Follow the instructions in the presented order to ensure correct operation of your software and hardware. 1. VisualDSP++ and EZ-KIT Lite software installation 2. VisualDSP++ license installation and registration 3. EZ-KIT Lite hardware setup 4. EZ-KIT Lite USB driver installation 5. USB driver installation verification 6. VisualDSP++ startup ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-3 Installation Tasks Installing VisualDSP++ and EZ-KIT Lite Software This EZ-KIT Lite comes with the latest version of VisualDSP++ 3.5 for 32-bit processors. VisualDSP++ installation includes EZ-KIT Lite installations. To install VisualDSP++ and EZ-KIT Lite software: 1. Insert the VisualDSP++ installation CD into the CD-ROM drive. 2. If Autoplay is enabled on your PC, you see the Install Shield Wizard Welcome screen. Otherwise, choose Run from the Start menu, and enter D:\ADI_Setup.exe in the Open field, where D is the name of your local CD-ROM drive. 3. Follow the on-screen instructions to continue installing the software. 4. At the Custom Setup screen, select your EZ-KIT Lite from the list of available systems and choose the installation directory. Click an icon in the Feature Description field to see the selected system’s description. When you have finished, click Next. 5. At the Ready to Install screen, click Back to change your install options, click Install to install the software, or click Cancel to exit the install. 6. When the EZ-KIT Lite installs, the Wizard Completed screen appears. Click Finish. Installing and Registering VisualDSP++ License VisualDSP++ and EZ-KIT Lites are licensed products. You may run only one copy of the software for each license purchased. Once a new copy of the VisualDSP++ or EZ-KIT Lite software is installed on your PC, you must install, register, and validate your licence. 1-4 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started The VisualDSP++ 3.5 Installation Quick Reference Card included in your package will guide you through the licence installation and registration process (refer to Tasks 1, 2, and 3). Setting Up EZ-KIT Lite Hardware The EZ-KIT Lite evaluation system contains ESD (electrostatic discharge) sensitive devices. Electrostatic charges readily accumulate on the human body and equipment and can discharge without detection. Permanent damage may occur on devices subjected to high-energy discharges. Proper ESD precautions are recommended to avoid performance degradation or loss of functionality. Store unused EZ-KIT Lite boards in the protective shipping package. The ADSP-21262 EZ-KIT Lite board is designed to run outside your personal computer as a stand-alone unit. You do not have to open your computer case. To connect the EZ-KIT Lite board: 1. Remove the EZ-KIT Lite board from the package. Be careful when handling the board to avoid the discharge of static electricity, which may damage some components. 2. Figure 1-1 shows the default jumper settings, DIP switch, connector locations, and LEDs used in installation. Confirm that your board is set up in the default configuration before continuing. ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-5 Installation Tasks Figure 1-1. EZ-KIT Lite Hardware Setup 3. Plug the provided power supply into J7 on the EZ-KIT Lite board. Visually verify that the green power LED (LED10) is on. Also verify that the two red reset LEDs (LED9 and LED12) go on for a moment and then go off, and, finally, LED8–1 are continually blinking. 4. Connect one end of the USB cable to an available full speed USB port on your PC and the other end to P4 on the ADSP-21262 EZ-KIT Lite board. 1-6 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started Installing EZ-KIT Lite USB Driver The EZ-KIT Lite evaluation system installed on the following platforms requires one full-speed USB port. • “Windows 98 USB Driver” on page 1-8 describes the installation on Windows 98. • “Windows 2000 USB Driver” on page 1-12 describes the installation on Windows 2000. • “Windows XP USB Driver” on page 1-13 describes the installation on Windows XP. The USB driver used by the debug agent is not Microsoft certified because it is intended for a development or laboratory environment, not a commercial environment. ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-7 Installation Tasks Windows 98 USB Driver Before using the ADSP-21262 EZ-KIT Lite for the first time, the Windows 98 USB driver must first be installed. To install the USB driver: 1. Insert the CD into the CD-ROM drive. The connection of the device to the USB port activates the Windows 98 Add New Hardware Wizard shown in Figure 1-2. Figure 1-2. Windows 98 – Add New Hardware Wizard 2. Click Next. 1-8 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started 3. Select Search for the best driver for your device, as shown in Figure 1-3. Figure 1-3. Windows 98 – Searching for Driver 4. Click Next. 5. Select CD-ROM drive, as shown in Figure 1-4. Figure 1-4. Windows 98 – Searching for CD-ROM ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-9 Installation Tasks 6. Click Next. Windows 98 locates the WmUSBEz.inf file on the installation CD, as shown in Figure 1-5. Figure 1-5. Windows 98 – Locating Driver 7. Click Next. The Coping Files dialog box appears (Figure 1-6). Figure 1-6. Windows 98 – Searching for .SYS File 1-10 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started 8. Click Browse. The Open dialog box, shown in Figure 1-7, appears on the screen. Figure 1-7. Windows 98 – Opening .SYS File 9. In Drives, select your CD-ROM drive. 10. Click OK. The Copying Files dialog box (Figure 1-8) appears. Figure 1-8. Windows 98 – Copying .SYS File ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-11 Installation Tasks 11. Click OK. The driver installation is now complete, as shown in Figure 1-9. Figure 1-9. Windows 98 – Completing Software Installation 12. Click Finish to exit the wizard. Verify the installation by following the instructions in “Verifying Driver Installation” on page 1-15. Windows 2000 USB Driver VisualDSP++ 3.5 installation software pre-installs the necessary drivers for the selected EZ-KIT Lite. The install also upgrades an older driver if such is detected in the system. to running the VisualDSP++ 3.5 installer, ensure there are no [ Prior other Hardware Wizard windows running in the background. If there are any wizard windows running, close them before starting the installer. 1-12 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started To install the USB driver: 1. If VisualDSP++ 3.5 is already installed on your system, go to step 2. Otherwise, run VisualDSP++ 3.5 installation. Refer to the VisualDSP++ 3.5 Installation Quick Reference Card for a detailed installation description. When installing VisualDSP++ 3.5 on Windows 2000, make sure the appropriate EZ-KIT Lite component is selected for the installation. 2. Connect the EZ-KIT Lite device to your PC’s USB port. Windows 2000 automatically detects an EZ-KIT device and automatically installs the appropriate driver for the selected device (see step 1). 3. Verify the installation by following the instructions in “Verifying Driver Installation” on page 1-15. Windows XP USB Driver VisualDSP++ 3.5 installation software pre-installs the necessary drivers for the selected EZ-KIT Lite. The install also upgrades an older driver if such is detected in the system. to running the VisualDSP++ 3.5 installer, ensure there are no [ Prior other Hardware Wizard windows running in the background. If there are any wizard windows running, close them before starting the installer. To install the USB driver: 1. If VisualDSP++ 3.5 is already installed on your system, go to step 2. Otherwise, run VisualDSP++ 3.5 installation. Refer to the VisualDSP++ 3.5 Installation Quick Reference Card for a detailed ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-13 Installation Tasks installation description. When installing VisualDSP++ 3.5 on Windows XP, make sure the appropriate EZ-KIT Lite component is selected for the installation. 2. Connect the EZ-KIT Lite device to your PC’s USB port. By connecting the device to the USB port you activate the Windows XP Found New Hardware Wizard, shown in Figure 1-10. Figure 1-10. Windows XP – Found New Hardware Wizard 3. Select Install the software automatically (Recommended) and click Next. 1-14 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started When Windows XP completes the driver installation for the selected device (see step 1), a window shown in Figure 1-11 appears on the screen. Figure 1-11. Windows XP – Completing Driver Installation 4. Verify the installation by following the instructions in “Verifying Driver Installation”. Verifying Driver Installation Before launching the EZ-KIT Lite evaluation system, verify that the USB driver software is installed properly: 1. Ensure that the USB cable connects to the evaluation board and the PC. 2. Verify that the yellow USB monitor LED (LED11) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++. ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-15 Installation Tasks 3. Verify that the USB driver software is installed properly. Open Windows Device Manager and verify that ADSP-21262 EZ-KIT Lite shows under DSP Emulators with no exclamation point, as in Figure 1-12. Figure 1-12. Device Manager Window Lite on Windows 98, disconnect the USB [ Ifcableusingfroman theEZ-KIT board before booting the PC. When Windows 98 is booted and you are logged on, re-connect the USB cable to the board. The operation should continue normally from this point. Starting VisualDSP++ To set up a session in VisualDSP++: 1. Verify that the yellow USB monitor LED (LED11, located near the USB connector) is lit. This signifies that the board is communicating properly with the host PC and is ready to run VisualDSP++. 2. Press and hold down the keyboard Control (CTRL) key. 1-16 ADSP-21262 EZ-KIT Lite Evaluation System Manual Getting Started 3. Select the Start button on the Windows taskbar, then choose Programs–>Analog Devices–>VisualDSP++ 3.5 for 32-bit processors–>VisualDSP++ Environment. If you are running VisualDSP++ for the first time, go to step 5. If you already have existing sessions, the Session List dialog box appears on the screen. 4. Click New Session. 5. The New Session dialog box, shown in Figure 1-13, appears on the screen. Figure 1-13. New Session Dialog Box 6. In Debug Target, choose EZ-KIT Lite (ADSP-21262). 7. In Processor, choose the appropriate processor, ADSP-21262. 8. Type a new target name in Session Name or accept the default name. 9. Click OK to return to the Session List. Highlight the new session and click Activate. ADSP-21262 EZ-KIT Lite Evaluation System Manual 1-17 Installation Tasks 1-18 ADSP-21262 EZ-KIT Lite Evaluation System Manual 2 USING EZ-KIT LITE This chapter provides specific information to assist you with developing programs for the ADSP-21262 EZ-KIT Lite evaluation system. This information appears in the following sections. • “EZ-KIT Lite License Restrictions” on page 2-2 Describes the restrictions of the VisualDSP++ license shipped with the EZ-KIT Lite. • “Using External Memory” on page 2-2 Describes how to access external memory and defines the memory map of the EZ-KIT Lite. • “Using Analog Audio” on page 2-3· Describes how to set up and communicate with the on-board audio codec. • “Using Digital Audio” on page 2-5 Describes how to use the on-board SPDIF receiver. • “Example Programs” on page 2-7 Provides information about the example programs included in the ADSP-21262 EZ-KIT Lite evaluation system. • “Background Telemetry Channel” on page 2-8 Highlights the advantages of the Background Telemetry Channel feature of VisualDSP++. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-1 EZ-KIT Lite License Restrictions • “Using EZ-KIT Lite VisualDSP++ Interface” on page 2-8 Describes the trace, performance monitoring, boot loading, context switching, and target options facilities of the EZ-KIT Lite system. For detailed information on how to program the ADSP-21262 SHARC processor, refer to the documents referenced in “Related Documents”. EZ-KIT Lite License Restrictions The license shipped with the EZ-KIT Lite imposes the following restrictions. • The size of a user program’s code is limited to 10922 words of the ADSP-21262 processor’s program memory. • No connections to Simulator or Emulator sessions are allowed. • The EZ-KIT Lite hardware must be connected and powered up in order to use VisualDSP++ with a kit license. Using External Memory The EZ-KIT Lite contains three types of memory: parallel Flash (1 MB), SPI Flash (512 Kbit) and SRAM (512 Kbit). The Flash memories can store user-specific boot code, letting the board to run as a stand-alone unit. For more information about setting the boot device for the DSP, see “Boot Mode and Clock Ratio Select Switch (SW10)” on page 3-11. Table 2-1 provides a map of the board’s external memory. The parallel Flash memory and the SRAM connect to the parallel port of the DSP. The parallel port is a multiplexed address and data port. The port can connect to 8-bit and 16-bit memory devices. When configuring the parallel port, keep in mind that the memory devices on the board are 8 bits wide. 2-2 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Table 2-1. EZ-KIT Lite Evaluation Board External Memory Start Address End Address Content 0x0100 0000 0x010F FFFF Flash memory 0x0120 0000 0x012F FFFF SRAM memory 0x0140 0000 0x0140 FFFF LEDs (see “LEDs and Push Buttons” on page 3-12). 0x0160 0000 0x017F FFFF Unused chip select 1 0x0180 0000 0x019F FFFF Unused chip select 2 To access the SRAM and Flash memories, set up a Parallel Port DMA. For more information on how to connect the SRAM and Flash memories, see “Parallel Port” on page 3-3. The SPI Flash memory connects to the DSP’s SPI port and uses Flag0 as a chip select. In order for FLAG0 to behave as a chip select, clear the PPFLG bit in the SYSCLT register. An example program is included in the EZ-KIT installation directory to demonstrate how the parallel port and SPI port can be configured to access the memories. Using Analog Audio The AD1835A is a high-performance, single-chip codec featuring four stereo digital-to-analog converters (DAC) for audio output and one stereo analog-to-digital converters (ADC) for audio input. The codec can input and output data with a sample rate of up to 96 kHz on all channels. A 192 kHz sample rate can be used with the one of the DAC channels. The DSP is interfaced with the AD1835A via the DAI port. The DAI interface pins can be configured to transfer serial data from the AD1835A codec in either time-division multiplexed (TDM) or I2S mode. For more information on how the AD1835A connects to the DAI, see “DAI Interface” on page 3-4. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-3 Using Analog Audio The master input clock (MCLK) for the AD1835A can be generated by the on-board 12.288 MHz oscillator or can be supplied by one of the DAI pins of the DSP. Using one if the pins to generate the MCLK, as opposed to the on-board oscillator, allows synchronization of multiple devices in the system. This is done on the EZ-KIT Lite when data is coming from the SPDIF receiver and being output through the audio codec. The SPDIF MCLK is routed to the AD1835A MCLK in the DSP’s SRU. It is also necessary to disable the on-board audio oscillator from driving the audio codec and the DSP’s input pin. For instructions on how to configure the clock, refer to “Codec Setup Switch (SW7)” on page 3-9. The AD1835A codec can be configured as a master or as a slave, depending on DIP switch settings. In master mode, the AD1835A drives the serial port clock and frame sync signals to the DSP. In slave mode, the DSP must generate and drive all of the serial port clock and frame sync signals. For information on how to set the mode, refer to “Codec Setup Switch (SW7)” on page 3-9. The AD1835A audio codec’s internal configuration registers are configured using the DSP’s SPI port. The FLAG3 register is used as the select for the device. For information on how to configure the multichannel codec, refer to the codec datasheet, which can be found at www.analog.com. The RCA connector (J4) is used to input analog audio. When using an electret microphone on this connector, configure the SW6 switch according the instructions in “Electret Microphone Select Switch (SW6)” on page 3-9. The four output channels connect to the RCA connector J5. Channel 4 of the codec connects to the headphone jack J6. For more information about the connectors see “Connectors” on page 3-15. Example programs are included in the EZ-KIT installation directory to demonstrate how to configure and use the board’s analog audio interface. 2-4 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Using Digital Audio The CS8416 is a monolithic CMOS device which receives and decodes one of eight channels of audio data according to the IEC60958, S/PDIF, EIAJ CP1201, or AES3 interface standards. The CS8416 receives data from a transmission line, recovers the clock and synchronization signals, and de-multiplexes the audio and digital data. The CS8416 is attached to the DAI port of the processor. The configuration registers of the SPDIF receiver are programmed via an SPI, which is connected to the processor’s SPI. The SPDIF receiver is capable of transmitting a variety of data formats, which are set up via the SPI interface. For more information about the CS8416 and DAI connection, see “DAI Interface” on page 3-4. The SPDIF input signal is input on P1 via a coax connector. To output the audio received by the CS8416 via the AD1835A audio codec, the master clock of both chips must be synchronized to prevent the loss of samples. Put the AD1835A in slave mode and disconnect the 12.288 MHz oscillator from the master clock (MCLK) input (see “Codec Setup Switch (SW7)” on page 3-9 for how to). The CS8416 general purpose output 1 (GPO1) is connected to LED11, and can be configured, via the SPI, to indicate a variety of conditions within the SPDIF receiver. Shipped with the kit example programs demonstrate how to configure and use the board’s digital audio interface. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-5 Using LEDs and Push Buttons Using LEDs and Push Buttons The EZ-KIT Lite has eight general-purpose user LEDs and four general-purpose push buttons. Two of the general-purpose push buttons are attached to the DSP’s FLAG pins, while the other two are attached to the DAI pins. All of the push buttons connect to the DSP through a DIP switch. The DIP switch allows DSP pins, which connect to the push buttons, to be disconnected. See “Push Button Enable Switch (SW9)” on page 3-10 for instructions on how to disable the push buttons from driving the corresponding DSP pin. The value of the push buttons connected to the FLAG pins can be determined by reading the FLAG register. The push buttons connected to the DAI pins must be configured as interrupts. It is necessary to set up an interrupt routine to determine each pin’s state. Table 2-2 shows how each push button connects to the DSP. Refer to the related example program shipped with the EZ-KIT Lite for more information. Table 2-2. Push Button Connections Push Button Reference Designator DSP Pin SW1 FLAG1 SW2 FLAG2 SW3 DAI19 SW4 DAI20 The LEDs are connected to the parallel port pins, AD7–0, via a latch. The parallel port of the DSP can be set up as a memory bus or as general-purpose FLAG pins. The latch allows the LEDs to be written to in both cases. Information about setting up the latch can be found in “SPDIF Signal Enable Switch (SW8)” on page 3-10. 2-6 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite When the LEDs are accessed as FLAG pins, the latch must be set up to pass through the data on the DSP’s pins AD7–0. In this mode, it is also necessary to set up the parallel port to be FLAG pins. To set up the parallel port as FLAG pins, set the PPFLGS bit in the SYSCTL register. Table 2-3 summarizes the LED and FLAG connections. Table 2-3. LED Connections LED Reference Designator DSP Pin Mapped as FLAG LED1 AD0 FLAG8 LED2 AD1 FLAG9 LED3 AD2 FLAG10 LED4 AD3 FLAG11 LED5 AD4 FLAG12 LED6 AD5 FLAG13 LED7 AD6 FLAG14 LED8 AD7 FLAG15 An example program is included in the EZ-KIT installation directory to demonstrate the functionality of the LEDs and push buttons. Example Programs Example programs are provided with the ADSP-21262 EZ-KIT Lite to demonstrate various capabilities of the evaluation board. These programs are installed with the EZ-KIT Lite software and can be found in \…\VisualDSP 3.5 32-Bit\212xx\EZ-KITs\ADSP-21262\Examples. Please refer to the readme file provided with each example for more information. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-7 Background Telemetry Channel Background Telemetry Channel Some USB debug agents support the Background Telemetry Channel (BTC), which facilitates data exchange between VisualDSP++ and the processor without interrupting DSP execution. This revision of the ADSP-21262 EZ-KIT Lite does not support the Background Telemetry. Using EZ-KIT Lite VisualDSP++ Interface This section provides information about the following parts of the VisualDSP++ graphical user interface: • “Boot Load” on page 2-8 • “Target Options” on page 2-9 • “Core Hang Conditions” on page 2-11 • “Hardware Breakpoints” on page 2-12 Boot Load Choosing Boot Load from the Settings menu runs the processor and performs a hard reset on the board. This command saves you from having to shut down VisualDSP++, reset the EZ-KIT Lite board, and bring up VisualDSP++ again when you want to perform a hard reset. Use this feature when loading debug boot code from an external part or when you want to put the device into a known state. 2-8 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Target Options Choosing Target Options from the Settings menu opens the Target Options dialog box (Figure 2-1). Use target options to control certain aspects of the processor on the ADSP-21262 EZ-KIT Lite evaluation system. Figure 2-1. Target Options Dialog Box While Target is Halted and On Emulator Exit Options This target option controls the processor’s behavior when VisualDSP++ relinquishes DSP control (for example, when exiting VisualDSP++). The options are detailed in Table 2-4 and Table 2-5. Table 2-4. While Target is Halted Options Option Description Stop I/O DMA Stops IO DMAs in emulator space. This option disables DMA requests when the emulator has control of the DSP. Data in the EP, LINK, or SPORT DMA buffers are held there unless the internal DMA request was already granted. This option holds off incoming data and ceases outgoing data. Because SPORT-receive data cannot be held off, it is lost, and the overrun bit is set. The direct write buffer (internal memory write) and the EP pad buffer are allowed to flush any remaining data to internal memory. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-9 Using EZ-KIT Lite VisualDSP++ Interface Table 2-5. On Emulator Exit Options Option Description On Emulator Exit Determines the state the DSP is left in when the emulator relinquishes control of the DSP: Reset DSP and Run causes the DSP to reset and begin execution from its reset vector location. Run from current PC causes the DSP to begin running from its current location. Other Options Table 2-6 describes other available target options. Table 2-6. Other Target Options Option Description Reset before loading executable Resets registers before loading a DSP executable. Clear this option when DSP registers must not change to their reset values when a file load occurs. Verify all writes to target memory Validates all memory writes to the DSP. After each write, a read is performed and the values are checked for a matching condition. Enable this option during initial program development to locate and fix initial build problems (such as attempting to load data into non-existent memory). Clear this option to increase performance while loading executable files since VisualDSP++ does not perform the extra reads that are required to verify each write. Reset cycle counters on run Resets the cycle count registers to zero before a Run command is issued. Select this option to count the number of cycles executed between breakpoints in a program. 2-10 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Core Hang Conditions Certain peripheral devices, such as host ports, DMA, and link ports, can hold off the execution of processor instructions. This is known as a hung condition and commonly occurs when reading from an empty port or writing to a full port. If an attempt to halt the processor is made during one of these conditions, the EZ-KIT Lite may encounter a core hang. Normally, a core hang can be cleared by the board using a special clear/abort bit. However, there are cases in which it is desirable or possible not to clear the core hang. Sometimes it is desirable to wait for the core hang to clear itself, such as when waiting for a host processor to read or write data. In other cases, it is not possible to clear the core hang, and a DSP reset must occur to continue the debugging session. Table 2-7 describes the EZ-KIT Lite’s core hang operations. Table 2-7. Core Hang Operations Option Description Abort Abort the hung operation. This causes the offending instruction to be aborted in the pipeline. Retry Allows you to remedy the hung operation. For example, if a host processor is holding off the DSP, you can cause the host to clear the hung condition. Ignore Performs a software reset on the target board. Clear Aborts the hung operation. This causes the offending instruction to be aborted in the pipeline. Acknowledge Allows you to remedy the hung operation. For example, if a host processor is holding off the DSP, you can cause the host to clear the hung condition. Reset Performs a software reset on the target board. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-11 Using EZ-KIT Lite VisualDSP++ Interface Hardware Breakpoints Hardware breakpoints work similarly to watchpoints. Set hardware breakpoints on: • Data transfers within a user-defined memory range • Instructions • Register reads and writes To enable hardware breakpoints for ADSP-21262 DSPs: 1. From the Settings menu, choose Hardware Breakpoints. 2. The Hardware Breakpoints dialog box appears. The dialog box has three tabbed pages: Data, Instruction, and Other (Figure 2-2). Figure 2-2. Hardware Breakpoints Dialog Box Refer to the following sections for information about hardware breakpoints. • “Common Hardware Breakpoint Attributes” on page 2-13 • “Global Hardware Breakpoint Options” on page 2-14 • “Data Hardware Breakpoints” on page 2-14 • “Instruction Hardware Breakpoints” on page 2-15 • “Other Breakpoints” on page 2-17 • “Tips and Tricks Using Hardware Breakpoints” on page 2-18 2-12 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Common Hardware Breakpoint Attributes Each of the three tabs in the Hardware Breakpoints dialog box has common attributes. The common attributes are described in Table 2-8. Table 2-8. Common Hardware Breakpoint Attributes Attribute Description Enable Enables each individual breakpoint. Start Address End Address Specify inclusive start and end addresses. Each pair of addresses sets up an address range for the particular breakpoint. Exclusive Enables breaks outside of the specified (inclusive) address range. Mode Data page and Other page only. This option specifies the modes that trigger hardware breakpoints. The available choices are: Disabled—disables the breakpoint On Write—triggers the breakpoint on any write operation to the specified address range On Read—triggers the breakpoint on any read operation from the specified address range Any Access—triggers the breakpoint on any read or write access to the specified address range. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-13 Using EZ-KIT Lite VisualDSP++ Interface Global Hardware Breakpoint Options For ADSP-21262 DSPs, the options listed in Table 2-9 apply to all hardware breakpoints, regardless of their type. Table 2-9. Global Hardware Breakpoint Options Option Description Skip N Breakpoint Events Specifies the number of breakpoint events to be ignored before stopping the processor. Each time a hardware breakpoint condition occurs, the count decrements. When the count reaches zero (0), the DSP processes the hardware break. Use this option to count the number of times a break operation occurs. Breakpoints within the group are ORed together to create this condition. Restore Skip Count on Break Enables skip-count decrement as specified in Skip N Breakpoint Events. Restore Skip Count on Break Causes the emulator to restore the Skip Count to the value at program RESTART. Otherwise, the Skip Count remains at its current value. AND All Breakpoints ANDs the interrupts to form the composite interrupt. Normally, the group interrupts are ORed to create a composite interrupt. Data Hardware Breakpoints For ADSP-21262 DSPs, use data breakpoints to break on accesses to internal memory, IOP registers, the external port (EP), and multiprocessor memory space (MMS). The following actions trigger a data breakpoint: • DAG1 access • DM() modifier access The two data breakpoints are ORed to generate a single data breakpoint condition. The Data page of the Hardware Breakpoints dialog box, which permits the specification of two data breakpoints, is shown in Figure 2-3. 2-14 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Figure 2-3. Data Page of Hardware Breakpoints Dialog Box Instruction Hardware Breakpoints For ADSP-21262 DSPs, an instruction breakpoint occurs when an instruction is executed within one of the specified address ranges. The four individual instruction breakpoints are ORed to generate a single instruction breakpoint condition. Shown below is the Instruction page of the Hardware Breakpoints dialog box, which permits the specification of four individual instruction breakpoints. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-15 Using EZ-KIT Lite VisualDSP++ Interface Figure 2-4. Instruction Page of Hardware Breakpoints Dialog Box 2-16 ADSP-21262 EZ-KIT Lite Evaluation System Manual Using EZ-KIT Lite Other Breakpoints For SHARC DSPs, the Other page of the Data Breakpoints dialog box permits the specification of hardware breakpoints triggered by access to PM data, IO, or the external port. Figure 2-5. Other Page of Hardware Breakpoints Dialog Box Table 2-10. Other Hardware Breakpoint Options Option Description PM DataEvents Enables PM data breakpoints.PM data breakpoints are similar to data breakpoints (Data page), except accesses that trigger a PM breakpoint are made by DAG2 or the PM() modifier. Like data breakpoints, PM data breakpoints cause a break on accesses to internal memory, IOP registers, the external port (EP), and multiprocessor memory space (MMS). I/O Enables IO breakpoints.IO breakpoints are triggered by accesses made on the IO Address Bus. Use an IO breakpoint to break on accesses made during DMA transfers, MMS accesses, and Host accesses. ADSP-21262 EZ-KIT Lite Evaluation System Manual 2-17 Using EZ-KIT Lite VisualDSP++ Interface Table 2-10. Other Hardware Breakpoint Options (Cont’d) Option Description External Port Enables external port breakpoints.External port (EP) breakpoints are triggered by accesses made through the External Port. Use an EP breakpoint to break on accesses made to any external device that may be tied to the EP, such as external memory. AND All Breakpoints ANDs the interrupts to form the composite interrupt. Normally, the group interrupts are ORed to create a composite interrupt. Tips and Tricks Using Hardware Breakpoints Be aware of the following tips and tricks when using hardware breakpoints on ADSP-21262 processors. Latency For SHARC processors, hardware breakpoints do not assert until two (2) instruction cycles after the actual break condition occurs Restrictions When using hardware breakpoints, do not place breaks at any address where a JUMP, CALL, or IDLE instruction would be illegal. Do not place breaks in the last few instructions of a DO LOOP or in the delay slots of a delayed branch. For more information on these illegal locations, refer to your DSP’s Hardware Reference. Setting a Breakpoint on a Single Address To set a breakpoint on a single address, set the Start Address equal to the End Address. 2-18 ADSP-21262 EZ-KIT Lite Evaluation System Manual 3 EZ-KIT LITE HARDWARE REFERENCE This chapter describes the hardware design of the ADSP-21262 EZ-KIT Lite board. The following topics are covered. • “System Architecture” on page 3-2 Describes the configuration of the ADSP-21262 board and explains how the board components interface with the DSP. • “DIP Switch Settings” on page 3-8 Shows the location and describes the function of the DIP switches. • “LEDs and Push Buttons” on page 3-12 Shows the location and describes the function of the LEDs and push buttons. • “Connectors” on page 3-15 Shows the location and gives the part number for all of the connectors on the board. Also, the manufacturer and part number information is given for the mating parts. ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-1 System Architecture System Architecture This section describes the processor’s configuration on the EZ-KIT Lite board. JTAG Header GP LEDs (8) 512k x 8 SRAM 1M x 8 Flash Par allel Port JTAG Port EZ USB FX USB Connector SRAM ADSP-21262 DSP 25 MHz Oscillator Expa nsion Conn ector s Type A Reset PB SPI DAI FLAG0-3 +7.5V Connector A5V 3.3V 1.2V AD1835 CODEC Power Regulation 2 SPI FLASH CS8416 SPDIF RX Phono 2 PBs (4) Stereo In RCA Jacks (2x1) Stereo Out RCA J acks (4x2) Headphone Jack Figure 3-1. System Architecture Block Diagram The EZ-KIT Lite has been designed to demonstrate the capabilities of the ADSP-21262 DSP. The DSP core is powered at 1.2V, and the IO is powered at 3.3V. Two 0-ohm resistors give access to the DSP’s power planes and allow to measure the power consumption of the processor. The R79 resistor provides access to the IO voltage of the processor, and the R80 resistor provides access to the core voltage plane of the processor. 3-2 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference The CLKIN pin of the DSP connects to a 25 MHz oscillator. The core frequency of the DSP is derived by multiplying the frequency at the CLKIN pin by a value determined by the state of the DSP pins, CLKCFG1 and CLKCFG0. The value at these pins is determined by the state of the SW10 switch (see “Boot Mode and Clock Ratio Select Switch (SW10)” on page 3-11). By default, the EZ-KIT Lite gives a core frequency of 200 MHz. The SW10 switch also configures the boot mode of the DSP. The EZ-KIT Lite is capable of Parallel Port boot and SPI Master Boot. By default, the EZ-KIT Lite boots from the parallel port. For information about configuring the boot modes, see “Boot Mode and Clock Ratio Select Switch (SW10)” on page 3-11. Parallel Port The parallel port (PP) of the ADSP-21262 DSP consists of a 16-bit multiplex address/data memory bus (AD15–0) and an address latch-enable pin (ALE). The interface does not have any memory select pins; these signals must be generated by decoding the address. The PP connections to the EZ-KIT Lite are shown in Figure 3-2. The PP is connected to an 8-bit parallel Flash memory, an 8-bit SRAM memory, and eight general-purpose LEDs. The upper three address bits are connected to a 3-to-8 decoder, providing eight memory select pins. See “Using External Memory” on page 2-2 for more information about accessing the Flash and SDRAM memories. Because the PP is a multiplexed address/data memory bus, two 8-bit latches are used to latch the upper address bits. Additional latch is used to drive the LEDs. The latter allows the LED values to be written to as if they were at a memory location. For more information about using the LEDs, refer to the “Using LEDs and Push Buttons” on page 2-6. All of the PP signals are available externally via the expansion interface connectors (J3–1). The pinout of the connectors can be found in “Schematics” on page B-1. ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-3 System Architecture A23 A22 A21 AD15-0 D ALE 0 1 2 3 4 5 6 7 138 3->8 DEC 1MB FLASH D7-0 LE FLAS H_C S D0- 7 CS Op ening the switch puts latch alw ays in Transpa rent M ode SR AM _CS D A8-18 A0-7 512KB SRAM D7-0 CS SR AM _CS Expansion Interface FLASH_C S S RA M_CS LE D_CS A8-19 A0-7 Q 373 8-bit Latch (2) DSP C B A Q 8 LED s 373 8-bit Latch LE WR Figure 3-2. Parallel Port Connections Block Diagram DAI Interface The pins of the Digital Application Interface (DAI) connect to the signal routing unit (SRU). The SRU is a flexible routing system, providing a large system of signal flows within the DSP. In general, the SRU allows to route the DAI pins to different internal peripherals in various combinations. 3-4 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference The DAI pins are connected to the AD1835A audio codec, the CS8414 SPDIF receiver, the audio oscillator output, and two push buttons. Figure 3-3 illustrates the EZ-KIT Lite’s connections to the DAI. DAIP20 DAIP19 DAIP18 DAIP17 DAIP16 DAIP15 DAIP14 DAIP13 DAIP12 DAIP11 DSP DAIP10 DAIP9 DAIP8 DAIP7 DAIP6 DAIP5 DAIP4 DAIP3 DAIP2 DAIP1 PB_4 PB_3 SPDIF_IN Audio_OSC DAC_LRCLK DAC_BCLK DAC_SDATA1 DAC_SDATA2 DAC_SDATA3 DAC_SDATA4 DAC1 DAC2 DAC3 DAC4 Headphone Jack AD1835 ADC_LRCLK ADC_BCLK ADC_SDATA1 4x2 RCA Phono Jack OUT ADC 1X2 RCA Phono Jack IN IN Phono Jack MCLK Audio_OSC 12.288MHz SPDIF_FSYNC SPDIF_SCLK SPDIF_SDATA SPDIF RX SPDIF_MCLK Figure 3-3. DAI Connections Block Diagram Refer to “Using Analog Audio” on page 2-3 and “Using Digital Audio” on page 2-5 for more information about setting up the DSP to communicate with these devices. To use the DAI for a different purpose, disable any signal, which is driving the DAI pins, with a switch. See “Codec Setup Switch (SW7)” on page 3-9 and “SPDIF Signal Enable Switch (SW8)” on page 3-10 for how to. In addition, the codec setup switch allows flexible routing of the 12.288 MHz audio oscillator’s output signal. By default, this signal is used as the master clock (MCLK) for the AD1835A codec. ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-5 System Architecture SPI Interface The DSP’s serial peripheral interconnect (SPI) interface is connected to an SPI Flash memory, the CS8416 SPDIF receiver, and the AD1835A audio codec. The FLAG0 pin is used as a memory select for accessing the SPI Flash memory, and the FLAG3 pin is used for accessing the AD1835A’s configuration registers. All of the SPI signals are available externally via the expansion interface connectors (J3–1), as well as the 0.1' spaced header P2. The pinout of these connectors can be found in “Schematics” on page B-1. FLAG Pins The DSP has four general-purpose IO FLAG pins. Table 3-1 describes the connection of each flag. Table 3-1. IO FLAG Pins FLAG Pin EZ-KIT Lite Function FLAG0 SPI Flash chip select FLAG1 Push button (SW1) input FLAG2 Push button (SW2) input FLAG3 AD1835A SPI interface chip select For information on how to disable the push buttons from driving the corresponding DSP flag pin, see section “Push Button Enable Switch (SW9)” on page 3-10. The FLAG signals are available externally via the expansion interface connectors (J3–1). The pinout of these connectors can be found in “Schematics” on page B-1. 3-6 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Expansion Interface The expansion interface consists of the three 90-pin connectors. Table 3-2 shows the interfaces each connector provides. For the exact pinout of these connectors, refer to Appendix B, “Schematics” on page B-1. The mechanical dimensions of the connectors can be obtained from Technical or Customer Support. Table 3-2. Expansion Interface Connectors Connector Interfaces J1 5V, AD15–0 J2 3.3V, FLAG3–0, DAI_P20–1, SPI J3 5V, 3.3V, Reset, Parallel Port Control signals Limits to the current and to the interface speed must be taken into consideration when using the expansion interface. The maximum current limit is dependent on the capabilities of the used regulator. Additional circuitry can also add extra loading to signals, decreasing their maximum effective speed. Devices does not support and is not responsible for the [ Analog effects of additional circuitry. JTAG Emulation Port The JTAG emulation port allows an emulator to access the DSP’s internal and external memory through a 6-pin interface. The JTAG emulation port of the processor is also connected to the USB debugging interface. When an emulator connects to the board at P8, the USB debugging interface is disabled. This is not the standard connection of the JTAG interface. ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-7 DIP Switch Settings For information about the standard connection of the interface, see EE-68 published on the Analog Devices website. For more information about the JTAG connector, see “JTAG Header (P5)” on page 3-19. To learn more about available emulators, contact Analog Devices (see “Product Information”). DIP Switch Settings Figure 3-4 shows the location and default settings of the EZ-KIT Lite DIP switches. Figure 3-4. DIP Switch Locations and Default Settings 3-8 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Electret Microphone Select Switch (SW6) To connect an electret microphone to the audio input, place all positions of the SW6 switch “ON”. The default position of this switch is all “OFF”. When all of the switches are in the “ON” position, a DC offset of 2.5V is added to the signal, and gain of the input amplifiers is changed from 1x to 10x. Codec Setup Switch (SW7) The codec setup switch (SW7) can be used to change the routing of some of the signals going to the AD1835A codec and to setup the communication protocol of the codec. Positions 1 and 2 determine the clock routing for the audio oscillator to the codec and to the DSP. Figure 3-5 illustrates how the switch positions 1 and 2 are connected on the board. In the default position, route the DAI_P17 pin to DAI_P6 (in software) to clock the AD1835A. ADSP-21262 DSP AD1835 Codec DAI_P6 MCLK DAI_P17 12.288MHz OSC SW7.1 SW7.2 Figure 3-5. Audio Clock Routing Position 3 of the SW7 switch determines if the AD1835A device is a master or is a slave. If the AD1835A is a master, the device’s serial interface generates the frame sync and clock signals necessary to transfer data. When ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-9 DIP Switch Settings the device is a slave, the DSP must generate the frame sync and clock signals. By default, position 3 is “ON”, and the AD1835A generates the control signals. Position 4 of SW7 disconnects the AD1835A’s ADC_DATA pin from the DAI interface. This is useful when the DAI interface is to connect to another device. SPDIF Signal Enable Switch (SW8) The SPDIF signal enable switch (SW8) disconnects always driving signal of the CS8416 SPDIF receiver serial interface. Table 3-3 shows which DSP signal is no longer being driven when the corresponding switch position is placed in the “OFF” position. Table 3-3. SW8 Connections Switch Position DSP Pin SPDIF RX Pin 1 DAI_P2 MCK 2 DAI_P1 SDATA 3 DAI_P4 FSYNC 4 DAI_P3 SCK 5 DAI_P15 SPI_CS 6 DAI_P16 GPO0 Push Button Enable Switch (SW9) The push button enable switch (SW9) disconnects the push buttons from the corresponding DSP pins. This allows the signals to be used for another purpose. Table 3-4 shows the signal and SW9 connections. By default, all of the position of the SW9 switch are “ON”, allowing the push buttons to function as designed. 3-10 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Table 3-4. Push Button Enable Switch (SW9) Connections Switch Position Push Button Reference Designator DSP Pin 1 SW1 FLAG1 2 SW2 FLAG2 3 SW3 DAI19 4 SW4 DAI20 Position 6 of SW9 connects or disconnects the latch-enable pin of the LED to the logical “OR” of the ~WE and ~LED_CS signals. When position is “OFF”, the latch-enable pin of the LED latch ((U24) is always pulled “HIGH”, making the latch transparent. In this position, the value of the LEDs is directly connected to AD7–0. When position 6 is “ON”, the values of the LEDs are set by writing to a memory location. The lower 8 bits of the data written to the address 0x1400 0000 set the values of the LEDs. By default, position 6 is “ON”, allowing the LEDs to be written by writing to a memory address. For more information refer to “Using LEDs and Push Buttons” on page 2-6. Boot Mode and Clock Ratio Select Switch (SW10) The SW10 switch sets the boot mode and clock multiplier ration. Table 3-5 shows how to set up the boot mode using positions 1 and 2. By default, the EZ-KIT Lite boots in SPI master mode and Parallel Port mode, and the DSP boots from Flash memory. Table 3-5. Boot Mode Configuration BOOTCFG1 Pin (Position 2) BOOTCFG0 Pin (Position 1) Boot Mode OFF OFF SPI Slave Boot OFF ON SPI Master Boot ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-11 LEDs and Push Buttons Table 3-5. Boot Mode Configuration (Cont’d) BOOTCFG1 Pin (Position 2) BOOTCFG0 Pin (Position 1) Boot Mode ON OFF Flash Boot1 ON ON Internal Boot Mode 1 Bold typeface denotes the default setting. Table 3-6 shows how to set up the clock multiply ratio using positions 3 and 4. By default, the DSP increases the clock multiply ratio by 8, setting the core clock to 300 MHz. Table 3-6. Core Clock Rate Configuration CLKCFG1 (Position 4) CLKCFG0 (Position 3) Core to CLKIN Ratio OFF OFF 3:1 OFF ON 16:1 ON OFF 8:11 ON ON NA 1 Bold typeface denotes the default ratio. Loop-Back Test Switch (SW11) The loop-back test switch (SW11) is connected to GPO1 of the CS8416. The functionality of GPO1 is programmable via SPI. LEDs and Push Buttons This section describes the functionality of the LEDs and push buttons. Figure 3-6 shows the locations of the LEDs and push buttons. 3-12 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Figure 3-6. LED and Push Button Locations General Purpose LEDs (LED8–1) Eight general-purpose LEDs are connected to the DSP through a latch on signals AD7–0. These LEDs can be accessed by writing to the FLAG registers or by writing to a memory address. Refer to “Using LEDs and Push Buttons” on page 2-6 for more information. ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-13 LEDs and Push Buttons Reset LEDs (LED9, LED12) When LED9 is lit (red), the master reset of all the major ICs is active. When LED12 is lit (red), the USB interface chip (U34) is being reset. The USB chip is reset only on power-up, or if USB communication has not been initialized. Power LED (LED10) When LED10 is lit (green), it indicates that power is being properly supplied to the board. SPDIF GPO1 LED (LED11) The SPDIF GPO1 LED (LED11) connects to GPO1 of the CS8416. The functionality of GPO1 is programmable via SPI. USB Monitor LED (LED13) The USB monitor LED (LED13) indicates that USB communication has been initialized successfully and you may connect to the processor using a VisualDSP++ EZ-KIT Lite session. Once the USB cable is plugged into the board, it takes approximately 15 seconds for the USM monitor LED to light. If the LED does not light, try cycling power on the board and/or reinstalling the USB driver (see “Installing EZ-KIT Lite USB Driver” on page 1-7). Push Buttons (SW4–1) Four push buttons (SW4–1) are provided for general-purpose user input. Two of the push buttons are connected to the DSP’s FLAG pins. The other two are connected to the DSP’s DAI. The push buttons are active “HIGH” and, when pressed, send a High (1) to the processor. Refer to “Using LEDs and Push Buttons” on page 2-6 for more information. The push 3-14 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference button enable switch (SW9) is capable of disconnecting the push buttons from the corresponding DSP pin (refer to “Push Button Enable Switch (SW9)” on page 3-10 on page 3-10 for more information). The DSP signals and corresponding push buttons are summarized in Table 3-7. Table 3-7. Push Button Connections DSP Signal Push Button Reference Designator DSP Signal Push Button Reference Designator FLAG1 SW1 DAI_P19 SW3 FLAG2 SW2 DAI_P20 SW4 Board Reset Push Button (SW5) The RESET push button (SW5) resets all of the ICs on the board. The only exception is the USB interface chip (U34). The chip is not being reset when the push button is pressed after the USB cable has been plugged in and communication correctly initialized with the PC. After USB communication has been initialized, the only way to reset the USB is by powering down the board. Connectors This section describes the connector functionality and provides information about mating connectors. Figure 3-7 shows the connector locations. Expansion Interface (J1, J2, J3) Three board-to-board connectors (J3–1) provide signals for most of the processor’s peripheral interfaces. The connectors are located at the bottom of the board. For more information about the expansion interface, see “Expansion Interface” on page 3-7. For the J3–1 connectors’ availability and pricing, contact Samtec. ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-15 Connectors Figure 3-7. Connector Locations Part Description Manufacturer Part Number 90 Position 0.05" Spacing, SMT (J1, J2, J3) Samtec SFC-145-T2-F-D-A Mating Connector 90 Position 0.05” Spacing (Through Hole) Samtec TFM-145-x1 Series 90 Position 0.05” Spacing (Surface Mount) Samtec TFM-145-x2 Series 90 Position 0.05” Spacing (Low Cost) Samtec TFC-145 Series 3-16 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference Audio In RCA Connector (J4) Part Description Manufacturer Part Number Two channel right angle RCA jack SWITCHCRAFT PJRAS1X2S02 Mating Cable Two channel RCA interconnect cable Monster Cable BI100-1M Audio Out RCA Connector (J5) Part Description Manufacturer Part Number Six channel right angle RCA jack SWITCHCRAFT PJRAS2X2S01 Mating Cable Two channel RCA interconnect cable Monster Cable BI100-1M Headphone Out Jack (J6) Part Description Manufacturer Part Number 3.5mm stereo jack (J6) Shogyo SJ-0359AM-5 Power Jack (J7) The power connector (J7) provides all of the power necessary to operate the EZ-KIT Lite board. Part Description Manufacturer Part Number 2.5 mm Power Jack (J7) SWITCHCRAFT Digi-Key RAPC712 SC1152-ND Mating Power Supply (shipped with EZ-KIT Lite) 7.5V Power Supply GlobTek TR9CC2000LCP-Y ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-17 Connectors The power connector supplies DC power to the EZ-KIT Lite board. Table 3-8 shows the power supply specifications. Table 3-8. Power Supply Specifications Terminal Connection Center pin +7.5 VDC@2A Outer Ring GND SPDIF In Coax Connector (P1) Part Description Manufacturer Part Number Coaxial (P1) SWITCHCRAFT PJRAN1X1U01 SPI Header (P2) The SPI connector (P2) provides access to all of the SPI signals in the from of a .1” spacing header. In addition, the FLAG1 signal can be used as a chip select. If you are using FLAG1 as a chip select, disable the push button associated with the flag. For more information, see “Push Button Enable Switch (SW9)” on page 3-10. Part Description Manufacturer Part Number 6-pin IDC Header (P2) Sullins PTC04DAAN DAI Header (P3) The DAI connector (P3) provides access to all of the DAI signals in the from of a .1” spacing header. When using the header to access the DSP’s DAI pins, ensure that signals, which normally drive the DSP’s DAI pins, 3-18 ADSP-21262 EZ-KIT Lite Evaluation System Manual EZ-KIT Lite Hardware Reference are disabled. Refer to “Codec Setup Switch (SW7)” on page 3-9 for more information on how to disable signals already being driven from elsewhere on the EZ-KIT Lite. Part Description Manufacturer Part Number 26-pin IDC Header (P3) Berg 54102-T08-13 USB Connector (P4) The USB connector (P4) allows to configure and program the DSP. Part Description Manufacturer Part Number Type B USB receptacle (P4) Mill-Max Digi-Key 897-30-004-90-000 ED90003-ND JTAG Header (P5) The JTAG header (P5) is the connecting point for a JTAG in-circuit emulator pod. When an emulator is connected to the JTAG header, the USB debug interface is disabled. 3 is missing to provide keying. Pin 3 in the mating connector L Pin should have a plug. using an emulator with the EZ-KIT Lite board, follow the L When connection instructions provided with the emulator. Part Description Manufacturer Part Number 14-pin IDC Header (P5) Berg 54102-T08-07 ADSP-21262 EZ-KIT Lite Evaluation System Manual 3-19 Connectors 3-20 ADSP-21262 EZ-KIT Lite Evaluation System Manual 1 1 AM29LV08IB-120EC TSOP40 1M-X-8-FLASH-3V 2 2 3 U19 Part Number Manufacturer Reference Design Description Quantity Reference A BILL OF MATERIALS AMD AM29LV081-120E 74LVC14A SOIC14 U28,U33 HEX-INVER-SCHMITT-TRI GGER TI 74LVC14AD 1 CS8416 SOIC28 96KHZ-DIGITAL-AUDIO-RECVR U3 CIRRUS LOGIC CS8416 4 1 CY7C64603-128 PQFP128 USB-TX/RX MICROCONTROLLER U34 CYPRESS CY7C64603-128N 5 1 MMBT4401 SOT-23 NPN TRANSISTOR 200MA Q1 FAIRCHILD MMBT4401 6 1 74LVC00AD SOIC14 U13 PHILIPS 74LVC00AD 7 1 CY7C1019BV33-15VC SOJ32 128K X 8 SRAM U29 CYPRESS CY7C1019BV33-1 8 1 AD8532AR SOIC8 DUAL AMP 250MA U10 ANALOG DEVICES AD8532AR ADSP-21262 EZ-KIT Lite Evaluation System Manual A-1 Part Number Manufacturer Reference Design Description Quantity Reference 9 2 SN74AHC1G02 SOT23-5 SINGLE-2 INPUT-NOR U26,U36 TI SN74AHC1G02DB 10 1 SN74LV164A SOIC14 8-BIT-PARALLEL-SERIAL U35 TI SN74LV164AD 11 1 CY7C4201V-15AC TQFP32 64-BYTE-FIFO U32 CYPRESS CY7C4201V-15AC 12 1 25MHZ 1/2 OSC01 OSC U16 DIGI-KEY SG-8002DC-PCC- 13 1 12.0MHZ THR OSC006 CRYSTAL Y1 DIG01 300-6027-ND 14 2 SN74AHC1G00 SOT23-5 SINGLE-2-INPUT-NAND U20,U27 TI SN74AHC1G00DB 15 1 12.288MHZ SMT OSC003 TS201/21262 U17 DIG01 SG-8002CA-PCC- 16 1 74LVC138AD SOIC16 3-TO-8-DEMUX U25 PHILIPS 74LVC138AD 17 3 74LVC373APW TSSOP20 8-BIT-D-LATCH U18,U21, U24 PHILIPS 74LVC373APW 18 1 21262 24LC00 “U23” SEE 1000127 U23 MICROCHIP 24LC00-SN 19 1 IS61LV5128AL TSOP44 512KX8-SRAM U15 ISSI IS61LV5128AL-10 20 1 AT25F512N SOIC8 SPI-FLASH-512KB U12 ATMEL AT25F512N-10SI-2 21 1 LTC1877 SOIC8 600MA ADJ SWITCHING REG VR5 LINEAR TECH LTC1877EMS8 A-2 ADSP-21262 EZ-KIT Lite Evaluation System Manual C37–38 AVX 12065A102JAT2A 23 8 2200pF 50V 5% 1206 NPO C67–74 AVX 12065A222JAT05 24 1 ADM708SAR SOIC8 VOLTAGE-SUPERVISOR U22 ANALOG DEVICES ADM708SAR 25 1 ADP3339AKC-33 SOT-223 3.3V 1.5A REGULATOR VR2 ANALOG DEVICES ADP3339AKC-3.3 26 2 ADP3336ARM MSOP8 ADJ 500MA REGULATOR VR1,VR4 ANALOG DEVICES ADP3336ARM-RE 27 8 AD8606AR SOIC8 OPAMP U2,U4–9, U11 ANALOG DEVICES AD8606AR 28 1 ADSP-21262SKBC-200 BGA136 SHARC-EX-DSP U1 ANALOG DEVICES ADSP-21262SKBC 29 1 AD1835AAS MQFP52 U14 2IN-8OUT-96KHZ-CODEC ANALOG DEVICES AD1835AAS 30 5 RUBBER FEET BLACK MH1–5 MOUSER 517-SJ-5018BK 31 1 PWR 2.5MM_JACK CON005 RA J7 SWITCHCRAFT SC1152-ND12 32 1 USB 4PIN CON009 USB P4 MILL-MAX 897-30-004-90-00 33 1 RCA 4X2 CON011 RA J5 SWITCHCRAFT PJRAS4X2U01 34 1 RCA 1X1 CON012 BLK P1 SWITCHCRAFT PJRAN1X1U01 ADSP-21262 EZ-KIT Lite Evaluation System Manual Part Number Manufacturer 1000pF 50V 5% 1206 CERM Description 2 Quantity 22 Reference Reference Design Bill Of Materials A-3 Part Number Manufacturer Reference Design Description Quantity Reference 35 5 SPST-MOMENTARY SWT013 6MM SW1–5 PANASONIC EVQ-PAD04M 36 3 0.05 45X2 CON019 SMT SOCKET J1–3 SAMTEC SFC-145-T2-F-D-A 37 1 DIP8 SWT016 SW11 C&K CKN1365-ND 38 1 DIP6 SWT017 SW8 DIG01 CKN1364-ND 39 4 DIP4 SWT018 4PIN-SMT-SWT SW6–7, SW9–10 DIG01 CKN1363-ND 40 1 RCA RCA_1X2 CON031 RA J4 SWITCHCRAFT PJRAS1X2S02 41 2 0.00 1/8W 5% 1206 R82,R91 YAGEO 0.0ECT-ND 42 10 AMBER-SMT LED001 GULL-WING LED1–8, LED11,LED13 PANASONIC LN1461C-TR 43 8 C104,C106,C108, C110,C11,C114, AVX 08055A331JAT 44 18 0.01uF 100V 10% 805 CERM C66, C75, C79, C85, C122, C127, C153, C155, C157–164, C166, C182 AVX 08051C103KAT2A 45 8 C77,C87,C99–102, C111,C131 AVX 08053C224FAT 46 27 0.1uF 50V 10% 805 CERM C47,C57,C59, C120–121, C132–133 AVX 08055C104KAT A-4 330pF 50V 5% 805 NPO 0.22uF 25V 10% 805 CERM ADSP-21262 EZ-KIT Lite Evaluation System Manual 47 4 48 0.001uF 50V 5% 805 NPO Part Number Manufacturer Reference Design Description Quantity Reference Bill Of Materials C82–83,C88,C98 AVX 08055A102JAT2A 44 10K 100MW 5% 805 R4, R17, R63–64, R66, R70–71, R74–78, R90, R92, R96–102, R107–108, AVX CR21-103J-T 49 4 33 100MW 5% 805 R68,R81,R109,R135 AVX CR21-330JTR 50 3 4.7K 100MW 5% 805 R72,R95,R176 AVX CR21-4701F-T 51 1 680 100MW 5% 805 R137 AVX CR21-6800F-T 52 1 1M 100MW 5% 805 R168 AVX CR21-1004F-T 53 1 475 100MW 5% 805 R125 AVX CR21-471J-T 54 1 1.5K 100MW 5% 805 R105 AVX CR21-1501F-T 55 2 2.00K 1/8W 1% 1206 R3,R5 DALE CR32-2001F-T 56 10 49.9K 1/8W 1% 1206 R114–115, R117–124 AVX CR32-4992F-T 57 2 R93–94 AVX CR32-2211F-T 58 12 100pF 100V 5% 1206 NPO C2–12,C64 AVX 12061A101JAT2A 59 2 10uF 16V 10% B TANT CT13–14 AVX TAJB106K016R 60 4 100 100MW 5% 805 R185–188 AVX CR21-101J-T 61 2 301 1/4W 1% 1206 R1–2 BOURNS CR1206-FX-3010 2.21K 1/8W 1% 1206 ADSP-21262 EZ-KIT Lite Evaluation System Manual A-5 Part Number Manufacturer Reference Design Description Quantity Reference 62 9 220pf 50V 10% 1206 NPO C183 AVX 12061A221JAT2A 63 2 2A S2A_RECT DO-214AA SILICON RECTIFIER D1–2 GENERALSEMI S2A 64 7 600 100MHZ 500MA 1206 0.70 BEAD FER1–2,FER4–8 DIGI-KEY 240-1019-1-ND 65 4 237 1/8W 1% 1206 R13–14,R18,R20 AVX CR32-2370F-T 66 2 750K 1/8W 1% 1206 R11,R116 DALE/VISH CRCW12067503F AY 67 4 5.76K 1/8W 1% 1206 R6,R10,R19,R22 PHYCOMP 9C12063A5761FK 68 10 11.0K 1/8W 1% 1206 R47,R49–50, R52–53,R55–56, R58, R113,R136 DALE CRCW12061102F 69 1 68NF 50V 10% 805 C65 MURRATA GRM40X7R683K0 70 7 1UF 16V 10% 805 X7R C1,C39,C44,C48, C56,C58,C61 MURATA GRM40X7R105K0 71 1 75 1/8W 5% 1206 R112 PHILIPS 9C12063A75R0JL 72 3 30PF 100V 5% 1206 C55 AVX 12061A300JAT2A 73 1 10 100MW 5% 805 R150 DALE CRCW0805-10R0 74 1 249K 1/10W 1% 805 R86 DALE CRCW0805-2493 75 1 124K 1/10W 1% 805 R83 DALE CRCW0805-1243F 76 12 680PF 50V 1% 805 NPO C76,C80–81,C89, C103,C105,C107 AVX 08055A681FAT2A A-6 ADSP-21262 EZ-KIT Lite Evaluation System Manual Part Number Manufacturer Reference Design Description Quantity Reference Bill Of Materials 77 3 10UF 25V +80-20% 1210 Y5V C46,C49,C60 MURATA GRM235Y.5V106Z 78 8 2.74K 1/8W 1% 1206 R140–147 DALE CRCW12062741F 79 20 5.49K 1/8W 1% 1206 R7,R15–16,R21, R25,R28,R31,R34, PANASONIC ERJ-8ENF5491V 80 8 R23,R26,R29,R32, R35,R38,R41, PANASONIC ERJ-8ENF1651V 81 10 10UF 16V 20% CAP002 ELEC CT1–9,CT12 DIG01 82 2 68UF 25V 20% CAP003 ELEC CT10–11 PANASONIC EEV-FC1E680P 83 1 10UH 47 +/-20 IND001 L1 DIG01 445-1202-2-ND 84 7 0.00 100MW 5% 805 R192 VISHAY CRCW0805 0.0 R 85 1 190 100MHZ 5A FER002 FER3 MURATA DLW5BSN191SQ2 86 8 3.32K 100MW 1% 805 R24,R27,R30,R33, R36,R39,R42, DIG01 P3.32KCCTR-ND 87 4 1.2K 1/10W 5% 805 R155–158 DALE CRCW08051201F 88 9 10UF 6.3V 10% 805 C184–185 AVX 080560106KAT2A 89 3 6.04K 100MW 1% 805 R65,R148–149 DIGI-KEY 311-6.04KCCT-ND 90 7 0.1UF 10V 10% 402 C41,C128–129, C136 AVX 0402ZD104KAT2A 91 5 0.01UF 16V 10% 402 C134,C138,C147, C149,C151 AVX 0402YC103KAT2A 1.65K 1/8W 1% 1206 ADSP-21262 EZ-KIT Lite Evaluation System Manual PCE3062TR-ND A-7 Part Number Manufacturer Reference Design Description Quantity Reference 92 8 1000PF 50V 5% 402 CERM C130,C135,C137, C139,C143,C146, AVX 04025C102JAT2A 93 2 64.9K 1/10W 1% 805 R67,R87 VISHAY INTERTEC CRCW08056492F 94 2 210K 1/4W 1% 805 R69,R88 VISHAY INTERTEC CRCW08052103F 95 1 1A SK12 DO-214AA SCHOTTKY D3 MCC SK12 96 21 10PF 50V 5% 805 NPO C21–25,C27–36, C42–43,C123–126 AVX 08055A100JAT2A 97 1 1K 1/8W 5% 1206 R106 AVX CR32-102J-T 98 1 100K 1/8W 5% 1206 R73 DALE CR1206-1003FRT 99 2 22 1/8W 5% 1206 R103–104 DALE CRCW1206220JR 100 12 270 1/8W 5% 1206 R138–139, R153–154, R177–184 AVX CR32-271J-T 101 2 RED-SMT LED001 GULL-WING LED9,LED12 PANASONIC LN1261C 102 1 GREEN-SMT LED001 GULL-WING LED10 PANASONIC LN1361C 103 8 604 1/8W 1% 1206 R127–134 DALE 104 4 1uF 25V 20% A TANT -55+125 CT15–18 PANASONIC ECS-T1EY105R 105 2 ADG774A QSOP16 QUICKSWITCH-257 U30–31 ANALOG DEV. A-8 CRCW12066040F ADG774ABRQ ADSP-21262 EZ-KIT Lite Evaluation System Manual Part Number Manufacturer Reference Design Description Quantity Reference Bill Of Materials 106 1 IDC 3X2 IDC3X2 P2 BERG 54102-T08-03 107 1 IDC 7X2 IDC7X2 HEADER P5 BERG 54102-T08-07 108 1 IDC 13X2 IDC13X2 P3 BERG 54102-T08-13 109 1 2.5A RESETABLE FUS001 F1 RAYCHEM CORP. SMD250-2 110 1 3.5MM STEREO_JACK CON001 J6 SHOGYO SJ-0359AM-5 ADSP-21262 EZ-KIT Lite Evaluation System Manual A-9 A-10 ADSP-21262 EZ-KIT Lite Evaluation System Manual A B C D 1 1 2 2 ADSP-21262 EZ-KIT Lite Schematic 3 3 DNP = Do Not Populate ANALOG DEVICES 4 Title Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - TITLE Board No. C Date 20 Cotton Road Rev A0174-2002 1.4 Sheet 11-7-2003_19:25 D 1 of 12 A B C D These capacitors were placed on the board due to a DSP anomaly. Please refer to the DSP anomaly sheet for more information. SPICLK DAIP1_SPDIF_DATA DAIP3_SPDIF_SCK DAIP5_ADC_DATA DAIP7_ADC_BCLK DAIP9_DAC_D4 DAIP11_DAC_D2 DAIP13_DAC_BCLK DAIP15_SPDIF_SPI_CS DAIP17_AUDIO_OSC DAIP19_SW3 DAIP2_SPDIF_MCLK DAIP4_SPDIF_FSYNC DAIP6_AD1835_MCLK DAIP8_ADC_LRCLK DAIP10_DAC_D3 DAIP12_DAC_D1 DAIP14_DAC_LRCLK DAIP16_SPDIF_GPO0 DAIP18_SPDIF_IN DAIP20_SW4 C42 10PF 805 C34 10PF 805 C36 10PF 805 C31 10PF 805 C33 10PF 805 C35 10PF 805 C43 10PF 805 C32 10PF 805 C30 10PF 805 C24 10PF 805 C126 10PF 805 C124 10PF 805 C27 10PF 805 C23 10PF 805 C125 10PF 805 C28 10PF 805 C29 10PF 805 C25 10PF 805 C123 10PF 805 C22 10PF 805 C21 10PF 805 3.3V 3.3V_DSP 1.2V_DSP 1.2V 1 1 D3 SK12 1A DO-214AA R79 0.00 805 R80 0.00 805 3.3V_DSP 3.3V U1 U1 AD[0:15] R152 10K 805 DSP OSC R68 33 805 U16 1 OE OUT 5 DSP_CLKIN 25MHZ OSC001 2 3.3V AD0 M1 AD1 L2 AD2 L1 AD3 K1 R75 10K 805 R71 10K 805 DAIP1/SD0A DAIP2/SD0B AD5 J1 AD6 H1 AD7 G1 AD8 N6 AD9 P6 AD10 P5 AD11 P4 AD12 P3 AD13 P2 AD14 P1 AD15 N1 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 N3 RD M2 WE WR N2 ALE ALE B3 VDDEXT1 B8 VDDEXT2 G13 VDDEXT3 H2 VDDEXT4 N5 VDDEXT5 N9 VDDEXT6 DAIP2_SPDIF_MCLK P8 DAIP3/SCLK0 N10 DAIP4/SFS0 P9 DAIP5/SD1A P10 DAIP6/SD1B P11 DAIP7/SCLK1 P12 DAIP8/SFS1 P13 DAIP9/SD2A N14 DAIP10/SD2B P14 DAIP11/SD3A M13 DAIP12/SD3B M14 DAIP13/SCLK23 L14 DAIP14/SFS23 K14 DAIP15/SD4A J14 DAIP16/SD4B H14 DAIP17/SD5A H13 DAIP18/SD5B G14 DAIP19/SCLK45 F14 DAIP20/SFS45 AD2 J2 DAIP1_SPDIF_DATA N8 AD1 AD4 RD R77 10K 805 P7 AD0 DAIP3_SPDIF_SCK DAIP4_SPDIF_FSYNC 1.2V_DSP DAIP5_ADC_DATA DAIP6_AD1835_MCLK D11 GND16 D13 GND17 E2 GND18 E4 GND19 E5 GND20 E6 GND21 DAIP7_ADC_BCLK E9 GND22 DAIP8_ADC_LRCLK DAIP9_DAC_D4 DAIP10_DAC_D3 DAIP11_DAC_D2 DAIP12_DAC_D1 3.3V DAIP13_DAC_BCLK DAIP14_DAC_LRCLK DAIP15_SPDIF_SPI_CS Place as close as possible to pin B07 and B06 of DSP DAIP16_SPDIF_GPO0 DAIP17_AUDIO_OSC R78 10K 805 DAIP18_SPDIF_IN R150 10 805 DAIP19_SW3 DAIP20_SW4 A12 VDDINT1 B11 VDDINT2 C14 VDDINT3 D1 VDDINT4 D14 VDDINT5 E1 VDDINT6 G2 VDDINT7 J13 VDDINT8 K2 VDDINT9 N4 VDDINT10 N7 VDDINT11 N11 VDDINT12 N12 VDDINT13 E10 GND23 E11 GND24 E13 GND25 F4 GND26 2 F5 GND27 F6 GND28 F9 GND29 F10 GND30 F11 GND31 J4 GND32 J5 GND33 J6 GND34 J9 GND35 J10 A8 EMU A3 TMS TMS A4 TCK TCK B5 TRST TRST A5 TDI CLKOUT R72 4.7K 805 B4 DSP_CLKIN FLAG1_SW1 FLAG2_SW2 R158 1.2K 805 FLAG3_AD1835_SPI_CS 1 R156 1.2K 805 R155 1.2K 805 8 2 7 3 6 4 5 2 3 4 RESET R157 1.2K 805 SW10 A1 CLKCFG0 B1 CLKCFG1 B10 C144 0.1UF 402 FLAG0_SPI_FLASH_CS ON XTAL SWT018 DIP4 ADSP-21262SKBC-200 BGA136 R159 10K 805 R160 10K 805 R161 10K 805 SW10: BOOT/CLOCK RATIO SELECT (Default: 1=ON, 2=OFF, 3=ON, 4=OFF) 1 2 BOOTCFG0 BOOTCFG1 BOOTMODE OFF OFF SPI SLAVE BOOT ON OFF SPI MASTER BOOT OFF ON PARALLEL PORT BOOT ON ON RESERVED 3 4 CLOCK RATIO CLKCFG0 CLKCFG1 CORE:CLKIN OFF OFF 3:1 ON OFF 16:1 OFF ON 8:1 ON ON RESERVED R162 10K 805 C45 0.1UF 805 DNP 3.3V_DSP 1.2V_DSP 3.3V C140 0.1UF 402 4 C146 1000PF 402 C139 1000PF 402 C137 1000PF 402 C150 1000PF 402 C138 0.01UF 402 C149 0.01UF 402 C129 0.1UF 402 C136 0.1UF 402 C145 10UF 805 C135 1000PF 402 C143 1000PF 402 C154 1000PF 402 C130 1000PF 402 C151 0.01UF 402 C134 0.01UF 402 C128 0.1UF 402 C142 0.1UF 402 A13 GND1 A14 GND2 B2 GND3 B12 GND4 B13 GND5 B14 GND6 C3 GND7 C12 GND8 C13 GND9 D2 GND10 D4 GND11 D5 GND12 D6 GND13 D9 GND14 D10 GND15 K9 GND41 K10 GND42 K11 GND43 K13 GND44 L4 GND45 L5 GND46 L6 3 GND47 L9 GND48 L10 GND49 L11 GND50 L13 GND51 M3 GND52 M12 GND53 N13 GND54 DNP = Do Not Populate ANALOG DEVICES Date 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - DSP Board No. C C K6 GND40 DEFAULT Size ADSP-21262 B GND39 DEFAULT C26 10UF 805 OSC A K4 GND38 ADSP-21262SKBC-200 BGA136 Title ADSP-21262 J11 GND37 K5 C147 0.01UF 402 SPIDS C2 BOOTCFG0 C1 BOOTCFG1 CLKIN A2 RESET B7 AVDD B6 AVSS SPICLK 1 3 3.3V MOSI F2 FLAG0 F1 FLAG1 F13 FLAG2 E14 FLAG3 TDO A6 DSP_CLKOUT MISO TDI A7 TDO GND36 A10 MISO A9 MOSI B9 SPICLK A11 SPIDS EMU Rev A0174-2002 1.4 Sheet 1-23-2004_12:23 D 2 of 12 A B C D 3.3V R163 10K 805 U25 16 VCC Y0 Y1 1 A[21:23] VALID DSP ADDRESS BANK END A23 START END ADDRESS 1A0 0000 X 1FF FFFF 1 180 0000 X 19F FFFF 1 160 0000 X 17F FFFF 0 140 0000 140 0000 15F FFFF 0 120 0000 127 FFFF 13F FFFF 0 100 0000 10F FFFF 11F FFFF 0 A21 1 A22 2 A23 3 A Y2 B Y3 C Y4 Y5 Y6 6 G1 Y7 15 FLASH_CS 14 SRAM_CS 13 LED_CS 12 EXP_CS1 11 A22 0 1 1 0 0 A21 BANK 0 1 0 1 0 Y4 Y3 Y2 Y1 Y0 DEVICE NONE EXPANSION INTERFACE CS 2 EXPANSION INTERFACE CS 1 LEDs SRAM FLASH 3.3V 1 3.3V R66 10K 805 EXP_CS2 10 SPI Flash 512Kb R64 10K 805 U12 9 7 7 8 VCC 6 2 SO HOLD 4 G2A 5 G2B GND 8 SPICLK SCK MOSI 74LVC138AD SOIC16 MISO 5 SI 1 FLAG0_SPI_FLASH_CS CS 3 RESET 4 GND WP AT25F512N SOIC8 3.3V SRAM 4Mb (512K x 8-bit) U21 2 AD[0:15] AD0 3 AD1 4 AD2 7 AD3 8 AD4 13 AD5 14 AD6 17 AD7 18 U15 2 1Q 5 2Q 6 3Q 9 4Q 12 5Q 15 6Q 16 7Q 19 8Q 1D 2D 3D 4D 5D 6D 7D 8D A8 A[8:23] AD8 AD[8:15] A9 AD9 A10 AD10 A11 AD11 A12 AD12 A13 AD13 A14 AD14 A15 AD15 A8 A[8:19] 11 ALE LE 20 A9 10 A10 VCC 1 OE GND A11 74LVC373APW TSSOP20 A12 A13 A14 A15 U18 A16 A17 AD8 3 3 2 1Q 5 2Q 6 3Q 9 4Q 12 5Q 15 6Q 16 7Q 19 8Q 1D AD9 4 AD10 7 AD11 8 2D 3D 4D AD12 13 AD13 14 AD14 17 AD15 5D 6D 7D 18 Flash 8Mb (1M x 8-bit) 8D A16 A18 A17 3 A0 4 A1 5 A2 6 A3 7 A4 16 A5 17 A6 18 A7 19 A8 20 A9 26 A10 27 A11 28 A12 29 A13 30 A14 38 A15 39 A16 40 A17 41 A18 U19 9 AD0 AD8 21 10 AD1 AD9 20 13 AD2 AD10 19 14 AD3 AD11 18 31 AD4 AD12 17 32 AD5 AD13 16 35 AD6 AD14 15 36 AD7 AD15 14 D0 D1 D2 D3 D4 D5 D6 D7 A19 A19 25 NC/A19 AD[8:15] A8 A[8:20] 1 A9 2 A10 21 A11 22 A12 23 A13 24 A14 NC1 NC2 NC3 NC4 NC5 NC6 42 NC7 3.3V A15 43 A16 44 A17 NC8 NC9 A18 11 VDD1 A18 AD[0:7] A19 A21 A22 RD A23 WE 11 LE 1 27 AD2 28 A3 D3 AD3 A4 D4 32 AD4 A5 D5 33 AD5 34 AD6 A7 8 A8 7 A9 36 A10 6 A11 5 A12 4 A13 3 A14 2 A15 1 A16 40 A17 13 A18 37 A19 D7 35 AD7 AD[0:7] 2 11 NC1 29 NC2 12 RY/BY 10 RESET RESET 3.3V 31 VCC1 30 VCC2 3 GND1 34 GND2 22 FLASH_CS CE 24 RD OE 9 WE VSS1 VSS2 39 23 AM29LV081B-120EC TSOP40 10 OE AD1 IS61LV5128AL TSOP44 20 VCC D2 NC/A20 AD0 26 12 WE ALE A2 D6 A20 SRAM_CS D1 A6 38 25 D0 A1 33 VDD2 A20 8 CE 37 OE 15 WE A0 GND 74LVC373APW TSSOP20 3.3V 3.3V 3.3V 3.3V 3.3V 3.3V DNP = Do Not Populate 4 C163 0.01UF 805 C127 0.01UF 805 C160 0.01UF 805 C158 0.01UF 805 C141 0.1UF 805 C153 0.01UF 805 C156 0.1UF 805 ANALOG DEVICES C157 0.01UF 805 Title 74LVC138 AT25F512 74LVC373 74LVC373 IS61LV5128 Size AM29LV081 A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - MEMORY Board No. C Date 20 Cotton Road Rev A0174-2002 1.4 Sheet 1-23-2004_13:10 D 3 of 12 C D DAC4 DAC4 DAC3 ADC DAC2 B DAC1 A LEFT (WHITE) RIGHT (RED) IN (J4) 1 OUT (J5) OUT (J6) 3.3V 3.3V 1 AUDIO OSC AD1835 AUDIO CODEC R74 10K 805 R70 10K 805 R81 33 805 U17 U14 ADCLN ALRCLK ADCLP ADC_DATA ASDATA ADCRN 22 38 OUTRP1 DLRCLK OUTRN1 37 DBCLK DAIP14_DAC_LRCLK 41 DAIP12_DAC_D1 DSDATA1 42 DAIP11_DAC_D2 43 DSDATA2 DAIP10_DAC_D3 DAIP9_DAC_D4 DSDATA4 3.3V 47 CIN OUTRN3 COUT OUTLP3 CCLK OUTLN3 50 51 SPICLK DAC2 OUTLP2 12 OUTLN2 5 MASTER_SLAVE ADC_DATA 28 OFF = AD1835 is SLAVE ON = AD1835 is MASTER 4 Disconnects ADC_DATA signal from driving the corrisponding DAI signal. Useful if using this DAI pin for another purpose. OUTRP3 27 OUTRN3 26 DAC3 OUTLP3 25 2 3 MCLK 3 MISO OUTRN2 13 OUTRP3 MOSI OUTRP2 14 OUTLN2 4 DAIP17_AUDIO_OSC SW7: CODEC SETUP SWITCH (Default: 1=OFF, 2=ON, 3=ON, 4=ON) Connects or disconnects the audio oscillator 1-2 depending on how the system is setup. See users manual for more information. OUTLN1 15 OUTRP2 6 SWT018 DIP4 DAC1 OUTLP1 6 OUTLP2 2 DAIP6_AD1835_MCLK OUTRN1 7 OUTRN2 R76 10K 805 DAIP5_ADC_DATA DSDATA3 44 3 DAIP6_AD1835_MCLK OUTRP1 8 OUTLN1 ADC ADCRP 9 OUTLP1 12.288MHZ OSC003 ADCRN 23 ADCRP DAIP13_DAC_BCLK ADCLP 7 4 49 ADCLN 21 8 2 3 ABCLK 46 ON DAIP7_ADC_BCLK DAIP8_ADC_LRCLK 20 2 45 SW7 1 3 OUT 1 1 OE OUTLN3 2 FLAG3_AD1835_SPI_CS CLATCH 34 OUTRP4 33 OUTRN4 MASTER_SLAVE ~M/S OUTRN4 32 OUTLP4 36 DAC4 OUTLP4 31 OUTLN4 R148 6.04K 805 OUTRP4 OUTLN4 2 5V 4 RESET 3.3V 17 PD/RST FILTD 18 1 AD8606AR SOIC8 A5V ODVDD AVDD1 AVDD2 1 DVDD1 39 AVDD3 3 52 11 19 CT14 10UF B 29 C120 0.1UF 805 CT13 10UF B C121 0.1UF 805 R149 6.04K 805 DVDD2 AGND1 40 AUDIO_VREF_ADC 3 FILTR 48 U11 R65 6.04K 805 DGND1 AGND2 DGND2 AGND3 AGND4 16 6 U11 24 7 AUDIO_VREF_DAC AGND 3 SW11 5 AD8606AR SOIC8 35 1 AIN_LEFT AIN_RIGHT 15 3 14 4 13 5 12 6 11 7 10 8 9 4 5 6 7 AGND 16 2 3 AD1835AAS MQFP52 ON 30 2 AGND6 Loopback Test Switch (Default= All OFF) For Test Purposes Only 10 1 AGND5 5 AOUT1_LEFT AOUT1_RIGHT AOUT2_LEFT AOUT2_RIGHT AOUT3_LEFT AOUT3_RIGHT AOUT4_LEFT 8 AOUT4_RIGHT SWT016 DIP8 5V_B 3.3V A5V 5V A5V A5V 3.3V FER8 600 1206 DNP = Do Not Populate C41 0.1UF 402 C155 0.01UF 805 C148 0.1UF 805 4 C152 0.1UF 805 C132 0.1UF 805 C133 0.1UF 805 C131 0.22UF 805 ANALOG DEVICES R151 0.00 805 Title OSC AD1835 AD1835 AGND AGND AGND AD1835 AD8606 Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - ANALOG AUDIO Board No. C Date 20 Cotton Road Rev A0174-2002 1.4 Sheet 11-7-2003_18:38 D 4 of 12 A B C D 1 1 R46 5.49K 1206 R58 11.0K 1206 R40 5.49K 1206 C11 100PF 1206 R45 3.32K 805 R55 11.0K 1206 OUTLN1 C9 100PF 1206 R39 3.32K 805 OUTLN2 C112 330PF 805 6 C20 DNP 805 DAC1 LEFT C114 330PF 805 U9 7 DAC2 LEFT 5 R57 5.49K 1206 C103 680PF 805 R44 1.65K 1206 AD8606AR SOIC8 R127 604 1206 OUTLP1 J5 4X2 CON011 CT9 10UF CAP002 AOUT1_LEFT R140 2.74K 1206 C90 220PF 1206 AUDIO_VREF_DAC C18 DNP 805 7 5 R54 5.49K 1206 C105 680PF 805 R38 1.65K 1206 AD8606AR SOIC8 R129 604 1206 OUTLP2 J5 4X2 CON011 CT7 10UF CAP002 2 AOUT2_LEFT R142 2.74K 1206 3 C68 2200PF 1206 U8 6 R118 49.9K 1206 C92 220PF 1206 AUDIO_VREF_DAC 5 6 R120 49.9K 1206 C70 2200PF 1206 2 2 AGND R43 5.49K 1206 R56 11.0K 1206 R42 3.32K 805 AGND R37 5.49K 1206 C10 100PF 1206 R53 11.0K 1206 OUTRN1 C19 DNP 805 DAC1 RIGHT 2 C106 330PF 805 U9 1 DAC2 RIGHT 3 R62 5.49K 1206 C113 680PF 805 R41 1.65K 1206 AD8606AR SOIC8 OUTRP1 R128 604 1206 J5 4X2 CON011 CT8 10UF CAP002 AOUT1_RIGHT R141 2.74K 1206 AUDIO_VREF_DAC A5V C8 100PF 1206 OUTRN2 C104 330PF 805 3 R36 3.32K 805 C91 220PF 1206 R117 49.9K 1206 1 3 3 R61 5.49K 1206 C115 680PF 805 R35 1.65K 1206 AD8606AR SOIC8 R130 604 1206 OUTRP2 J5 4X2 CON011 CT6 10UF CAP002 1 AOUT2_RIGHT R143 2.74K 1206 3 C67 2200PF 1206 C17 DNP 805 U8 2 AUDIO_VREF_DAC C93 220PF 1206 4 6 C69 2200PF 1206 R119 49.9K 1206 A5V AGND AGND DNP = Do Not Populate C100 0.22UF 805 4 ANALOG DEVICES C99 0.22UF 805 Title AGND AGND AD8606 AD8606 Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - AUDIO OUT 1 Board No. C Date 20 Cotton Road Rev A0174-2002 1.4 Sheet 8-19-2003_22:57 D 5 of 12 A B C D 1 1 R34 5.49K 1206 R52 11.0K 1206 R28 5.49K 1206 C7 100PF 1206 R33 3.32K 805 R49 11.0K 1206 OUTLN3 C5 100PF 1206 R27 3.32K 805 OUTLN4 C116 330PF 805 6 C16 DNP 805 DAC3 LEFT C118 330PF 805 U7 7 DAC4 LEFT 5 R51 5.49K 1206 C107 680PF 805 R32 1.65K 1206 AD8606AR SOIC8 R131 604 1206 OUTLP3 J5 4X2 CON011 CT5 10UF CAP002 AOUT3_LEFT U6 6 C14 DNP 805 7 5 R48 5.49K 1206 C109 680PF 805 R26 1.65K 1206 AD8606AR SOIC8 R133 604 1206 J5 4X2 CON011 CT3 10UF CAP002 OUTLP4 8 AOUT4_LEFT 11 AOUT4_LEFT_HP R144 2.74K 1206 C94 220PF 1206 AUDIO_VREF_DAC R146 2.74K 1206 9 C72 2200PF 1206 R122 49.9K 1206 C96 220PF 1206 AUDIO_VREF_DAC 12 R124 49.9K 1206 C74 2200PF 1206 2 2 AGND R31 5.49K 1206 R50 11.0K 1206 R30 3.32K 805 AGND R25 5.49K 1206 C6 100PF 1206 R47 11.0K 1206 OUTRN3 C4 100PF 1206 OUTRN4 C108 330PF 805 C15 DNP 805 DAC3 RIGHT 3 R24 3.32K 805 2 C110 330PF 805 U7 1 DAC4 RIGHT 3 R60 5.49K 1206 C117 680PF 805 R29 1.65K 1206 AD8606AR SOIC8 OUTRP3 R132 604 1206 J5 4X2 CON011 CT4 10UF CAP002 AOUT3_RIGHT C13 DNP 805 U6 2 1 3 3 R59 5.49K 1206 C119 680PF 805 R23 1.65K 1206 AD8606AR SOIC8 R134 604 1206 OUTRP4 J5 4X2 CON011 CT2 10UF CAP002 7 AOUT4_RIGHT 10 AOUT4_RIGHT_HP R145 2.74K 1206 AUDIO_VREF_DAC A5V C95 220PF 1206 R147 2.74K 1206 9 C71 2200PF 1206 R121 49.9K 1206 AUDIO_VREF_DAC C97 220PF 1206 AGND A5V 12 C73 2200PF 1206 R123 49.9K 1206 AGND DNP = Do Not Populate C102 0.22UF 805 4 ANALOG DEVICES C101 0.22UF 805 Title AGND AGND Size AD8606 AD8606 C Date A B C 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - AUDIO OUT 2 Board No. Rev A0174-2002 1.4 Sheet 8-19-2003_22:57 D 6 of 12 A B C D R1 301 1206 VREF_MIC_L J4 RCA_1X2 CON031 2 1 CT12 10UF CAP002 FER7 600 1206 R136 11.0K 1206 R16 5.49K 1206 R21 5.49K 1206 AIN_LEFT 3 C80 680PF 805 C2 100PF 1206 6 C89 680PF 805 1 R18 237 1206 U5 AGND 7 ADCLN AGND 5 AUDIO_VREF_ADC AD8606AR SOIC8 R22 5.76K 1206 C88 0.001UF 805 R19 5.76K 1206 1 3 AOUT4_RIGHT_HP AD8532AR SOIC8 C12 100PF 1206 DNP C86 120PF 1206 ADC LEFT C98 0.001UF 805 J6 2 DAC4 HEADPHONE OUT AGND R11 750K 1206 R20 237 1206 U5 4 7 5 5 AOUT4_LEFT_HP 1 1 AD8532AR SOIC8 ADCLP 3 AUDIO_VREF_ADC 3 CT10 68UF CAP003 U10 6 2 CT11 68UF CAP003 U10 2 CON001 R115 49.9K 1206 AD8606AR SOIC8 R114 49.9K 1206 AGND A5V 2 2 AGND C84 10UF 805 R2 301 1206 VREF_MIC_R J4 RCA_1X2 CON031 CT1 10UF CAP002 FER6 600 1206 1 R113 11.0K 1206 R7 5.49K 1206 AGND R15 5.49K 1206 AD8606 AIN_RIGHT 3 C76 680PF 805 C64 100PF 1206 2 C81 680PF 805 R14 237 1206 U2 AGND 2 1 ADCRN AGND AUDIO_VREF_ADC AD8606AR SOIC8 SW6 C3 100PF 1206 3 6 4 5 AIN_RIGHT AIN_LEFT VREF_MIC_L VREF_MIC_R SWT018 DIP4 R13 237 1206 U2 7 4 ADC RIGHT AGND WHEN USING AN ELECTRET MICROPHONE PLACE ALL SWITCHES IN ON POSITION 7 AUDIO_VREF_ADC AUDIO_VREF_ADC 8 2 3 C83 0.001UF 805 1 2 6 3 R3 2.00K 1206 AD8606AR SOIC8 ON R6 5.76K 1206 R116 750K 1206 AUDIO_VREF_ADC C82 0.001UF 805 DNP C78 120PF 1206 A5V 1 3 1 R10 5.76K 1206 A5V ELECTRET MICROPHONE ENABLE SWITCH (Default = All OFF) 3 3 A5V R5 2.00K 1206 U4 R12 0.00 805 ADCRP 5 AD8606AR SOIC8 AGND U4 6 R126 0.00 805 7 5 C87 0.22UF 805 C77 0.22UF 805 C111 0.22UF 805 DNP = Do Not Populate AD8606AR SOIC8 ANALOG DEVICES 4 AGND AGND AGND AGND AD8532 AD8606 AD8606 Title Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - HEADPHONE OUT Board No. C Date 20 Cotton Road Rev A0174-2002 1.4 Sheet 7-3-2003_17:09 D 7 of 12 A B C D 1 1 3.3V R63 10K 805 DNP R8 0.00 805 R98 10K 805 R17 47K 805 S/PDIF RX DAIP18_SPDIF_IN U3 P1 RCA CON012 1X1 SPDIF COAX INPUT C66 0.01UF 805 5 RXN R9 0.00 805 OLRCK 1 C188 0.01UF 805 3.3V 2 R4 0.00 805 SPDIF_SCK 28 2 C122 0.1UF 805 DNP 27 OSCLK A3.3V R112 75 1206 4 RXP0 3 RXP1 2 RXP2 1 RXP3 10 RXP4 11 RXP5 12 RXP6 13 RXP7 26 SDOUT SPDIF_SDATA R135 33 805 24 RMCK SPDIF_MCK SPDIF GPO1 25 OMCK LED11 AMBER-SMT LED001 16 CCLK_SCL SPICLK 15 CDIN_AD1 6 VA 7 AGND 8 FILT MISO 14 CS_ADO 20 GPO0 GPO1 21 18 GPO2_AD0 VL R137 270 805 SPDIF_SPI_CS U33 SPDIF_GPO0 19 SHGND 2 MOSI 17 CDOUT_SDA R125 3.01K 1206 3.3V SPDIF_FSYNC 11 10 TP8 74LVC14A SOIC14 23 VD C85 0.001UF 805 22 9 DGND C65 0.022UF 805 RST RESET CS8416-CS SOIC28 3 3 SW8 3 10 4 9 5 8 6 7 4 5 6 DAIP16_SPDIF_GPO0 11 3 DAIP3_SPDIF_SCK DAIP15_SPDIF_SPI_CS 2 2 DAIP1_SPDIF_DATA DAIP4_SPDIF_FSYNC ON 12 1 DAIP2_SPDIF_MCLK 1 SPDIF_MCK SPDIF_SDATA SPDIF_FSYNC SPDIF_SCK SPDIF_SPI_CS SPDIF_GPO0 SWT017 DIP6 A3.3V 3.3V FER1 600 1206 C187 0.1UF 805 C186 0.1UF 805 C79 0.001UF 805 C1 0.1UF 805 SW8: SPDIF SIGNAL DISABLE (Default: ALL = ON) Used to disconnect signals of the SPDIF inteface 1-6 from the corrisponding DAI signals. Useful if using DAI signals for another purpose. C75 10UF 1210 DNP = Do Not Populate ANALOG DEVICES 4 Title CS8416 Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - S/PDIF RX Board No. C Date 20 Cotton Road Rev A0174-2002 1.4 Sheet 1-28-2004_11:01 D 8 of 12 A B C D 3.3V 3.3V 3.3V R174 10K 805 RESET 3.3V 1 FLAG1 3.3V POWER R188 100 805 LED9 RED-SMT LED001 U33 1 SW1 SWT013 SPST-MOMENTARY LED10 GREEN-SMT LED001 1 2 74LVC14A SOIC14 R138 270 1206 CT18 1UF A R139 270 1206 R92 10K 805 RESET R96 10K 805 U22 1 MR 4 PFI SW5 SWT013 SPST-MOMENTARY RESET RESET PFO 8 RESET_TO_USB 7 RESET 5 U33 ADM708SAR SOIC8 3.3V 13 12 74LVC14A SOIC14 SOFT_RESET R173 10K 805 FLAG2 R187 100 805 U33 3 2 SW2 SWT013 SPST-MOMENTARY 4 2 74LVC14A SOIC14 CT17 1UF A 3.3V LEDs can be accessed as a memeory address, or directly as flags depending on the DSP settings. See SW9 Settings and the EZ-KIT Lite User Manual for more information. 3.3V R172 10K 805 DAIP19 3.3V U24 R186 100 805 5 AD0 AD[0:15] U33 AD1 6 AD2 SW3 SWT013 SPST-MOMENTARY 74LVC14A SOIC14 AD3 SW9 1 2 11 3 10 4 9 5 8 6 7 1 CT16 1UF A ON 12 2 3 3 FLAG1_SW1 R164 10K 805 AD4 AD5 FLAG2_SW2 AD6 DAIP19_SW3 4 AD7 DAIP20_SW4 5 6 4 9 4Q 12 5Q 15 6Q 3 16 7Q 19 8Q AD6 AD5 GND LED8 AMBER-SMT LED001 10 SN74AHC1G02 SOT23-5 AD3 AD2 AD1 AD0 LED7 AMBER-SMT LED001 LED6 AMBER-SMT LED001 LED5 AMBER-SMT LED001 LED4 AMBER-SMT LED001 LED3 AMBER-SMT LED001 LED2 AMBER-SMT LED001 LED1 AMBER-SMT LED001 R177 270 1206 R178 270 1206 R179 270 1206 R180 270 1206 R181 270 1206 R182 270 1206 R183 270 1206 R184 270 1206 SW9: PUSH BUTTON ENABLE SWITCH (Default = All ON, except position 5) Used to stop the pushbuttons from 1-4 driving the corrisponding DSP signal. Useful if using these DSP signals for another purpose. R185 100 805 5 Not Used 6 OFF = LEDs function as flags ON = LEDs are accessed at a memory address 3.3V 3.3V 3.3V 3.3V DNP = Do Not Populate ANALOG DEVICES U33 9 SW4 SWT013 SPST-MOMENTARY 8 74LVC14A SOIC14 C162 0.01UF 805 CT15 1UF A C164 0.01UF 805 C161 0.01UF 805 C182 0.01UF 805 Title Size SN74AHC1G02 74LVC373 ADM708 74LVC14A B C 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - USER IO/RESET Board No. C Date A AD4 20 VCC 74LVC373APW TSSOP20 R171 10K 805 4 6 3Q 11 LE 1 OE 2 3.3V DAIP20 5 2Q U26 1 WE 2 1Q AD7 LED_CS_SW SWT017 DIP6 LED_CS 3 1D 4 2D 7 3D 8 4D 13 5D 14 6D 17 7D 18 8D Rev A0174-2002 1.4 Sheet 1-23-2004_13:09 D 9 of 12 A B C D EXPANSION INTERFACE (TYPE A) 5V 3.3V 1.2V_DSP 3.3V 5V 1.2V All USB interface circuitry is considered proprietary and has been omitted from this schematic. 1 When designing your JTAG interface please refer to the Engineer to Engineer Note EE-68 which can be found at http://www.analog.com AD[0:15] J1 AD1 2 1 2 J2 1 J3 2 1 4 3 4 3 4 3 6 5 6 5 6 5 AD0 1 3.3V_DSP AD3 8 7 AD2 8 7 8 7 AD5 10 9 AD4 10 9 10 9 AD7 12 11 AD6 12 11 12 11 AD9 14 13 AD8 14 13 14 13 AD11 16 15 AD10 16 15 16 15 AD13 18 17 AD12 18 17 18 17 AD15 20 19 AD14 20 19 20 19 22 21 22 21 22 21 24 23 24 23 24 23 26 25 26 25 28 27 28 27 30 29 32 2 3 30 31 34 33 36 35 38 29 32 RESET 31 34 FLAG1_SW1 RESET 35 37 38 40 39 42 44 25 28 27 30 32 33 36 26 34 FLAG0_SPI_FLASH_CS 29 37 38 37 40 39 40 39 41 42 41 42 41 43 44 43 44 43 46 45 46 45 46 45 48 47 48 47 48 47 50 49 50 49 50 49 52 51 52 51 52 51 54 53 54 53 54 53 56 55 56 55 56 55 58 57 58 57 58 57 60 59 60 59 60 59 62 61 62 61 62 61 64 63 64 63 64 63 66 65 66 65 66 65 68 67 68 67 68 67 70 69 70 69 70 69 72 71 72 71 72 71 74 73 74 73 74 73 76 75 76 75 76 75 78 77 78 77 78 77 80 79 80 79 80 79 82 81 82 81 82 81 84 83 84 83 84 83 86 85 86 85 86 85 88 87 88 87 88 87 90 89 90 89 90 89 EXP_CS1 DAIP2_SPDIF_MCLK DAIP4_SPDIF_FSYNC DAIP6_AD1835_MCLK DAIP8_ADC_LRCLK DAIP10_DAC_D3 DAIP12_DAC_D1 DAIP14_DAC_LRCLK DAIP16_SPDIF_GPO0 DAIP18_SPDIF_IN DAIP20_SW4 SPIDS SPICLK 45X2 CON019 DAIP1_SPDIF_DATA DAIP3_SPDIF_SCK DAIP5_ADC_DATA DAIP7_ADC_BCLK DAIP9_DAC_D4 DAIP11_DAC_D2 DAIP13_DAC_BCLK DAIP15_SPDIF_SPI_CS ALE DAIP17_AUDIO_OSC DAIP19_SW3 JTAG HEADER P5 1 2 3 4 5 6 7 8 9 10 11 12 13 14 EMULATOR_SELECT DSP_CLKOUT EMULATOR_EMU EMULATOR_TMS EMULATOR_TCK EMULATOR_TRST EMULATOR_TDI 33 35 FLAG2_SW2 R176 4.7K 805 31 36 FLAG3_AD1835_SPI_CS 3.3V 2 EMULATOR_TDO IDC7X2 7X2 DAI HEADER P3 FLAG2_SW2 EXP_CS2 MISO MOSI 45X2 CON019 DAIP1_SPDIF_DATA RD DAIP3_SPDIF_SCK DAIP5_ADC_DATA WE DAIP7_ADC_BCLK DAIP9_DAC_D4 DAIP11_DAC_D2 DAIP13_DAC_BCLK DAIP15_SPDIF_SPI_CS DAIP17_AUDIO_OSC 45X2 CON019 DAIP19_SW3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 DAIP2_SPDIF_MCLK DAIP4_SPDIF_FSYNC 3 DAIP6_AD1835_MCLK DAIP8_ADC_LRCLK DAIP10_DAC_D3 DAIP12_DAC_D1 DAIP14_DAC_LRCLK DAIP16_SPDIF_GPO0 DAIP18_SPDIF_IN DAIP20_SW4 IDC13X2 13X2 SPI HEADER DNP = Do Not Populate ANALOG DEVICES P2 MOSI MISO 4 1 2 3 4 5 6 SPICLK SPIDS FLAG1_SW1 IDC3X2 3X2 Title NOTE: Must disable SW1 when using this pin as SPI select. See page 9 Size A B C Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - CONNECTORS Board No. C Date 20 Cotton Road Rev A0174-2002 1.4 Sheet 1-23-2004_12:23 D 10 of 12 A B C D 1 1 5V 5V_B UNREG_IN UNREG_IN UNREG_IN POWER IN F1 2.5A FUS001 FER3 CHOKE_COIL 4 3 1 2 D2 2A DO-214AA R82 0.00 1206 VR4 7 IN1 8 IN2 J7 VR1 7 IN1 8 IN2 1 OUT1 2 OUT2 3 1 C38 1000PF 1206 2 OUT3 D1 2A DO-214AA R73 100K 1206 C46 10UF 1210 C47 0.1UF 805 6 SD 5 FB GND 4 ADP3336ARM MSOP8 6 SD R88 210K 805 3 7.5V_POWER CON005 2.5MM_JACK C56 1UF 805 C52 10UF 805 C61 1UF 805 1 OUT1 2 OUT2 3 OUT3 5 FB GND 4 ADP3336ARM MSOP8 R69 210K 805 C39 1UF 805 C40 10UF 805 C44 1UF 805 R87 64.9K 805 C37 1000PF 1206 R67 64.9K 805 2 MH5 MH4 MH1 MH2 2 MH3 SHGND SHGND R192 0.00 805 3.3V TP5 FER2 600 1206 UNREG_IN UNREG_IN R191 DNP 805 3 INPUT VR5 6 VIN SYNC_MODE 3 7 C60 10UF 1210 FER5 600 1206 2 OUTPUT1 4 OUTPUT2 GND 1 1 RUN 4 GND R91 0.00 1206 VR2 C59 0.1UF 805 ADP3339AKC-33 SOT-223 C58 1UF 805 C57 0.1UF 805 5 SW SHGND PLL_LPF 8 2 ITH 3 3 VFB LTC1877 MSOP8 1.2V TP3 3.3V TP1 C48 1UF 805 1 IN1 SW 2 IN2 DRV 4 COMP FB R83 124K 805 6 C55 30PF 1206 5 R85 DNP 805 D4 1A DO-214AA DNP 4 R89 316K 805 DNP 7 GND2 C53 470PF 1206 DNP C54 DNP 805 R86 249K 805 C50 10UF 805 C51 10UF 805 C184 10UF 805 C183 220PF 1206 R84 20.0K 1206 DNP C185 10UF 805 ADP3088 REFERENCE POPULATION DESIGNATOR OPTION LTC1877 POPULATION OPTION (DEFAULT) R89 316K DNP VR3 ADP3088 DNP VR5 DNP LTC1877 R191 DNP DNP R192 DNP 0 D4 POP DNP R83 53.6K 124K TP7 R86 221K 249K C53 470pF DNP R84 20K DNP C183 10pF 220pF C55 470pF 30pF DNP = Do Not Populate ANALOG DEVICES Title Size Date B C 20 Cotton Road Nashua, NH 03063 4 PH: 1-800-ANALOGD ADSP-21262 EZ-KIT LITE - POWER Board No. C A TP4 8 3 GND1 ADP3088 MSOP8 DNP TP6 L1 10UH IND001 VR3 C49 10UF 1210 TP2 Rev A0174-2002 1.4 Sheet 1-23-2004_11:59 D 11 of 12 I INDEX Symbols ~LED_CS signal, 3-11 ~WE signal, 3-11 A abort, hang operations, 2-11 acknowledge, hang operation, 2-11 AD15-0 pins, 3-3 AD1835A audio codec, xiii, 2-3, 2-5, 3-6, 3-9 ADC_DATA pin, 3-10 configuration registers, 2-4 master mode, 2-4, 3-9 slave mode, 2-4, 2-5, 3-10 AD7-0 pins, 2-6, 3-11, 3-13 Add New Hardware Wizard, Windows 98, 1-8 ADSP-21262 processors boot mode, 3-11 CLKCFG1, CLKCFG0 pins, 3-3 core frequency, 3-3 core voltage, 3-2 external memory map, 2-2 flash memory, 2-2 internal memory restrictions, 2-2 IO voltage, 3-2 parallel port, 2-2, 2-7 SPI port, 2-4 SRAM memory, 2-2 analog audio interface, xii, 2-3 to-digital converters (ADCs), 2-3 audio applications, xiii in RCA connector (J4), 3-17 oscillator, 3-9 out RCA connector (J5), 3-17 B background telemetry channel (BTC), 2-8 bill of materials, A-1 boot code, 2-2 load, 2-8 mode, 3-3, 3-11 BOOTCFG pins, 3-11 breakpoints, 2-12 C chip select, 2-3, 3-18 clear, hang operations, 2-11 CLKIN pin, 3-3 clock ADSP-21262 EZ-KIT Lite Evaluation System Manual I-1 INDEX multiplier ratio, 3-11 routing, 3-9 signals, 3-9 codec setup switch (SW7), 3-9 common attributes, hardware breakpoints, 2-13 connecting, EZ-KIT Lite board, 1-5 connectors, 1-5, 3-15 J1 (expansion interface), 3-7 J2 (expansion interface), 3-7 J3 (expansion interface), 3-7 J4 (audio in RCA), 2-4, 3-17 J5 (audio out RCA), 2-4, 3-17 J6 (headphone out), 2-4, 3-17 J7 (power), 3-17 P1 (SPDIF In Coax), 3-18 P2 (SPI), 3-18 P3 (DAI), 3-18 P4 (USB), 1-6, 3-19 P5 (JTAG header), 3-19 P8 (JTAG), 3-7 contents, EZ-KIT Lite package, 1-1 conventions, manual, xxi core hang conditions, 2-11 CS8416, xiii, 2-5, 3-6, 3-10, 3-12, 3-14 customer support, xvi hardware breakpoints, 2-14 IO rate, 2-3 transfer, 3-9 Device Manager window, 1-16 digital audio interface (DAI), xiii, 3-14 to-analog converters (DACs), 2-3 DIP switches, 2-6, 3-8 also see SW DSP signals DAI pins, 3-11, 3-15 FLAG pins, 3-11, 3-15 D DAI header (P3), xiii, 3-18 pins, 2-6, 3-11, 3-15 port, 2-3, 2-5 data F features, EZ-KIT Lite board, xii FLAG pins, 2-7, 3-6, 3-14 FLAG0, 2-3 FLAG1, 3-18 FLAG10, 2-7 I-2 E electret microphone, 2-4, 3-9 electrostatic discharge, 1-2 enable attribute, 2-13 end address, attribute, 2-13 example programs, 2-7 exclusive, attribute, 2-13 expansion interface, xiii, 3-15 see also connectors external memory, 2-3, 3-7 EZ-KIT Lite board architecture, 3-2 boot modes, 3-11 features, xii ADSP-21262 EZ-KIT Lite Evaluation System Manual INDEX FLAG11, 2-7 FLAG12, 2-7 FLAG13, 2-7 FLAG14, 2-7 FLAG15, 2-7 FLAG3, 2-4 FLAG8, 2-7 FLAG9, 2-7 FLAG registers, 2-6, 3-13 flash memory, xiii, 2-3, 3-3, 3-6, 3-11 see also external memory Found New Hardware Wizard Windows 2000, 1-14 frame sync signals, 2-4, 2-5, 3-9 G general-purpose IO FLAG pins, 3-6 LEDs, 2-6, 3-3, 3-13 push buttons see push buttons global options, hardware breakpoints, 2-14 graphical user interface (GUI), 2-8 H hard reset, 2-8 hardware breakpoint, 2-12, 2-17 dialog box, 2-12 restrictions, 2-18 headphone out jack (J6), 3-17 Help, online, xix hung conditions, 2-11 I I2S mode, 2-3 ignore, hang operations, 2-11 installation, summary, 1-3 installing EZ-KIT Lite USB driver, 1-7 VisualDSP++ and EZ-KIT Lite license, 1-4 VisualDSP++ and EZ-KIT Lite software, 1-4 instruction hardware breakpoints, 2-15 interfaces see graphical user interface (GUI) internal memory, 3-7 interrupts, 2-6 IO FLAG pins, 3-6 voltage, 3-2 J J3-1 connectors, 3-15 JTAG connector (P5), 3-19 emulation port, 3-7 emulator, 3-19 ICE, xiii jumper settings, 1-5 L latch-enable pin (ALE), 2-6, 3-3, 3-11 latency, 2-18 LEDs, xiii, 1-5, 2-6, 3-11, 3-12 LED10, 1-6, 3-14 LED11, 1-15, 1-16, 2-5, 3-14 ADSP-21262 EZ-KIT Lite Evaluation System Manual I-3 INDEX LED12, 1-6, 3-14 LED13, 3-14 LED8-1 (general purpose), 3-13 LED9, 1-6, 3-14 license restrictions, 2-2 loop-back test switch (SW11), 3-12 M master input clock (MCLK), 2-4 memory bus (AD15-0), 3-3 restrictions, 2-2 mode, attribute, 2-13 O oscillator, 2-4, 3-3 P package contents, 1-1 parallel flash memory, 2-2 port, 2-2, 2-6, 3-3, 3-11 port boot, 3-3 PC configuration, 1-3 peripheral ports, xiv pins, 3-9 power connector (J7), 3-17 LED (LED10), 3-14 specifications, 3-18 supply, 3-18 PPFLGS bit, 2-7 I-4 processor external memory, see ADSP-21262 processors program memory, xii, 2-2 push buttons, xiii, 2-6, 3-12 see also SW SW1 (general input), 3-14, 3-15 SW2 (general input), 3-14, 3-15 SW3 (general input), 3-14, 3-15 SW4 (general input), 3-14, 3-15 SW5 (reset), 3-15 SW9 (enable), 3-10 R R79 resistor, 3-2 R80 resistor, 3-2 registering, this product, 1-2, 1-4 reset board, 2-8 hang operation, 2-11 processor, 3-14 push button (SW5), 3-15 retry, hang operation, 2-11 S Serial Peripheral Interconnect (SPI), xii, 3-6 serial port clock, 2-4 setting breakpoints, 2-18 EZ-KIT Lite hardware, 1-5 target options, 2-9 spacing headers, 3-18 SPDIF GPO1 LED (LED11), 3-14 ADSP-21262 EZ-KIT Lite Evaluation System Manual INDEX receiver, 2-4, 3-10 setup, 3-10 SPI flash memory, 2-2 header (P2), xiii, 3-18 master boot, 3-3 master mode, 3-11 SRAM memory, xiii, 2-2, 3-3 start address, attribute, 2-13 starting VisualDSP++, 1-16 SW10 switch, 3-3 SW11 switch, 3-12 SW6 switch, 3-9 SW7 switch, 3-9 SW8 switch, 3-10 SW9 switch, 3-15 system architecture, EZ-KIT Lite board, 3-2 requirements, PC, 1-3 T target options miscellaneous, 2-10 on emulator exit, 2-9 while target is halted, 2-9 target options dialog box, 2-9 time-division multiplexed mode (TDM), 2-3 U U24, LED latch, 3-11 USB cable, 1-2, 3-14, 3-15 connector (P4), 3-19 debug interface, 3-19 driver installation, Windows 2000, 1-12 driver installation, Windows 98, 1-8 driver installation, Windows XP, 1-13 interface, 3-7 interface chip (U34), 3-14, 3-15 monitor LED (LED13), 3-14 V verifying USB driver installation, 1-15 VisualDSP++ documentation, xix installation, 1-4 license, 1-4 online Help, xix requirements, 1-3 starting, 1-16 ADSP-21262 EZ-KIT Lite Evaluation System Manual I-5 INDEX I-6 ADSP-21262 EZ-KIT Lite Evaluation System Manual