ICs for Communications 1-Chip Car Radio TUA 4306 Specification 16.3.99 Edition 16.3.99 Published by Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73, 81541 München © Siemens AG 1995. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information describes the type of component and shall not be considered as assured characteristics. Terms of delivery and rights to change design reserved. For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies and Representatives worldwide (see address list). Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Siemens Office, Semiconductor Group. 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Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2 with the express written approval of the Semiconductor Group of Siemens AG. 1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered. Ausgabe 16.3.99 Herausgegeben von Siemens AG, Bereich Halbleiter, MarketingKommunikation, Balanstraße 73, 81541 München © Siemens AG 1995. Alle Rechte vorbehalten. Wichtige Hinweise! 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TUA 4306 Table of Contents Page 1 1.1 1.2 1.2.1 1.2.2 1.3 1.4 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 AM/FM-Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 FM-Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 FM-Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 FM-IF Demodulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Stereodecoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 AM Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 4.1 4.2 4.3 4.4 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 AM/FM-Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 FM-MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Stereodecoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 AM - MODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 5 Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 7 Blockdiagram 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 8 Blockdiagram 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 9 Blockdiagram 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 10 Blockdiagram 4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 11 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 12 Operational Range. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 13 AC / DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 14 Truthtables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 15 Test Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 16 Application Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 17 Diagram 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 18 Diagram 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 19 Diagram 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 Semiconductor Group i 16.3.99 Specification Last Edition: TUA 4306 DOK-Nr. V66047 from July 22nd 1998 Semiconductor Group 1 16.3.99 Specification 1 TUA 4306 Features 1.1 AM/FM-Receiver • High flexibility with an external preamplifier stage for AM and FM • Strictly symmetrical RF parts • Separate mixers for AM and FM mode • Sym. or asym. mixer inputs • Only one 2-pin-oscillator for the 1st LO; in AM mode the oscillator frequency is divided • 1st LO with LC-tank circuit • 1st LO at 100 MHz range • 1st LO decoupled counter output • 1st LO decoupled divided counter output • Improved low phase noise • FM/AM field strength output combined 1.2 FM-Mode 1.2.1 FM-Receiver In this mode, the receiverpart is comprised of a mixer, an oscillator, a prestage control and an IF post amplification. • Integrated AGC generation for PIN Diodes and MOSFETs • High level mixer input • High input/output 3rd order interceptpoint 1.2.2 FM-IF Demodulator The FM-IF-demodulator has been developed especially for car radio applications. • • • • • 7stage limiter amplifier Coincidence demodulator Field strength output (combined with AM) Fixed mute depth (with full muting typ 80dB) Multipath detector with analog output Semiconductor Group 2 16.3.99 Specification TUA 4306 1.3 Stereodecoder This part provides the stereo decoder function and noise blanking for FM car radio applications. • • • • • • • • • • • • Internal reference voltage source Adjustment free oscillator with ceramic resonator 456 kHz Pilot dependent mono/stereo switching with hysteresis Stereo indicator output Analog mono/stereo blend control (stereo noise control, SNC) Pilot canceller (19 kHz) Adjacent channel noise suppression (114 kHz) Mute facility Analog deemphasis control (high cut control, HCC) Interference noise detector with integrated high-pass filter (IF level signal or MPX input) MPX-input low-pass filter Noise blanking at MPX -demodulator outputs- L, R audio is common to AM Mode 1.4 AM Mode In this mode, the IC is comprised of a mixer, an oscillator with a divider by 4, 6, 8 or 10, a prestage control, 2nd mixer to convert the 1st IF to the 2nd IF, 2nd local force oscillator ( buffer for external source), automatic gain controlled amplifier and quasisynchronous demodulator. The same oscillator is used in AM and FM mode. • • • • • • 2nd mixer with force input for mixing frequency Output for AM IF counter Wide range 2nd IF AGC amplifier Quasi synchronous demodulator for AM mode Fast AM search tuning stop feature HCC for AM Semiconductor Group 3 16.3.99 Specification 2 TUA 4306 Pinning MQFP64-1 3 Pin Function Pin Function Pin Function 1 MP det in 23 IF amp bias 45 Deem L 2 MP det cap 24 IF amp in 46 AF out L 3 MP det out 25 +V rf 47 AF out R 4 AM seek m 26 GND rf 48 Vref H/S 5 AM IF count 27 SEL A 49 Contr. HCC 6 GND IF 28 SEL B 50 Contr. SNC 7 FM IF bias 29 1st mix out 51 Pil ind out 8 FM IF in 30 1st mix out 52 Pil det cap 9 AM IF bias 31 Pre cap AM 53 MPX in 10 AM IF in 32 Pre cap FM 54 Stereo PLL 11 AM IF bias 33 RF in FM 55 Stereo osc 12 2nd mix out 34 RF in FM 56 Iref stereo 13 2nd mix out 35 RF in AM 57 N det in 14 AM IF cap 36 RF in AM 58 MPX out 15 2nd LO 37 Vref RF 59 GND stereo 16 2nd mix in 38 1st LO 60 Mute FM 17 2nd mix in 39 1st LO 61 Dem FM 18 IF gain cap 40 Div count 62 Dem FM 19 IF amp out 41 Dir count 63 +Vif 20 V pre AM 42 Ng cap AM/FM 64 Fieldstr. 21 I pre FM 43 Nlev cap 22 IF gain adj 44 Deem R Ordering Information Type Package Ordering Code TUA 4306 MQFP-64-1 Q67037-A1009 Semiconductor Group 4 16.3.99 Specification 4. TUA 4306 Circuit Description General Description The TUA 4306 is a one chip car radio system consisting of AM/FM receiver, AM-Up/Down conversion, AGC amplifier / demodulator, FM-IF limiter amplifier / demodulator and stereodecoder / noiseblanker. 4.1 AM/FM-Receiver The AM/FM-receiver part includes a 2-pin varactor tuned oscillator. In the FM mode the direct oscillator frequency is fed into the double balanced FM mixer, in the AM mode the divided by 4, 6, 8 or 10 oscillator frequency is fed into the AM mixer. The two separate symmetrical input stages of the IC, one optimized for FM-, the other for AM- mode allow symmetrical and unsymmetrical prestage configuration. The AM and FM input frequencies are converted to a fix 1st IF in the 10.7 MHz range. The FM-IF is post amplified in a separate IF amplifier with DC adjustable gain, the AM-IF is fed directly to the 2nd mixer. The TUA 4306 has been designed to work with a PLL in the 100MHz range in both modes or in the AM- mode with the divided frequency. Depending on the input signal strength, the integrated AGC stage for prestage control drives PIN-Diodes as well as MOSFETs. 4.2 FM-MODE FM-IF Demodulator The FM-IF amplifier includes a 7 stage capacitive coupled limiter amplifier with coincidence demodulator and AF output. The AF output signal can be continuously attenuated to decrease the noise. There is a field strength output (with min. 76 dB dynamic range, typ. ±1 dB nonlinearity and typ. ±3 dB temperature drift) and a fixed muting (with full muting typ 80 dB). A multipath detector with analog output is available. Its input signal is fed from the high pass filter of the stereo-decoder/noiseblanker and a second 80 kHz 1-pole high pass filter. 4.3 Stereodecoder Power supply, reference current: A temperature-stable, low noise reference voltage generator is used for better ripple rejection and to generate a reference current. This current is used as a time base for the deemphasis, the gate time of the pulse former, and the pilot cancellation, avoiding temperature and tolerance effects . MPX input, MPX filter: A 4-pole low-pass filter determines the bandwidth of the MPX signal. Voltage Controlled Oscillator, Phase Detector: The 456 kHz oscillator and the frequency dividers are used as walsh function generators (suppression of 3rd order harmonics) for: 38 kHz for the stereo decoder 19 kHz inphase for phase detector and pilot cancellation 19 kHz quadrature for the phase detector. The phase detector locks the on chip 19 kHz signal to the pilot tone in the MPX signal at 90 deg phase. Pilot Detector, Pilot Indicator, Pilot Cancellation: The voltage at the pilot detector output is proportional to the pilot tone input level. If that level is high enough, the pilot indicator output is activated and the pilot cancellation turned on: a 19 kHz signal proportional to the voltage at the pilot detector output is added to the MPX signal with inverse polarity, cancelling the 19 kHz pilot tone. Interference Detector , Noise Detector, Pulse Former: The signal from the interference input (MPX or field strength signal) passes a 4-pole high-pass filter to the noise blanking circuitry. The average noise level is stored in an external capacitor. The interference detector compares the actual noise level with that stored on the capacitor and triggers the pulse former if there is a sig- Semiconductor Group 5 16.3.99 Specification TUA 4306 nificant difference. The pulse former generates a gate pulse for the HCC block. During that pulse time the outputs of the deemphasis circuit are switched to hold mode. 4.4 AM - MODE In the AM mode the 1st IF is converted by the 2nd mixer into the 2nd IF in the 450 kHz range. Therefore a 2nd LO force input is part of the IC. The 2nd IF signal passes an automatic gain controlled IF amplifier and is then demodulated to the AF in a quasisynchronous demodulator. Switching to seek mode, the AGC time constant is reduced by a factor of 5, the AM IF counter output is switched on and the AF is muted. The AGC voltage is used as AM field strength and is fed to the combined field strength output. Semiconductor Group 6 16.3.99 Specification 5 TUA 4306 Pin Configuration 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 49 32 50 31 51 30 52 29 53 28 54 27 55 26 56 25 57 24 58 23 59 22 60 21 61 20 62 19 63 18 64 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P-MQFP 64-1 Semiconductor Group 7 16.3.99 Specification 6 TUA 4306 Pin Description Pin No. Symbol Function 1 MP det in Auxiliary multipath detector input (in parallel to internal connection) 2 MP det cap Multipath detector rectifier capacitor 3 MP det out 4 AM seek m AM seek mode switch; AM IF counter on, AM-AGC fast and AF-mute 5 AM IF count AM-IF counter output for search tuning 6 GND IF Ground IF 7 FM IF bias FM limiter input bias decoupling capacitor 8 FM IF in FM limiter input 9 AM IF bias AM AGC amplifier bias decoupling capacitor 10 AM IF in AM AGC amplifier input 11 AM IF bias AM AGC amplifier bias decoupling capacitor 12 2nd mix out 2nd AM mixer output (open collector) 13 2nd mix out 2nd AM mixer output (open collector) 14 AM IF cap AM AGC amplifier time constant capacitor 15 2nd LO Frequency force input for 2nd mixer 16 2nd mix in 2nd AM mixer bias decoupling capacitor 17 2nd mix in 2nd AM mixer input 18 IF gain cap 10.7 MHz FM IF amplifier gain adjust blocking capacitor 19 IF amp out 10.7 MHz FM IFamplifier output 20 V pre AM AM prestage AGC buffered voltage output 21 I pre FM FM prestage AGC current output for PIN diode 22 IF gain adj 10.7 MHz FM IF amplifier DC controlled gain adjust 23 IF amp bias 10.7 MHz FM IF amplifier operation point 24 IF amp in 10.7 MHz FM IF amplifier input 25 +V rf Supply voltage RF section 26 GND rf Ground RF section 27 SEL A AM divided counter ratio select A 28 SEL B AM divided counter ratio select B 29 1st mix out 1st mixer output (open collector) 30 1st mix out 1st mixer output (open collector 31 Pre cap AM AM prestage AGC time constant capacitor 32 Pre cap FM FM prestage AGC time constant capacitor; output for MOS FET Gate 2 33 RF in FM Analog multipath detector output FM 1st mixer symmetrical inputs Semiconductor Group 8 16.3.99 Specification Pin No. Symbol TUA 4306 Function 34 RF in FM FM 1st mixer symmetrical inputs 35 RF in AM AM 1st mixer symmetrical inputs 36 RF in AM AM 1st mixer symmetrical inputs 37 Vref RF Reference voltage RF section (4.8 V) 38 1st LO 1st local AM/FM oscillator circuit 39 1st LO 1st local AM/FM oscillator circuit 40 Div count 1st local oscillator divided by 4, 6, 8 or 10 counter output (disabled in FM mode) 41 Dir count 1st local oscillator counter output 42 Ng cap AM/FM Timing capacitor for Noisedetector monoflop (gate time) AM/FM mode control; low voltage activates AM section and disables stereodecoder VCO, Phase detector, Pilot detector, SNC and FM section 43 Nlev cap Hold capacitor for Noise detector average level low voltage applied mutes the stereo decoder outputs 44 Deem R HCC timing / hold capacitor, deemphasis right 45 Deem L HCC timing / hold capacitor, deemphasis left 46 AF out L AF output left 47 AF out R AF output right 48 Vref H/S Reference voltage SNC / HCC 49 Contr. HCC Control voltage HCC (high cut control) 50 Contr. SNC Control voltage SNC (stereo noise control), external decreasing of stereo separation possible 51 Pil ind out Pilot indicator output, active high (open collector) 52 Pil det cap Pilot detector capacitor, low voltage activates mono state 53 MPX in Stereo decoder MPX signal input 54 Stereo PLL Stereo decoder PLL phasedetector, loop filter 55 Stereo osc VCO pin for ceramic resonator 56 Iref stereo Reference current pin, external reference resistor 57 N det in Noise detector input 58 MPX out FM MPX signal and AM demodulator signal output 59 GND stereo Ground stereodecoder 60 Mute FM Dynamic FM mute control blocking capacitor 61 Dem FM Demodulator circuit FM 62 Dem FM Demodulator circuit FM 63 +Vif Supply voltage IF and stereodecoder section 64 Fieldstr. AM/FM fieldstrength combined output Semiconductor Group 9 16.3.99 7 50 Pilot ind. 48 49 AF out 47 45 46 44 43 Div.Count toµC to µC open C. 42 41 40 39 RF AM 1. LO toµC 38 36 37 RF FM 34 35 32 33 31 51 to µC 30 52 53 STEREODECODER 28 PRESTAGE 27 NOISE BLANKER 55 AGC Sel B Sel A 26 56 +VS 10 25 57 10.7M 24 58 59 FM IF 60 61 22 AM-AGC 21 AMPLIFIER 62 23 AMP FM-IF AMPLIFIER IF CONVERTER 20 63 +VS 2 3 4 5 6 7 8 9 10 11 12 13 14 15 FM Prestage AGC 19 64 1 IF Amp gain AM 2. LO OSC AM/FM fieldstr. 16 17 18 AGC time 16.3.99 to µC +VS AM count to µC 450k 10.25 M in 10.7M TUA 4306 10.7M MPD out Specification 456k 29 1. MIXER 54 +VS Blockdiagram 1 Semiconductor Group Count AM/FM SNC HCC Vref H/S 8 8 to AM to FM prestage prestage +VS 20 21 31 32 29 +VS Gain adj. 30 22 24 23 18 19 17 16 IF1 out PrestageAGC Blockdiagram 2 Semiconductor Group to FM-Limiter 12 9 13 10 11 IF2 IF2 VREF AM out in AM Mixer AGC Amplifier 36 2nd Mixer FM Mixer 35 11 34 FM-In 5 33 IF-Counter fOsc4-10 :4-10 AM/FM 40 fOsc (42) IF AGC 2. LO 41 Specification AM-In Sel A 27 28 39 38 25 37 1st LO +VS VRef RF 10.25 MHz in (64) (58) FSAM AFout 14 IF-AGC 4 AM seek mode ( ) not directly connected to pin ( ) 16.3.99 TUA 4306 Sel B 15 Semiconductor Group 1 1 pole high pass 7 12 Multipath detector 2 3 Muteinput 60 MPX (58) AM/FM FSFM 62 61 ( ) not directly connected to pin ( ) VRef FM (42) (64) 9 8 ViFM Specification TUA 4306 Blockdiagram 3 16.3.99 Semiconductor Group Rout Lout 47 + 13 + - - 46 Vref Vref (3) 45 43 INTERFER. DET. AM/FM 42 NOISE DET. De-emph. HCC GATE PULSE FORMER 44 57 VHCC detector to multipath 1 - + Vref S/H 48 63 +Vs Vref 56 51 LOGIC 38 PILOT CANCEL SWITCH 19 19 19 REFERENCE CURRENT DECODER SNC 50 4-POLE HIGH-PASS FILTER STEREO 2-POLE AF FILTERS 49 VSNC Vref 59 Vref CSB 456 55 VCO PHASE DET. PILOT DET. 52 MONO POWER SUPPLY PILOT IND. - 54 4-POLE MPX FILTER + 53 AM/ FM MPX in Specification TUA 4306 10 Blockdiagram 4 16.3.99 Specification TUA 4306 11 Absolute Maximum Ratings The AC / DCcharacteristic limits are not guaranteedhe maximal ratings may not be exceeded under any circumstances, not even momentary and individual, as permanent damage to the IC will result. Limit Values Parameter Symbol Unit min max Junction temperature TJ -40 150 °C Storage temperature TS -40 125 °C Thermal resistance R thSA 54 K/W ESD-voltage, HBM VESD +4 kV -4 Test Conditions 100pF, 1500 Ω Ambient Temperature under bias: TA=-40 to +85°C Semiconductor Group 14 16.3.99 Specification TUA 4306 . 12 Operational Range Within the operational range the IC operates as described in the circuit description. The AC / DC characteristic limits are not guaranteed . Limit Values Parameter Symbol Unit min max Supply voltage VS 8 9 V Ambient temperature TA -40 85 °C Semiconductor Group 15 Test Conditions 16.3.99 Specification TUA 4306 13 AC / DC Characteristics AC / DC characteristics involve the spread of values guaranteed within the specified supply voltage and ambient temperature range. Typical characteristics are the median of the production. Supply Voltage Ambient temperature VS = 8.5 V Tamb = 25 °C Parameter 1.Current consumption Test Circuit Limit Values Symbol Unit min typ max Test conditions 1 ISFM 80 100 120 mA FM mode 1 ISAM 65 80 105 mA AM mode 1. Frequency range 1 f1st LO 80 140 MHz 2. Frequency range Lab f1st LO 50 150 MHz Qfactor of coil >90 3. Counter output 1 V41 70 100 mVrms RL41=330Ω; Ref. Appl.board 4. Divided counter output 1 V40 28 40 mVrms RL40=330Ω; Ref. Appl. board 4a. Divided counter output Lab V40 150 mVrms RL40=10kΩ; Ref. Appl. board 5. Output impedance Lab R40 0.8 1 1.2 kΩ 6. Output impedance Lab R41 240 300 360 Ω 7. Frequency 1 f1st LO 10 1.AM/FM-Receiver 1st LO MHz Vtuning=0V 10.7 MHz IF amplifier fIF1= 10.7 MHz 8. DC input voltage 1 V24 3.5 3.9 4.3 V 9. Input resistance 1 R24 270 330 390 Ω 10. Output resistance 1 R19 270 330 390 Ω 11. Max. voltage gain 1 A24-19 23 26 29 dB V22=1.5V 12. Min. voltage gain 1 A24-19 13 16 19 dB V22=3.5V 13. Noise figure Lab FFM dB RG=330Ω 14. Reference voltage 1 V37 15. Output Current 1 I37 Semiconductor Group 7 4.5 4.8 5.1 1 16 AM V mA 16.3.99 Specification Parameter Test Circuit TUA 4306 Limit Values Symbol min typ Unit Test conditions dBµV Special testcircuit necessary dB V35,36=80mVrms ( RL=330Ω) mVpp SINAD> 34dB;m=80% dB Rg opt=700Ω max AM mode fIF1= 10.7 MHz fIF2= 450 kHz f35-36= 1 MHz V42=1V Mixer 1 1. Interceptpoint 3rd order Lab IP3 2. Mixer gain 1 AM1 3. Max. input voltage 1 V35-36 4. Noise figure (10 MHz) Lab F 5. Input impedance Lab R35-36 3.2 4 4.8 kΩ sym. 6. Input impedance Lab C35-36 1.6 2 2.4 pF sym. 7. Input impedance Lab R35-36 1.6 2 2.4 kΩ asym. 8. Input impedance Lab C35-36 3.2 4 4.8 pF asym. 9. Divider select low 1 V27,28L 0 1.3 V 10. Divider select high 1 V27,28H 3.0 Vs V 11. AGC-voltage AM 1 V20 6.5 12. AGC-voltage AM 1 V20 0 13. AGC-voltage FM 1 V32 14. AGC-current FM 1 15. Integrator Current 134 2 6 1100 1400 10 7 Prestage AGC output V V35,36 =50mVrms 0.5 V V35,36 =200mVrms 0 0.15 V V35,36=50mVrms I21 0 0.1 mA V35,36=50mVrms 1 I31* -12 -25 -45 µA V35,36=50mVrms Vm=3V 16. Integrator Current 1 I31* +10 +25 +40 µA V35,36=150mVrms Vm=3V 17. Integrator Current 1 I31* -17 -35 -55 µA V35,36=0mVrms Vm=3V 18. Integrator Current 1 I31* +50 +70 +90 µA V35,36=400mVrms Vm=3V Semiconductor Group 17 7.5 16.3.99 Specification Parameter Test Circuit TUA 4306 Limit Values Symbol Unit min typ Test conditions max 2 nd AM IF section Mixer 2 7 10 13 1. Mixer gain 1 AM2 2. Noise figure Lab F 3. Max Input Voltage 1 V16-17 1400 4. Input impedance Lab R16-17 1.8 - 5. Operational frequency Lab f15 10 10.25 25 6. External force voltage 1 V 15 60 10 dB V17 =1mV; Vout=VIF450 f17=10.7 MHz; f15=10.25 MHz dB mVpp SINAD> 34dB;m=80% kΩ Frequency force input Semiconductor Group 18 MHz mVrms Rg=600Ω; Ck= 100pF 16.3.99 Specification Parameter Test Circuit TUA 4306 Limit Values Symbol min typ Unit Test conditions dB µV special testcircuit necessary dB Rg opt=500Ω max FM mode fIF=10.7 MHz f33-34=100 MHz V42=open Mixer 1 1.Interceptpoint 3rd order Lab IP3 2.Noise figure (10 MHz) Lab F 3. Mixer gain 1 AM1 4.Input impedance Lab 5.Input impedance 125 6 5 9 13 dB V33-34=10mVrms; RL=330Ω R33-34 3.2 4 4.8 kΩ sym. Lab C33-34 1.6 2 2.4 pF sym. 6.Input impedance Lab R33-34 1.6 2 2.4 kΩ asym. 7.Input impedance Lab C33-34 3.2 4 4.8 pF asym. 8. AGC voltage FM 1 V32 5.6 6.4 7.2 V V33,34=0mVrms 9.AGC voltage FM 1 V32 0 0.1 V V33,34=50mVrms 10.AGC current FM 1 I21 9.5 14.5 mA V33,34=0mVrms Vm=0.7V 11.AGC current FM 1 I21 0 0.1 mA V33,34=50mVrms Vm=0.7V 12.AGC voltage AM 1 V20 0 0.5 V V33,34=0 13.AGC sink current AM 1 I20 3 mA V33,34=0 14.AGC voltage AM integrator 1 V31 15.Integrator Current 1 I32* 16.Integrator Current 1 17.Integrator Current 1 Prestage AGC output 12 6 7.5 V V33,34=0 - 12 - 25 - 46 µA V33,34=0 Vm=4.8V I32* +15 +30 +50 µA V33,34=60mVrms Vm=4.8V I32* +50 +70 +90 µA V33,34=150mVrms Vm=4.8V *) Integrator currents are measured between the output pin (- Pole of the measurement equipment) and a voltage source Vm (+ Pole) 2.FM Demodulator Measuring condition: fiIF=10.7 MHz; ∆f= ±75 kHz; fmod= 1 kHz;V8 =10 mVrms V42=open; Deemphasis= 100 µs Fieldstrength dynamic range 1 V64 Fieldstrength nonlinearity 1 V64 Fieldstrength temperature drift 1 V64 Semiconductor Group 66 72 dB see Diagram D1 ±1 dB see Diagram D2 dB see Diagram D3 ±3 19 16.3.99 Specification Parameter Test Circuit TUA 4306 Limit Values Symbol Unit min typ Test conditions max Fieldstrength load capacitance Lab 50 Fieldstrength load resistance Lab Fieldstrength voltage 1 V64 4 4.6 5.2 V V8=200mVrms Fieldstrength voltage 1 V64 1.5 1.9 2.3 V V8=1mVrms Fieldstrength voltage 1 V64 0 1 V V8=0mVrms 2. AF-output voltage 1 V58 400 mVrms RL>10kΩ; Deemph.=100 µs 3. AF-output voltage Lab V58 600 mVrms RL>10kΩ; no Deemph. 4. Input voltage for limiter threshold 1 V8 33 45 µVrms V58=V58 - 3dB 5. Total harmonic distortion 1 THD58 0.9 1.2 % 6. AM-suppression 1 aAM 70 80 dB 7. Signal-to-noise ratio 1 aS/N 72 80 dB 8. AF mute 1 aAF 12 14 16 dB V60=0 10. Attack current 1 I2 *) 600 800 1070 µA V57AC=1Vpp , Vm=5.0 V 11. Recovery current 1 I2 *) - 6 -9 -12 µA V57AC=0; Vm=3.6V 12. Start voltage 1 V3Def 4.4 4.7 V V57AC=0V 13.Detector characteristic 1 V3 V3Def0.14V V3Def-0.1V V3Def V f57=25kHz; V57=160mVpp 14. Detector characteristic 1 V3 V3Def-3.3V V3Def-2.3V V f57=200kHz; V57=160mVpp 1 pF kΩ 500 600 m=30 % Multipath detector f57=200 kHz V3Def-2.8V *) Integrator currents are measured between the output pin (- Pole of the measurement equipment) and a voltage source Vm (+ Pole Semiconductor Group 20 16.3.99 Specification Parameter Test Circuit TUA 4306 Limit Values Symbol Unit min typ max 0.1 0.3 Test conditions 3.Stereodecoder Measuring condition: V53=600mVrms; f=1 kHz; 15kHz LP with 19kHz Notch; see appendix 1.Total harmonic distortion 1 THD46,47 2. Signal to noise ratio 1 S/N 46,47 65 3. Channel separation 1 aSep 4. AF output voltage 1 V46,47 5. Overdrive margin 1 V46,47 max 6. AF output DC voltage 1 VDC 46,47 7. Difference of output voltage levels 1 ∆V46,47 8. Muting depth 1 A46,47 70 75 dB V43=0 9. Muting depth 1 A46,47 70 75 dB V4=0.7V 10. DC-offset at mute 1 ∆DC 46,47 -100 0 100 mV 11. DC-offset stereo on/off 1 ∆DC 46,47 -100 0 100 mV % f= 1 kHz 75 dB Stereo 28 40 dB 650 780 900 2 2.5 3 mVrms Stereo/Mono dB THD= 1% 3.5 V 2 dB Carrier and harmonic suppression (referenced to V46,47=780 mVrms) 1. Pilotsignal (f=19kHz) subcarrier 1 α19 40 45 dB 2. (f=38kHz) 1 α38 40 50 dB 3. (f=57kHz) 1 α57 40 50 dB 1. For stereo”on” 1 VPILon 2. For stereo”off” 1 VPILoff 3. Hysteresis Lab Mono/Stereo control Pilot threshold voltage: 20 5 30 mVrms 14 mVrms 3 dB VPILon / VPILoff 0.5 V I51=1mA 10 µA Stereo-indicator output 4. Pilot off V51off 5. Pilot on external control voltages (active low) 6. Operational voltage for external 1 mono control (pin 52) V52 thr 1 V 7. Operational voltage for AM/FM (pin 42) V42thr 1 V Semiconductor Group 1 21 AM on 16.3.99 Specification TUA 4306 Deemphasis Reference frequency = 400Hz Cdeemph=10nF; τnom=75 µs 8. Minimum FM attenuation 1 Amin FM 5 7 9 dB V49≥3.8V; fm=5kHz 9. Maximum FM attenuation 1 Amax FM 12 15 18 dB V49=1.5 V V; fm=5kHz 10. Minimum AM attenuation 1 Amin AM 5 7 9 dB V49≥3.4V; fm=5kHz 11. Maximum AM attenuation 1 Amax AM 12 15 18 dB V49=1.5V; fm=5kHz 1. Channel separation 1 aSep 28 dB V50=3.8V 2. Channel separation 1 aSep 3 dB V50=3.3V 3. Max. Osc. frequency 1 foscmax 0.7 1.0 2.0 % 100 % x (fmax / 456kHz-1) 4. Min. Osc. frequency 1 foscmin -2.0 -1.0 -0.7 % 100 % x (fmax / 456kHz-1) 5. VCO-gain 1 -12 -8 -4 kHz/V ∆f/∆V54 6. Oscillator voltage 1 2.5 4 5.5 V V55 DC 7.Oscillator swing 1 260 370 470 mVrms V55 AC Stereo/Mono blend control : Oscillator PLL note 1 ∆i/∆φ 6.0 8.2 10.2 µA/rad Vpilot = 54 mVrms 9. Input resistance Lab R57 80 99 120 kΩ 10. Input high-pass filter Lab fin57 80 100 120 kHz -3dB 11.Trigger threshold 1 V 57 min 30 50 mVrms V43 = V43 (V57 mean=0), f57=200 kHz 12.Trigger threshold 1 V57 dyn 130 170 210 mVrms V43 =V43 (V57 mean=50mVrms ), f57=200 kHz 13. Maximum noise mean value * 1 V57maxmean 65 80 115 mVrms 14. Suppression pulse duration 1 34 40 46 µs 15. Input offset current Lab I44,45 -50 0 50 nA 16. Attack current Lab I43att 880 µA V43=5.5V 17. Recovery current Lab I43rec 20 µA V43=4V 8. PD-gain Noise detector f57=200 kHz *) The trigger threshold is adapted to the input noise. IF max. noise mean value is exceeded, threshold is too high for any trigger of the noise blanker Semiconductor Group 22 16.3.99 Specification TUA 4306 4.AM Mode AGC-Amplifier Measuring condition: fiF= 450 kHz; fmod = 1 kHz; V10 = 10mVrms , Deemphasis=100 µs 1. AGC-range 1 ∆A 2. Input sensitivity 1 V10 3. AGC time seek mode on 1 V4 L 0 0.7 V 4. AGC time seek mode off 1 V4 H 2.4 5 V 5. Integrator Current 1 I 14* 15 25 35 µA V10=0; Vm=3V 6. Integrator Current 1 I14* - 13 - 25 -33 µA V10=100mVrms ; Vm=3V 7. Integrator Current 1 I14* 400 +500 650 µA V10=0 Vm=3V; V4=0.7 V 8. Integrator Current 1 I14* -400 - 500 -650 µA V10=100mVrms ; Vm=3V; V4=0,7 V 9. Field strength output 1 V64 0 0.3 0.8 V V10=0 mV; seek mode off 10. Field strength output 1 V64 1.4 1.75 2.1 V V10=500 µV; seek mode off 11. Field strength output 1 V64 3 3.4 4 V V10=5 mV; seek mode off 12. Field strength output 1 V64 4 4.4 5.1 V V10=30 mV; seek mode off 60 66 dB V58=V58AM ±3dB 100 µVrms V58=V58AM -3dB *) Integrator currents are measured between the output pin (- Pole of the measurement equipment) and a voltage source Vm (+ Pole Demodulator 13. AF output voltage 1 V58AM 360 480 600 mVrms m=0.8 14. AF output voltage Lab V58AM 283 406 550 mVrms m=0.8; Deemph=100 µs 15. Total harm. distortion 1 THD58 0.7 2.5 % 16. (S+N)/N 1 40 50 dB m=0.8; V10=200µV 17. (S+N)/N 1 60 70 dB m= 0.8; V10=100mVrms 18. AF-linearity 1 Semiconductor Group ∆V58 3 23 dB 16.3.99 Specification TUA 4306 IF - Counter 19. IF - counter Output voltage 1 V5 20. IF-counter output voltage 1 V5 21. IF-counter Output voltage 1 V5AC Semiconductor Group 220 270 0.5 2 24 mVrms RL=100kΩ V4=0.7 V; Ref. Appl. Board VDC V4=2.4V mVrms V4=2.4V 16.3.99 Specification TUA 4306 14 Truthtables AM 1st LO ECL divider truthtable Sel A Sel B divide by 4 0 0 divide by 6 0 1 divide by 8 1 0 divide by 10 1 1 Semiconductor Group 25 16.3.99 Specification TUA 4306 15 Test Circuit Semiconductor Group 26 16.3.99 Specification TUA 4306 16 Application Circuit Semiconductor Group 27 16.3.99 Specification TUA 4306 Applic ation Circuit 17 Diagram 1 D1 VF Characteristic VF (V) 30 50 M3 70 90 M1 110 ViIF (dBµV) M2 M4 VF - Dynamic MVFmin MVFmax VF - Dynamic :The dynamic range of VF voltage is determined by the test points M1 through M4 as follows: M1: test point (at ViIF= 50 dBµV) supplies VF (M1) M2: test point (at ViIF= 90 dBµV) supplies VF (M2) M3: test point (at ViIF= 20 dBµV) supplies VF (M3) M4: test point (at ViIF=120 dBµV) supplies VF (M4) Hence follows : VF (M4) - VF (M2) MVFmax:= 90 dBµV+––––––––––––––––– × 40 dB VF (M2) - VF (M1) VF (M1) - VF (M3) MVFmin:= 50 dBµV - ––––––––––––––––– × 40 dB VF (M2) - VF (M1) VF - Dynamic = MVFmax - MVFmin Semiconductor Group 28 16.3.99 Specification TUA 4306 18 Diagram 2 VF (V) VF Characteristic ∆ D2 VF VFmax VFmin ∆ 30 50 70 ViIF 90 M1 110 ViIF (dBµV) M2 Test points to determine VF linearity VF - Linearity: is determined at 25 °C Slope VF (M2) - VF (M1) : m= –––––––––––––––––– 40 dB The tolerance range of the VF - linearity is determined by two parallel lines: VFmax = VF (M1) + m (M + 60 dB+ 1dB) VFmin = VF (M1) + m (M + 60 dB - 1dB) The VF values within the VF dynamic range (MVFmin≤M≤MVFmax) must be inside the predetermined tolerance range: VFmin ≤ VF ( M ) ≤ VFmax Semiconductor Group 29 16.3.99 Specification TUA 4306 19 Diagram 3 VF (V) VF Characteristic D3 ∆ VF VFmax VFmin ∆ 30 50 ViIF 70 M1 90 110 ViIF (dBµV) M2 VF -Temperatur - Drift : It is determined within -40 bis +85 °C Slope VF (M2) - VF (M1) : m= –––––––––––––––––– 40 dB (at 25 °C ) The tolerance range of the VF temperature drift is determined by two parallel lines: VFmax = VF (M1) + m (M + 60 dB+ 3dB) VFmin = VF (M1) + m (M + 60 dB - 3dB) The VF values for temperatures between -40 to +85 °C within the VF dynamic range (MVFmin≤VF≤MVFmax) must be inside the predetermined tolerance field: VFmin≤ VF ( M ) ≤ VFmax Semiconductor Group 30 16.3.99