PD-95080A
IRFR6215PbF
IRFU6215PbF
P-Channel
l 175°C Operating Temperature
l Surface Mount (IRFR6215)
l Straight Lead (IRFU6215)
l Advanced Process Technology
l Fast Switching
l Fully Avalanche Rated
l Lead-Free
Description
HEXFET® Power MOSFET
l
D
VDSS = -150V
RDS(on) = 0.295Ω
G
ID = -13A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve the
lowest possible on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedized device design that HEXFET Power
MOSFETs are well known for, provides the designer
with an extremely efficient device for use in a wide
variety of applications.
The D-PAK is designed for surface mounting using
vapor phase, infrared, or wave soldering techniques.
The straight lead version (IRFU series) is for throughhole mounting applications. Power dissipation levels
up to 1.5 watts are possible in typical surface mount
applications.
D-PAK
TO-252AA
I-PAK
TO-251AA
Absolute Maximum Ratings
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
IDM
PD @TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
TSTG
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds
Max.
Units
-13
-9.0
-44
110
0.71
± 20
310
-6.6
11
5.0
-55 to + 175
A
W
W/°C
V
mJ
A
mJ
V/ns
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
RθJC
RθJA
RθJA
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Junction-to-Case
Junction-to-Ambient (PCB mount) **
Junction-to-Ambient
Typ.
Max.
Units
–––
–––
–––
1.4
50
110
°C/W
1
12/14/04
IRFR/U6215PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
∆V(BR)DSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
VGS(th)
gfs
Gate Threshold Voltage
Forward Transconductance
IDSS
Drain-to-Source Leakage Current
V(BR)DSS
Min.
-150
–––
–––
–––
-2.0
3.6
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
-0.20
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
14
36
53
37
Qg
Qgs
Qgd
td(on)
tr
td(off)
tf
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
LD
Internal Drain Inductance
–––
4.5
LS
Internal Source Inductance
–––
7.5
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
–––
–––
–––
860
220
130
IGSS
Max. Units
Conditions
–––
V
VGS = 0V, ID = -250µA
––– V/°C Reference to 25°C, I D = -1mA
0.295
VGS = -10V, ID = -6.6A
Ω
0.58
VGS = -10V, ID = -6.6A TJ = 150°C
-4.0
V
VDS = V GS, ID = -250µA
–––
S
VDS = -50V, ID = -6.6A
-25
VDS = -150V, VGS = 0V
µA
-250
VDS = -120V, VGS = 0V, TJ = 150°C
100
VGS = 20V
nA
-100
VGS = -20V
66
ID = -6.6A
8.1
nC
VDS = -120V
35
VGS = -10V, See Fig. 6 and 13
–––
VDD = -75V
–––
ID = -6.6A
ns
–––
RG = 6.8Ω
–––
RD = 12Ω, See Fig. 10
D
Between lead,
–––
6mm (0.25in.)
nH
G
from package
–––
and center of die contact
S
–––
VGS = 0V
–––
pF
VDS = -25V
–––
ƒ = 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
IS
ISM
VSD
trr
Qrr
ton
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
Min. Typ. Max. Units
Conditions
D
MOSFET symbol
-13
––– –––
showing the
A
G
integral reverse
––– –––
-44
p-n junction diode.
S
––– ––– -1.6
V
TJ = 25°C, IS = -6.6A, VGS = 0V
––– 160 240
ns
TJ = 25°C, IF = -6.6A
––– 1.2 1.7
µC
di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%
max. junction temperature. ( See fig. 11 )
Starting TJ = 25°C, L = 14mH
RG = 25Ω, IAS = -6.6A. (See Figure 12)
This is applied for I-PAK, LS of D-PAK is measured between lead and
center of die contact
ISD ≤-6.6A, di/dt ≤ -620A/µs, VDD ≤ V(BR)DSS, Uses IRF6215 data and test conditions
TJ ≤ 175°C
** When mounted on 1" square PCB (FR-4 or G-10 Material )
For recommended footprint and soldering techniques refer to application note #AN-994
2
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IRFR/U6215PbF
100
100
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
VGS
- 15V
- 10V
- 8.0V
- 7.0V
- 6.0V
- 5.5V
- 5.0V
BOTTOM - 4.5V
TOP
-ID , Drain-to-Source Current (A)
-ID , Drain-to-Source Current (A)
TOP
10
20µs PULSE WIDTH
Tc = 25°C
A
-4.5V
1
1
10
10
-4.5V
100
1
-VDS , Drain-to-Source Voltage (V)
2.5
R DS(on) , Drain-to-Source On Resistance
(Normalized)
-ID , Drain-to-Source Current (A)
TJ = 25°C
TJ = 175°C
10
VDS = -50V
20µs PULSE WIDTH
5
6
7
8
9
-VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
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A
100
Fig 2. Typical Output Characteristics
100
4
10
-VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
1
20µs PULSE WIDTH
TC = 175°C
1
10
A
I D = -11A
2.0
1.5
1.0
0.5
VGS = -10V
0.0
-60 -40 -20
0
20
40
60
A
80 100 120 140 160 180
TJ , Junction Temperature (°C)
Fig 4. Normalized On-Resistance
Vs. Temperature
3
IRFR/U6215PbF
2000
-VGS , Gate-to-Source Voltage (V)
1600
C, Capacitance (pF)
20
V GS = 0V,
f = 1MHz
C iss = Cgs + C gd , Cds SHORTED
C rss = C gd
C oss = C ds + C gd
Ciss
1200
Coss
800
Crss
400
0
A
1
10
I D = -6.6A
16
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
-VDS , Drain-to-Source Voltage (V)
40
60
A
80
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
100
OPERATION IN THIS AREA LIMITED
BY R DS(on)
10µs
-I D , Drain Current (A)
-ISD , Reverse Drain Current (A)
20
Q G , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
TJ = 175°C
10
TJ = 25°C
1
100µs
10
1ms
VGS = 0V
0.1
0.2
0.6
1.0
1.4
-VSD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
VDS = -120V
VDS = -75V
VDS = -30V
A
1.8
TC = 25°C
TJ = 175°C
Single Pulse
1
1
10ms
10
100
A
1000
-VDS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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IRFR/U6215PbF
14
VGS
12
-ID , Drain Current (A)
RD
VDS
D.U.T.
RG
-
10
+
VDD
-10V
8
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
6
Fig 10a. Switching Time Test Circuit
4
td(on)
2
tr
t d(off)
tf
VGS
10%
0
25
50
75
100
125
TC , Case Temperature
150
175
( °C)
90%
Fig 9. Maximum Drain Current Vs.
Case Temperature
VDS
Fig 10b. Switching Time Waveforms
Thermal Response (ZthJC )
10
1
D = 0.50
0.20
0.10
PDM
0.05
0.1
t
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
Notes:
1. Duty factor D = t
1
/t
1
t2
2
2. Peak TJ = PDM x Z thJC + T C
0.01
0.00001
0.0001
0.001
0.01
A
0.1
1
t 1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
L
VDS
D.U.T
RG
IAS
-20V
tp
VDD
A
DRIVER
0.01Ω
15V
Fig 12a. Unclamped Inductive Test Circuit
I AS
EAS , Single Pulse Avalanche Energy (mJ)
IRFR/U6215PbF
800
TOP
BOTTOM
ID
-2.7A
-4.7A
-6.6A
600
400
200
A
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
tp
V(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
QG
12V
.2µF
.3µF
-10V
QGS
QGD
D.U.T.
+VDS
VGS
VG
-3mA
Charge
Fig 13a. Basic Gate Charge Waveform
6
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
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IRFR/U6215PbF
Peak Diode Recovery dv/dt Test Circuit
+
D.U.T
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
-
-
+
•
•
•
•
RG
*
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
+
-
VDD
Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
Period
P.W.
D=
P.W.
Period
VGS=10V
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFETS
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7
IRFR/U6215PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFR120
WIT H AS S EMBLY
LOT CODE 1234
AS S EMBLED ON WW 16, 1999
IN T HE AS S EMBLY LINE "A"
PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
Note: "P" in assembly line pos ition
indicates "Lead-F ree"
IRFU120
12
916A
34
AS S EMBLY
LOT CODE
DAT E CODE
YEAR 9 = 1999
WE EK 16
LINE A
OR
PART NUMBER
INT ERNAT IONAL
RECT IFIER
LOGO
IRF U120
12
AS S EMBLY
LOT CODE
8
34
DAT E CODE
P = DES IGNAT ES LEAD-F REE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 16
A = AS S EMBLY S IT E CODE
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IRFR/U6215PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
EXAMPLE: T HIS IS AN IRFU120
WIT H AS SEMBLY
LOT CODE 5678
AS SEMB LED ON WW 19, 1999
IN T HE AS S EMBLY LINE "A"
INT ERNAT IONAL
RECT IF IER
LOGO
PART NUMBER
IRF U120
919A
56
78
ASS EMBLY
LOT CODE
Note: "P" in ass embly line
position indicates "Lead-F ree"
DAT E CODE
YEAR 9 = 1999
WEEK 19
LINE A
OR
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMB ER
IRF U 120
56
AS S EMBLY
LOT CODE
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78
DAT E CODE
P = DES IGNAT ES LEAD-FREE
PRODUCT (OPT IONAL)
YEAR 9 = 1999
WEEK 19
A = AS S EMB LY S IT E CODE
9
IRFR/U6215PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRR
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
FEED DIRECTION
TRL
16.3 ( .641 )
15.7 ( .619 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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Note: For the most current drawings please refer to the IR website at:
http://www.irf.com/package/