INFINEON TLE7272-2E

Data Sheet, Rev. 1.0, June 2009
TLE7272-2
5-V Low Dropout Voltage Regulator
Automotive Power
5-V Low Dropout Voltage Regulator
1
TLE7272-2
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
Ultra Low Current Consumption 20 µA
Output Voltage 5 V ±2%
Output Current up to 300 mA
Power-On and Undervoltage Reset
Reset Low Down to VQ = 1 V
Enable Input
Very Low Dropout Voltage
Output Current Limitation
Overtemperature Shutdown
Wide Temperature Range From -40 °C up to 150 °C
Green Product (RoHS compliant)
AEC Qualified
PG-SSOP-14 Exposed Pad
Description
The TLE7272-2 is a monolithic integrated low dropout voltage regulator
for load currents up to 300 mA. An input voltage up to 42 V is regulated
to VQ,nom = 5.0 V with a precision of ±2%. Due to its integrated reset
circuitry featuring power on timing and output voltage monitoring the IC is
well suited as µ-controller supply. The sophisticated design allows to
PG-TO252-5
achieve stable operation even with ceramic output capacitors down to
470 nF. The device is designed for the harsh environment of automotive
applications. Therefore it is protected against overload, short circuit and overtemperature conditions by the
implemented output current limitation and the overtemperature shutdown circuit. The TLE7272-2 can be also used
in all other applications requiring a stabilized 5 V voltage.
Due to its ultra low quiescent current of typically 20 µA the TLE7272-2 is dedicated for use in applications
permanently connected to VBAT. In addition the device can be switched off via the Enable input reducing the current
consumption to typically 5 µA. An integrated output sink current circuitry keeps the voltage at the Output pin Q
below 5.5 V even in case of occuring reverse currents. Thus connected devices are protected from overvoltage
damage. For applications requiring extremely low noise levels the Infineon voltage regulator family TLE 42XX and
TLE 44XX is more suited than the TLE7272-2. A mV-range output noise on the TLE7272-2 caused by the charge
pump operation is unavoidable due to the ultra low quiescent current concept.
Type
Package
Marking
TLE7272-2E
PG-SSOP-14 Exposed Pad
7272-2E
TLE7272-2D
PG-TO252-5
7272-2D
Data Sheet
2
Rev. 1.0, 2009-06-01
TLE7272-2
Block Diagram
2
Block Diagram
TLE7272-2
I
Q
Overtemperature
Shutdown
Bandgap
Reference
EN
Reset
Generator
RO
1
Enable
Charge
Pump
GND
Figure 1
Data Sheet
AEB03523.VSD
Block Diagram
3
Rev. 1.0, 2009-06-01
TLE7272-2
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment PG-SSOP-14 Exposed Pad
QF
52
QF
,
QF
QF
*1'
QF
QF
QF
(1
4
QF
QF
7/(B3,1&21),*B6623
69*
Figure 2
Pin Configuration (top view)
3.2
Pin Definitions and Functions PG-SSOP-14 Exposed Pad
Pin No.
Symbol Function
1,3,5,7
n.c.
non connected
can be open or connected to GND
2
RO
Reset Output
open collector output with integrated pull-up resistor;
optional external pull-up resistor of ≥ 10 kΩ to pin Q;
leave open if reset function not needed
4
GND
Ground
6
EN
Enable Input
high level input signal enables the IC;
low level input signal disables the IC;
integrated pull-down resistor
8,10,11,12,14
n.c.
non connected
can be open or connected to GND
9
Q
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 6
13
I
Input
block to ground directly at the IC with a ceramic capacitor
Pad
–
Exposed Pad
connect to GND and heatsink area
Data Sheet
4
Rev. 1.0, 2009-06-01
TLE7272-2
Pin Configuration
3.3
Pin Assignment PG-TO252-5
GND
I RO
EN Q
Figure 3
Pin Configuration (top view)
3.4
Pin Definitions and Functions PG-TO252-5
Pin No.
Symbol Function
1
I
Input
block to ground directly at the IC with a ceramic capacitor
2
RO
Reset Output
open collector output with integrated pull-up resistor;
optional external pull-up resistor of ≥ 10 kΩ to pin Q;
leave open if reset function not needed
3
GND
Ground
internally connected to heat slug
4
EN
Enable Input
high level input signal enables the IC;
low level input signal disables the IC;
integrated pull-down resistor
5
Q
Output
block to ground with a capacitor close to the IC terminals, respecting the values given
for its capacitance and ESR in “Functional Range” on Page 6
Heat Slug
–
Heat Slug
internally connected to GND;
connect to GND and heatsink area
Data Sheet
5
Rev. 1.0, 2009-06-01
TLE7272-2
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings1)
Tj = -40 °C to 150 °C; all voltages with respect to ground, (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Test Condition
Min.
Max.
VI
-0.3
45
V
–
VQ, VRO
VQ, VRO
-0.3
6
V
–
-0.3
6.2
V
t < 10 s2)
VEN
-0.3
45
V
–
Tj
Tstg
-40
150
°C
–
-50
150
°C
–
Voltage
-
3
kV
–
Voltage
-
1.5
kV
–
Input I
4.1.1
Voltage
Output Q, Reset Output RO
4.1.2
Voltage
4.1.3
Voltage
Enable Input EN
4.1.4
Voltage
Temperature
4.1.5
Junction temperature
4.1.6
Storage temperature
ESD Susceptibility
4.1.7
4.1.8
1)
2)
3)
4)
Human Body Model (HBM)3)
Charged Device Model (CDM)
4)
not subject to production test, specified by design
exposure to these absolute maximum ratings for extended periods (t > 10 s) may affect device reliability
ESD susceptibility Human Body Model “HBM” according to AEC-Q100-002 - JESD22-A114
ESD susceptibility Charged Device Model “CDM” according to ESDA STM5.3.1
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Pos.
Parameter
Symbol
4.2.1
Input voltage
4.2.2
4.2.3
Output Capacitor’s
Requirements
4.2.4
Junction temperature
VI
CQ
ESR(CQ)
Tj
Limit Values
Unit
Remarks
Min.
Max.
5.5
42
V
–
470
–
nF
1)
–
10
Ω
2)
-40
150
°C
–
1) the minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%
2) relevant ESR value at f = 10 kHz
Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the Electrical Characteristics table.
Data Sheet
6
Rev. 1.0, 2009-06-01
TLE7272-2
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go
to www.jedec.org.
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
TLE7272-2E (PG-SSOP-14 Exposed Pad)
4.3.1
Junction to Case1)
RthJC
–
14
–
K/W
measured to
exposed pad
4.3.2
Junction to Ambient1)
–
47
–
K/W
2)
–
141
–
K/W
footprint only3)
4.3.4
RthJA
RthJA
RthJA
–
66
–
K/W
300 mm² heatsink
area3)
4.3.5
RthJA
–
56
–
K/W
600 mm² heatsink
area3)
–
6
–
K/W
measured to tab
–
32
–
K/W
2)
–
115
–
K/W
footprint only3)
4.3.4
RthJC
RthJA
RthJA
RthJA
–
62
–
K/W
300 mm² heatsink
area3)
4.3.5
RthJA
–
47
–
K/W
600 mm² heatsink
area3)
4.3.3
TLE7272-2D (PG-TO252-5)
4.3.1
Junction to Case1)
4.3.2
Junction to Ambient1)
4.3.3
1) Not subject to production test, specified by design.
2) Specified RthJA value is according to Jedec JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
3) Specified RthJA value is according to Jedec JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
Data Sheet
7
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
5
Electrical Characteristics
5.1
Electrical Characteristics Voltage Regulator
Electrical Characteristics
VI =13.5 V; Tj = -40 °C to 150 °C; all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Measuring Condition
Output Q
5.1.1
Output Voltage
VQ
4.9
5.0
5.1
V
0.1 mA < IQ<300 mA
6 V < VI < 16 V
5.1.2
Output Voltage
VQ
4.9
5.0
5.1
V
0.1 mA < IQ<100 mA
6 V < VI < 40 V
5.1.3
Dropout Voltage
Vdr
–
250
500
mV
IQ = 200 mA
Vdr = VI – VQ1)
5.1.4
Load Regulation
∆VQ, lo
– 40
15
40
mV
IQ = 5 mA to 250 mA
5.1.5
Line Regulation
∆VQ, li
– 20
5
20
mV
Vl = 10 V to 32 V
IQ = 5 mA
5.1.6
Output Current Limitation
IQ
IQ
301
–
–
mA
1)
–
–
800
mA
VQ = 0V
PSRR
dVQ
----------dT
–
60
–
dB
fr = 100 Hz; Vr = 0.5 Vpp
–
0.5
–
mV/K
–
5.1.7
Output Current Limitation
5.1.8
Power Supply Ripple Rejection2)
5.1.9
Temperature Output Voltage Drift
Current Consumption
5.1.10
Quiescent Current
Iq = II – IQ
Iq
–
20
30
µA
IQ = 0.1 mA; VEN = 5 V
Tj = 25 °C
5.1.11
Quiescent Current
Iq = II – IQ
Iq
–
–
40
µA
IQ = 0.1 mA; VEN = 5 V
Tj ≤ 80 °C
5.1.12
Current Consumption, Regulator
Disabled
Iq
–
5
9
µA
VEN = 0 V; Tj < 80°C
1) Measured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V.
2) not subject to production test, specified by design
Data Sheet
8
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
5.2
Typical Performance Characteristics Voltage Regulator
Current Consumption Iq versus
Junction Temperature TJ
Current Consumption Iq versus
Input Voltage VIQ
1_Iq-Tj.vsd
3_IQ-VI.VSD
Iq [µA]
Tj = 25°C
Iq [µA]
VI = 13.5V
100
40
IQ = 100 µA
IQ = 50mA
10
30
IQ = 10mA
IQ = 0.2mA
20
1
10
0.01
-40 -20
0
0
20 40 60 80 100 120 140
10
20
30
VI [V]
Tj [°C]
Current Consumption Iq versus
Output Current IQ
Output Voltage VQ versus
Junction Temperature TJ
5A_VQ-TJ.VSD
2_IQ-IQ.VSD
30
Iq [µA]
40
VI = 13.5 V
VQ [V]
VI = 13.5 V
Tj = 25 °C
5.05
20
Tj = -40 °C
15
5.00
10
4.95
5
4.90
0
Data Sheet
100
200
-40 -20
300
IQ [mA]
IQ =100µA...100mA
0
20 40 60 80 100 120 140
Tj [°C]
9
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
Dropout Voltage Vdr versus
Output Current IQ
Maximum Output Current IQ versus
Junction Temperature Tj
6_VDR-IQ.VSD
600
8_IQMAX-TJ.VSD
620
Vdr [mV]
VI = 13.5 V
IQ [mA]
Tj = 150 °C
400
580
Tj = 25 °C
300
200
560
540
Tj = -40 °C
520
100
100
0
200
500
-40 -20
300
0
20 40 60 80 100 120 140
Tj [°C]
IQ [mA]
Dropout Voltage Vdr versus
Junction Temperature
Maximum Output Current IQ versus
Input Voltage VI
7_VDR-TJ.VSD
600
9_SOA.VSD
600
Tj = 125 °C
IQ [mA]
Vdr [mV]
IQlim
Tj = 25 °C
IQ = 250 mA
400
400
300
300
IQ = 150mA
200
200
100
100
IQ = 10 mA
-40 -20
0
20 40 60 80 100 120 140
0
Tj [°C]
Data Sheet
10
20
30
40
VI [V]
10
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
Output Voltage VQ Start-up behavior
Region of Stability
12_ESR-IQ.VSD
100
14_VI-time_startup.vsd
CQ = 470nF ...10 µF
Tj = 25 °C
ESR CQ
[Ω]
VQ [V]
EN = HIGH
10
5.05
1
ILoad = 5mA
5.00
Stable
Region
4.90
0.1
4.80
0.01
0
100
50
150
3
2
1
200
4
t [ms]
IQ [mA]
Power Supply Ripple Rejection PSRR versus
Frequency f
Load Regulation ∆VQ versus
Output Current Change ∆IQ
13_PSRR.VSD
80
5
18a_dVQ-dIQ_Vi6V.vsd
0
VI = 6V
∆VQ
PSRR
[dB]
[mV]
60
50
IQ = 30 mA
IQ = 0.1 mA
-10
IQ = 100 mA
-15
Tj = 25 °C
-20
40
30
10
VRIPPLE = 1 V
VIN = 13.5 V
CQ = 10 µF Tantalum
Tj = 25 °C
100
1k
Tj = 150 °C
-25
10k
-30
100k
0
50
100
150
250
∆IQ [mA]
f [Hz]
Data Sheet
Tj = -40 °C
11
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
Load Regulation ∆VQ versus
Output Current Change dIQ
Line Regulation ∆VQ versus
Input Voltage Changed VI
18b_dVQ-dIQ_Vi135V.vsd
0
VI = 13.5V
∆VQ
IQ = 1mA
IQ = 10mA
IQ = 100mA
∆VQ
[mV]
[mV]
Tj = -40 °C
-15
-3
Tj = 25 °C
-20
-4
-25
0
50
100
150
IQ = 200mA
-5
Tj = 150 °C
-6
250
0
5
10 15 20 25 30 35 40 45
∆IQ [mA]
Load Regulation ∆VQ versus
Output Current Change ∆IQ
∆VI [V]
Line Regulation ∆VQ versus
Input Voltage Changed VI
18c_dVQ-dIQ_Vi28V.vsd
0
[mV]
-10
-2
-15
-3
Tj = -40 °C
-25
-5
Tj = 150 °C
50
100
150
-6
250
∆IQ [mA]
Data Sheet
IQ = 1mA
IQ = 10mA
IQ = 100mA
IQ = 200mA
-4
Tj = 25 °C
0
Tj = 25 °C
∆VQ
[mV]
-20
19_dVQ-dVI_25C.vsd
0
VI = 28
∆VQ
-30
Tj =150 °C
-2
-10
-30
19_dVQ-dVI__150C.vsd
0
0
5
10 15 20 25 30 35 40 45
∆VI [V]
12
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
Line Regulation ∆VQ versus
Input Voltage Change VI
Load Transient Response Peak Voltage ∆VQ
19_dVQ-dVI_-40C.vsd
0
Tj =40 °C
∆VQ
IQ
[mA]
[mV]
20_Load Trancient vs time 125.vsd
Tj = 125 °C
VI = 13.5 V
100
-2
-3
IQ = 1mA
IQ = 10mA
IQ = 100mA
0
IQ = 200mA
VQ
[V]
5.10
-4
5.00
4.90
-5
4.80
-6
0
5
0
10 15 20 25 30 35 40 45
80
160
240
t [µs]
∆VI [V]
Load Transient Response Peak Voltage ∆VQ
Line Transient Response Peak Voltage ∆VQ
20_Load Trancient vs time 25.vsd
IQ
[mA]
Tj = 25 °C
VI = 13.5 V
13.5
0
11.5
VQ
[V]
VQ
[V]
5.00
5.05
4.90
5.00
4.80
4.95
Data Sheet
80
160
240
Tj = 25 °C
15.5
100
0
21_Line Trancient vs time 25.vsd
VI
[V]
0
t [µs]
13
0.8
1.6
2.4
t [ms]
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
Line Transient Response Peak Voltage ∆VQ
I
21_Line Trancient vs time 125.vsd
VI
[V]
Tj = 125 °C
15.5
13.5
11.5
VQ
[V]
5.05
5.00
4.95
0
Data Sheet
0.8
1.6
2.4
t [ms]
14
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
5.3
Electrical Characteristics Enable Function
The Enable Function allows disabling/enabling the regulator via the input pin EN. The regulator is turned on in
case the pin EN is connected to a voltage higher than VEN,H. This can be e.g. the battery voltage, whereby no
additional pull-up resistor is needed. The regulator can be turned off by connecting the pin EN to a voltage less
than VEN,L, e.g. GND.
Electrical Characteristics Enable
VI =13.5 V; Tj = -40 °C to 150 °C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
5.3.13
Symbol
VEN,H
VEN,L
IEN,H
High Level Input Voltage
5.3.14
Low Level Input Voltage
5.3.15
High Level Input Current
5.4
Limit Values
Unit
Measuring Condition
VQ ≥ 4.9 V
VQ ≤ 0.3 V
VEN = 5 V
Min.
Typ.
Max.
3.1
–
–
V
–
–
0.8
V
–
3
4
µA
Typical Performance Characteristics Enable Function
Enabled Input Current IEN versus
Input Voltage VI , EN=Off
Enabled Input Current IEN versus
Enabled Input Voltage VEN
25_IINH vs VIN INH_off.vsd
24_IINH vs VINH.vsd
IEN
[µA]
1.0
IEN
[µA]
50
EN = OFF
Tj = 150°C
0.8
Tj = 150°C
Tj = 25°C
40
Tj = 25°C
Tj = -40°C
Tj = -40°C
0.6
30
0.4
20
0.2
10
10
20
30
40
10
VIN [V]
Data Sheet
20
30
40
VEN [V]
15
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
5.5
Electrical Characteristics Reset Function
The Reset function informs e.g. the microcontroller in case the output voltage has fallen below the lower threshold
VRT of typ. 4.65 V. The headroom VRH between the output voltage and the reset threshold is typically 350 mV.
Connecting the regulator to a battery voltage at first the reset signal remains LOW. When the output voltage has
reached the reset threshold VRT the reset output RO remains still LOW for the reset delay time tRD (typ. 16 ms).
Afterwards the reset output turns HIGH.
Electrical Characteristics Reset
VI =13.5 V; – 40 °C < Tj < 150 °C; all voltages with respect to ground (unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
5.5.1
Output Undervoltage Reset
Switching Threshold
VRT
4.50
4.65
4.80
V
VQ decreasing
VI = 6V
5.5.2
Output Undervoltage Reset
Headroom
VRH
–
350
–
mV
–
5.5.3
Reset Output Low Level Voltage
VROL
–
0.2
0.4
V
RRO = 10 kΩ;
VQ > 1 V
5.5.4
Integrated Reset Pull Up Resistor RRO
15
30
45
kΩ
–
5.5.5
Optional External Reset Pull Up
Resistor
RRO,ext
10
–
–
kΩ
–
5.5.6
Power On Reset Delay Time
10
16
22
ms
–
5.5.7
Reset Reaction Time
tRD
tRR
–
–
12
µs
–
Data Sheet
16
Rev. 1.0, 2009-06-01
TLE7272-2
Electrical Characteristics
5.6
Typical Performance Characteristics Reset Function
Reset Threshold VRT versus Junction Temperature Reset Delay tRD versus
Junction Temperature TJ
TJ
26_VRT VS TEMP.VSD
22
VI = 13.5 V
VQ [V]
tRD
VI = 13.5 V
[ms]
18
4.90
4.80
27_RESETDELAY VS TEMP.VSD
Reset Release
Threshold
16
4.70
14
Reset Trigger
Threshold
4.60
-40 -20
12
0
20 40 60 80 100 120 140
-40 -20 0
Tj [°C]
Data Sheet
20 40 60 80 100 120 140
Tj [°C]
17
Rev. 1.0, 2009-06-01
TLE7272-2
Package Outlines
6
Package Outlines
0.15 M C A-B D 14x
0.64 ±0.25
1
8
1
7
0.2
M
D 8x
Bottom View
3 ±0.2
A
14
6 ±0.2
D
Exposed
Diepad
B
0.1 C A-B 2x
14
7
8
2.65 ±0.2
0.25 ±0.05 2)
0.08 C
8˚ MAX.
C
0.65
0.1 C D
0.19 +0.06
1.7 MAX.
Stand Off
(1.45)
0 ... 0.1
0.35 x 45˚
3.9 ±0.11)
4.9 ±0.11)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
PG-SSOP-14-1,-2,-3-PO V02
Figure 4
Data Sheet
PG-SSOP-14 Exposed Pad
18
Rev. 1.0, 2009-06-01
TLE7272-2
Package Outlines
6.5 +0.15
-0.05
A
1)
2.3 +0.05
-0.10
0.9 +0.20
-0.01
0...0.15
5 x 0.6 ±0.1
1.14
4.56
0.5 +0.08
-0.04
0.51 MIN.
0.15 MAX.
per side
B
(5)
0.8 ±0.15
(4.24) 1 ±0.1
9.98 ±0.5
6.22 -0.2
5.7 MAX.
0.5 +0.08
-0.04
0.1 B
0.25 M A B
1) Includes mold flashes on each side.
All metal surfaces tin plated, except area of cut.
Figure 5
PG-TO252-5
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
19
Dimensions in mm
Rev. 1.0, 2009-06-01
TLE7272-2
Revision History
7
Revision History
Revision
Date
Changes
1.0
2009-06-01
initial version data sheet
Data Sheet
20
Rev. 1.0, 2009-06-01
Edition 2009-06-01
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
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characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
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question, please contact the nearest Infineon Technologies Office.
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