INFINEON TLE4678GM

Datasheet, Rev. 1.1, August 2009
TLE4678
Low Drop Out Linear Voltage Regulator
5 V Fixed Output Voltage
Automotive Power
TLE4678
Table of Contents
Table of Contents
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3
3.1
3.2
3.3
3.4
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment PG-DSO-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions PG-DSO-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Assignment PG-SSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Definitions and Functions PG-SSOP-14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
4.1
4.2
4.3
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5
5.1
5.2
5.3
Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6
6.1
6.2
Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Typical Performance Characteristics Current Consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
7
7.1
7.2
7.3
Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Reset Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
17
20
21
8
8.1
8.2
8.3
Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Typical Performance Characteristics Standard Watchdog Function . . . . . . . . . . . . . . . . . . . . . . . . .
22
22
25
27
9
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
10
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Datasheet
2
5
5
5
6
7
11
11
12
13
Rev. 1.1, 2009-08-27
Low Drop Out Linear Voltage Regulator
5 V Fixed Output Voltage
1
TLE4678
Overview
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Output Voltage 5 V ± 2%
Current Capability 200 mA
Ultra Low Current Consumption
Very Low Dropout Voltage
Watchdog Circuit for Monitoring a Microprocessor
with Programmable Load-dependent Activating Threshold
Reset Circuit Sensing the Output Voltage
with Programmable Switching Threshold and Delay Time
Reset Output Active Low Down to VQ = 1 V
Separated Reset and Watchdog Output
Excellent Line Transient Robustness
Maximum Input Voltage -42 V ≤ VI ≤ +45 V
Reverse Polarity Protection
Short Circuit Protected
Overtemperature Shutdown
Automotive Temperature Range -40 °C ≤ Tj ≤ 150 °C
Available in a small thermally enhanced PG-SSOP-14 package
Green Product (RoHS Compliant)
AEC Qualified
PG-DSO-14
PG-SSOP-14
Description
The TLE4678 is a monolithic integrated low dropout fixed output voltage regulator for loads up to 200 mA. An input
voltage of up to 45 V is regulated to an output voltage of 5 V. The integrated reset and watchdog function, as well
as several protection circuits, combined with a wide operating temperature range offered by the TLE4678 make it
suitable for supplying microprocessor systems in automotive environments.
The watchdog circuitry will be disabled in case the output current drops below a programmable threshold, enabling
a microcontroller to switch in stand-by mode. Modifying the reset threshold is possible by an optional resistor
divider.
The TLE4678 is available in a PG-DSO-14 package which makes it pin-compatible to the TLE4278 as well as in
a small thermally enhanced PG-SSOP-14 exposed pad package.
Type
Package
Marking
TLE4678GM
PG-DSO-14
TLE4678GM
TLE4678EL
PG-SSOP-14
TLE4678
Datasheet
3
Rev. 1.1, 2009-08-27
TLE4678
Block Diagram
2
Block Diagram
For details on the circuit blocks see the respective section in this datasheet.
TLE 4678
I
Q
Regulated Output Voltage
CQ
RO
Protection
Circuits
Bandgap
Reference
WO
Reset
and
Watchdog
Generator
WI
RADJ
WADJ
GND
Load
e. g.
Micro
Controller
XC22xx
GND
Blo ckDia gram _AppCircuit1 .vsd
Supply
D
CD
Figure 1
Datasheet
Block Diagram and Simplified Application Circuit
4
Rev. 1.1, 2009-08-27
TLE4678
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment PG-DSO-14
WO
1
14
RO
WADJ
2
13
I
GND
3
12
GND
GND
4
11
GND
GND
5
10
GND
D
6
9
Q
RADJ
7
8
WI
Pinout_SO14 .vsd
Figure 2
Pin Assignment PG-DSO-14 Package
3.2
Pin Definitions and Functions PG-DSO-14
Pin
Symbol
Function
1
WO
Watchdog Output
Open collector output with an internal pull-up resistor to the output Q.
An additional external pull-up resistor to the output Q is optional.
Leave open if the watchdog function is not needed.
2
WADJ
Watchdog Activating Threshold Adjust
An external resistor to GND determines the watchdog activating threshold.
Connect directly to GND for disabling the watchdog.
Connect directly to GND if the watchdog function is not needed.
Connect to output Q via 270 kΩ resistor for permanently activating the watchdog.
3, 4, 5,
GND
10, 11, 12
IC Ground
Interconnect the GND pins on PCB.
Connect to heat sink area.
6
D
Reset Delay and Watchdog Timing
Connect a ceramic capacitor D (pin 6) to GND for reset delay and watchdog timing
adjustment.
Leave only open if both, the reset and the watchdog function are not needed.
7
RADJ
Reset Switching Threshold Adjust
For reset threshold adjustment connect to a voltage divider from output Q to GND.
For triggering the reset at the internally determined threshold, connect this pin directly to
GND.
Connect directly to GND if the reset function is not needed.
Datasheet
5
Rev. 1.1, 2009-08-27
TLE4678
Pin Configuration
Pin
Symbol
Function
8
WI
Watchdog Input
Positive edge triggered input, usable for microcontroller monitoring.
Connect to GND if the watchdog function is not needed.
9
Q
5 V Regulator Output
Block to GND with a capacitor close to the IC pins, respecting capacitance and ESR
requirements given in the Chapter 4.2 Functional Range.
13
I
Regulator Input and IC Supply
For compensating line influences, a capacitor to GND close to the IC pins is
recommended.
14
RO
Reset Output
Open collector output with an internal pull-up resistor to the output Q.
An additional external pull-up resistor to the output Q is optional.
Leave open if the reset function is not needed.
3.3
Pin Assignment PG-SSOP-14
:2
QF
:$'*1'
'
QF
5$'-
52
QF
,
QF
4
QF
:,
3LQRXWB6623YVG
Figure 3
Datasheet
Pin Assignment PG-SSOP-14 Package
6
Rev. 1.1, 2009-08-27
TLE4678
Pin Configuration
3.4
Pin Definitions and Functions PG-SSOP-14
Pin
Symbol
Function
1
WO
Watchdog Output
Open collector output with an internal pull-up resistor to the output Q.
An additional external pull-up resistor to the output Q is optional.
Leave open if the watchdog function is not needed.
3
WADJ
Watchdog Activating Threshold Adjust
An external resistor to GND determines the watchdog activating threshold.
Connect directly to GND for disabling the watchdog.
Connect directly to GND if the watchdog function is not needed.
Connect to output Q via 270 kΩ resistor for permanently activating the watchdog.
4
GND
IC Ground
Interconnect with the exposed pad and heatsink area on PCB.
5
D
Reset Delay and Watchdog Timing
Connect a ceramic capacitor D (pin 6) to GND for reset delay and watchdog timing
adjustment.
Leave only open if both, the reset and the watchdog function are not needed.
7
RADJ
Reset Switching Threshold Adjust
For reset threshold adjustment connect to a voltage divider from output Q to GND.
For triggering the reset at the internally determined threshold, connect this pin directly to
GND.
Connect directly to GND if the reset function is not needed.
8
WI
Watchdog Input
Positive edge triggered input, usable for microcontroller monitoring.
Connect to GND if the watchdog function is not needed.
10
Q
5 V Regulator Output
Block to GND with a capacitor close to the IC pins, respecting capacitance and ESR
requirements given in the Chapter 4.2 Functional Range.
12
I
Regulator Input and IC Supply
For compensating line influences, a capacitor to GND close to the IC pins is
recommended.
14
RO
Reset Output
Open collector output with an internal pull-up resistor to the output Q.
An additional external pull-up resistor to the output Q is optional.
Leave open if the reset function is not needed.
2, 6, 9,
11, 13,
n. c.
Internally not connected
Connection to GND on PCB recommended.
Exposed pad
Datasheet
Connect to heat sink area on PCB. Interconnect with GND.
7
Rev. 1.1, 2009-08-27
TLE4678
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings
Absolute Maximum Ratings 1)
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
-42
45
V
–
-1
7
V
–
-0.3
7
V
–
-0.3
7
V
–
Voltage Rating
VI
4.1.1
Regulator Input and IC
Supply I
4.1.2
VQ
Reset Output RO
VRO
Reset Delay and Watchdog VD
4.1.3
4.1.4
Regulator Output Q
Timing D
4.1.5
Reset Switching Threshold VRADJ
Adjust RADJ
-0.3
7
V
–
4.1.6
Watchdog Input WI
-0.3
7
V
–
4.1.7
Watchdog Output WO
-0.3
7
V
–
4.1.8
Watchdog Activating
Threshold Adjust WADJ
VWI
VWO
VWADJ
-0.3
7
V
–
Tj
Tstg
-40
150
°C
–
-55
150
°C
–
VESD,HBM
-3
3
kV
Human Body Model 2)
Pin 13 (Input) only.
-2
2
kV
Human Body Model 2)
All pins except pin 13 (Input)
-1
1
kV
Charged Device Model 3)
Temperature
4.1.9
Junction Temperature
4.1.10
Storage Temperature
ESD Susceptibility
4.1.11
ESD Resistivity
4.1.12
4.1.13
VESD,CDM
1) Not subject to production test, specified by design.
2) ESD susceptibility, Human Body Model “HBM” according to EIA/JESD 22-A114B.
3) ESD susceptibility, Charged Device Model “CDM” according to EIA/JESD22-C101 or ESDA STM5.3.1.
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
Datasheet
8
Rev. 1.1, 2009-08-27
TLE4678
General Product Characteristics
4.2
Pos.
Functional Range
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
4.2.1
Input Voltage Range for
Normal Operation
VI(nor)
VQ + Vdr
45
V
1)
4.2.2
Extended Input Voltage
Range
VI(ext)
3.3
45
V
2)
4.2.3
Input Voltage Transient
Immunity
dVI/dt
-10
20
V/µs
dVI ≤ 10 V; VI > 9 V;
No trigger of WO, RO. 3)
4.2.4
Junction Temperature
150
Output Capacitor
Requirements
Tj
CQ
ESRCQ
-40
4.2.5
10
°C
–
µF
–4)
3
Ω
–5)
1) For specification of the output voltage VQ and the dropout voltage Vdr, see Chapter 5 Voltage Regulator.
2) The output voltage VQ will follow the input voltage, but is outside the specified range.
4.2.6
–
For details see Chapter 5 Voltage Regulator.
3) Transient measured directly at the input pin. Not subject to production test, specified by design.
4) The minimum output capacitance requirement is applicable for a worst case capacitance tolerance of 30%.
5) Relevant ESR value at f = 10 kHz.
Note: Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
Datasheet
9
Rev. 1.1, 2009-08-27
TLE4678
General Product Characteristics
4.3
Thermal Resistance
Note: This thermal data was generated in accordance with JEDEC JESD51 standards.
For more information, go to www.jedec.org.
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
–
27
–
K/W
Pins 3 - 5 and 10 - 12
fixed to TA 1)
–
104
–
K/W
Footprint only 1) 2)
4.3.3
–
73
–
K/W
300 mm2 PCB
heatsink area 1) 2)
4.3.4
–
65
–
K/W
600 mm2 PCB
heatsink area 1) 2)
4.3.5
–
63
–
K/W
2s2p PCB 1) 3)
–
10
–
K/W
– 1)
–
140
–
K/W
Footprint only 1) 2)
4.3.8
–
63
–
K/W
300mm2 PCB
heatsink area 1) 2)
4.3.9
–
53
–
K/W
600mm2 PCB
heatsink area 1) 2)
4.3.10
–
47
–
K/W
2s2p PCB 1) 3)
TLE4678GM (PG-DSO-14)
4.3.1
Junction – Soldering Point RthJSP
4.3.2
Junction – Ambient
RthJA
TLE4678EL (PG-SSOP-14)
4.3.6
Junction to Case
4.3.7
Junction to Ambient
RthJC
RthJA
1) Not subject to prodution test; specified by design.
2) Specified RthJA value is according to JEDEC JESD 51-3 at natural convection on FR4 1s0p board; The Product
(Chip+Package) was simulated on a 76.2 × 114.3 × 1.5 mm3 board with 1 copper layer (1 x 70µm Cu).
3) Specified RthJA value is according to JEDEC JESD51-2,-5,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm³ board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Where applicable a thermal via array under the exposed pad contacted the first inner copper layer.
Datasheet
10
Rev. 1.1, 2009-08-27
TLE4678
Voltage Regulator
5
Voltage Regulator
5.1
Description Voltage Regulator
The output voltage VQ is controlled by comparing a portion of it to an internal reference and driving a PNP pass
transistor accordingly. Saturation control as a function of the load current prevents any oversaturation of the pass
element. The control loop stability depends on the output capacitor CQ, the load current, the chip temperature and
the poles/zeros introduced by the integrated circuit. To ensure stable operation, the output capacitor’s capacitance
and its equivalent series resistor ESR requirements given in the table “Functional Range” on Page 9 have to be
maintained. For details see also the typical performance graph “Output Capacitor Series Resistor ESRCQ vs.
Output Current IQ”. Also, the output capacitor shall be sized to buffer load transients.
An input capacitor CI is not needed for the control loop stability, but recommended to buffer line influences.
Connect the capacitors close to the IC terminals.
Protection circuitry prevent the IC as well as the application from destruction in case of catastrophic events. These
safeguards contain output current limitation, reverse polarity protection as well as thermal shutdown in case of
overtemperature.
In order to avoid excessive power dissipation that could never be handled by the pass element and the package,
the maximum output current is decreased at input voltages above VI = 22 V.
The thermal shutdown circuit prevents the IC from immediate destruction under fault conditions (e.g. output
continuously short-circuited) by switching off the power stage. After the chip has cooled down, the regulator
restarts. This leads to an oscillatory behaviour of the output voltage until the fault is removed. However, a junction
temperature above 150 °C is outside the maximum rating and therefore reduces the IC lifetime.
The TLE4678 allows a negative supply voltage. However, several small currents are flowing into the IC increasing
its junction temperature. This has to be considered for the thermal design, respecting that the thermal protection
circuit is not operating during reverse polarity condition.
II
Supply
I
Q
+
VI
+
Saturation Control
Current Limitation
CQ
CI
Bandgap
Reference
Temperature
Shutdown
VQ
LOAD
GND
BlockDiagram _VoltageRegulator .vsd
Figure 4
Regulated
Output Voltage
IQ
Block Diagram Voltage Regulator Circuit
9
9,
9GU
94QRP
9,H[WPLQ
94
G94
,ORDG
§
&4
GW
G94
,4PD[,ORDG
§
&4
GW
'LDJUDPB2XWSXW,QSXW9ROWDJHVYJ
W
Figure 5
Datasheet
Output Voltage vs. Input Voltage
11
Rev. 1.1, 2009-08-27
TLE4678
Voltage Regulator
5.2
Electrical Characteristics Voltage Regulator
Electrical Characteristics: Voltage Regulator
VI = 13.5 V, Tj = -40 °C to +150 °C,
all voltages with respect to ground, direction of currents as shown in Figure 4 (unless otherwise specified)
Pos.
Parameter
Symbol
5.2.1
Output Voltage
VQ
Limit Values
Min.
Typ.
Max.
4.9
5.0
5.1
Unit
Conditions
V
0 mA ≤ IQ ≤ 200 mA;
8 V ≤ VI ≤ 18 V
5.2.2
0 mA ≤ IQ ≤ 150 mA;
6 V ≤ VI ≤ 18 V
5.2.3
0 mA ≤ IQ ≤ 100 mA;
18 V ≤ VI ≤ 32 V
Tj ≤ 105 °C 1) 2)
5.2.4
0 mA ≤ IQ ≤ 10 mA;
32 V ≤ VI ≤ 45 V
Tj ≤ 105 °C 1) 2)
5.2.5
0.3 mA ≤ IQ ≤ 100 mA;
18 V ≤ VI ≤ 32 V 1)
5.2.6
0.3 mA ≤ IQ ≤ 10 mA;
32 V ≤ VI ≤ 45 V 1)
5.2.7
Load Regulation
steady-state
|dVQ,load|
–
5
30
mV
5.2.16
Overtemperature Shutdown
Threshold
Tj,sd
151
–
200
°C
IQ = 1 mA to 150 mA;
VI = 6 V
VI = 6 V to 32 V;
IQ = 5 mA
fripple = 100 Hz;
Vripple = 1 Vpp 2)
IQ = 50 mA 3)
IQ = 150 mA 3)
0 V ≤ VQ ≤ 4.8 V
VI = 0 V; VQ = 5 V
VI = -16 V; VQ = 0 V
VI = -42 V; VQ = 0 V
Tj increasing 2)
5.2.8
Line Regulation
steady-state
|dVQ,line|
–
5
20
mV
5.2.9
Power Supply Ripple
Rejection
PSRR
60
65
–
dB
5.2.10
Dropout Voltage
Vdr
–
90
200
mV
5.2.11
Vdr = VI - VQ
–
165
350
mV
5.2.12
Output Current Limitation
201
350
500
mA
5.2.13
Reverse Current
-1.5
-0.7
–
mA
5.2.14
Reverse Current
at Negative Input Voltage
-2
-1
–
mA
-5
-3
–
mA
5.2.17
Overtemperature Shutdown
Threshold Hysteresis
Tj,hy
–
20
–
K
Tj decreasing 2)
5.2.15
IQ,max
IQ
II
1) See typical performance graph for details.
2) Parameter not subject to production test; specified by design.
3) Measured when the output voltage VQ has dropped 100 mV from its nominal value.
Datasheet
12
Rev. 1.1, 2009-08-27
TLE4678
Voltage Regulator
5.3
Typical Performance Characteristics Voltage Regulator
Output Voltage VQ vs.
Junction Temperature Tj
Output Capacitor Series Resistor ESRCQ
vs. Output Current IQ
VQ -Tj. v s d
100
VQ [V]
ESR 1 0 u-IQ .v s d
ESRCQ
C Q ≥ 10 µF;
6 V ≤ VI ≤ 28 V;
-40 °C ≤ Tj ≤ 150 °C
[Ω]
10
5.02
5.00
1
Stable
Region
4.98
0 .1
4.96
-40 -20
0
20 40
60
0.01
80 100 120 140
T j [°C]
0
40
80
120
160
IQ [mA]
Output Current Limitation IQ,max
vs. Input VoltageV I
SO A.v s d
IQ,ma x
[mA]
400
Tj = 25 °C
T j = 125 °C
300
200
100
0
10
20
30
40
VI [V]
Datasheet
13
Rev. 1.1, 2009-08-27
TLE4678
Voltage Regulator
Dropout Voltage Vdr vs.
Output Current IQ
Dropout Voltage Vdr vs.
Junction Temperature Tj
300
Vd r- IQ.v s d
Vdr [mV]
Vd r- Tj. v s d
Vdr [mV]
IQ = 150 mA
200
200
T j = 125 °C
100
150
100
50
T j = 25 °C
20
IQ = 50 mA
IQ = 200 µA
0.2
1
10
0
-40 -20
100
20
40
60
80 100 120 140
IQ [mA]
Tj [°C]
Reverse Output Current IQ vs.
Output Voltage VQ
Reverse Current II vs.
Input Voltage VI
0
0
IQ-VQ @ VI=0 v. s d
IQ [mA]
VI = 0 V
II [mA]
-0.4
II-VI@VQ =0 .v s d
VQ = 0 V
-1
T j = -40 °C
-0.6
-1.5
T j = 150 °C
Tj = -40 °C
-2
-0.8
Tj = 25 °C
-2.5
T j = 150 °C
0
1.6
3.2
4 .8
6
-32
V Q [V]
Datasheet
- 24
-16
-8
0
VI [V]
14
Rev. 1.1, 2009-08-27
TLE4678
Current Consumption
6
Current Consumption
6.1
Electrical Characteristics Current Consumption
Electrical Characteristics: Current Consumption
VI = 13.5 V, Tj = -40 °C to +150 °C,
all voltages with respect to ground, direction of currents as shown in Figure 6 (unless otherwise specified).
Pos.
Parameter
6.1.1
Current Consumption
Iq1
Watchdog Deactivated
Iq = II - IQ
6.1.2
Symbol
Limit Values
Min.
Typ.
Max.
–
60
80
Unit
Conditions
µA
IQ ≤ 200 µA; Tj ≤ 25 °C
Watchdog deactivated
–
70
µA
85
IQ ≤ 200 µA; Tj ≤ 85 °C
Watchdog deactivated
–
110
130
µA
IQ ≤ 2 mA; Tj ≤ 25 °C
Watchdog activated
6.1.4
–
120
135
µA
IQ ≤ 2 mA; Tj ≤ 85 °C
Watchdog activated
6.1.5
–
1
2
mA
6.1.6
–
5.5
8
mA
IQ = 50 mA
IQ = 150 mA
6.1.3
Current Consumption
Iq = II - IQ
II
Supply
Iq2
I
Q
IQ
Voltage Regulator
+
+
VI
CQ
CI
CurrentConsumption _ ParameterDefinition .vsd
Regulated
Output Voltage
VQ
LOAD
GND
Iq
Figure 6
Datasheet
Parameter Definition
15
Rev. 1.1, 2009-08-27
TLE4678
Current Consumption
6.2
Typical Performance Characteristics Current Consumption
Current Consumption Iq vs.
Junction Temperature Tj
Current Consumption Iq vs.
Junction Temperature Tj
140
Iq -Tj .v s d
Iq [mA]
VI = 13 .5 V
Iq1 0 0 u _ Tj. v s d
IQ = 100 µA
VI = 13.5 V
Iq [µA]
Watchdog activated
Watchdog deactivated
10
IQ = 150 mA
100
IQ = 50 mA
1
80
60
IQ = 2 mA
0.1
40
0.01
-40 -20
0
20
40
60
80 100 120 140
-40
40
0
80
120
Tj [°C]
150
T j [°C]
Current Consumption Iq vs.
Output Current IQ
Current Consumption Iq vs.
Input Voltage VI
Iq -IQ .v s d
24
Iq [mA]
Iq -VI.v s d
Tj = 25 °C
Iq [mA]
10
16
RL = 50 Ω
1
12
VI = 13.5 V
T j = 125 °C
VI = 13 .5 V
Tj = 25 °C
RL = 500 Ω
8
0.1
4
0.01
0.2
1
10
0
100
IQ [mA]
Datasheet
2
4
6
8
VI [V]
16
Rev. 1.1, 2009-08-27
TLE4678
Reset Function
7
Reset Function
7.1
Description Reset Function
The reset function provides several features:
Output Undervoltage Reset:
An output undervoltage condition is indicated by setting the Reset Output “RO” to “low”. This signal might be used
to reset a microcontroller during low supply voltage.
Power-On Reset Delay Time
The power-on reset delay time td,PWR-ON allows a microcontroller and oscillator to start up. This delay time is the
time period from exceeding the upper reset switching threshold VRT,hi until the reset is released by switching the
reset output “RO” from “low” to “high”. The power-on reset delay time td,PWR-ON is defined by an external delay
capacitor CD connected to pin “D” which is charged up by the delay capacitor charge current ID,ch starting from
VD = 0 V.
In case a power-on reset delay time td,PWR-ON different from the value for CD = 100nF is required, the delay
capacitor’s value can be derived from the specified value given in Item 7.2.15:
CD = 100nF × td,PWR-ON / td,PWR-ON,100nF
(1)
with
td,PWR-ON: Desired power-on reset delay time
td,PWR-ON,100nF: Power-on reset delay time specified in Item 7.2.15
CD: Delay capacitor required.
The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s tolerance.
•
•
•
Undervoltage Reset Delay Time
Unlike the power-on reset delay time, the undervoltage reset delay time td considers a short output undervoltage
event where the delay capacitor CD is assumed to be discharged to VD = VDST,lo only before the charging sequence
starts. Therefore, the undervoltage reset delay time td is defined by the delay capacitor charge current ID,ch starting
from VD = VDST,lo and the external delay capacitor CD.
A delay capacitor CD for a different undervoltage reset delay time as specified in Item 7.2.14 can be calculated
similar as above:
CD = 100nF × td / td,100nF
(2)
with
td: Desired undervoltage reset delay time
td,100nF: Power-on reset delay time specified in Item 7.2.14
CD: Delay capacitor required
The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s tolerance.
•
•
•
Datasheet
17
Rev. 1.1, 2009-08-27
TLE4678
Reset Function
Reset Reaction Time
In case the output voltage of the regulator drops below the output undervoltage lower reset threshold VRT,lo, the
delay capacitor CD is discharged rapidly. Once the delay capacitor’s voltage has reached the lower delay switching
threshold VDST,lo, the reset output “RO” will be set to “low”.
Additionally to the delay capacitor discharge time trr,d, an internal reaction time trr,int applies. Hence, the total reset
reaction rime trr,total becomes:
trr,total = trr,int + trr,d
(3)
with
•
•
•
trr,total: Total reset reaction time
trr,int: Internal reset reaction time; see Item 7.2.16.
trr,d: Delay capacitor discharge time. For a capacitor CD different from the value specified in Item 7.2.17, see
typical performance graphs.
Reset Ouput “RO”
The reset output “RO” is an open collector output with an integrated pull-up resistor. In case a lower-ohmic “RO”
signal is desired, an external pull-up resistor to the output “Q” can be connected. Since the maximum “RO” sink
current is limited, the optional external resistor RRO,ext must not below as specified in Item 7.2.8.
Reset Output “RO” Low for VQ ≥ 1 V
In case of an undervoltage reset condition reset output “RO” is held “low” for VQ ≥ 1 V, even if the input voltage VI
is 0 V. This is achieved by supplying the reset circuit from the output capacitor.
Reset Adjust Function
The undervoltage reset switching threshold can be adjusted according to the application’s needs by connecting
an external voltage divider (RADJ1, RADJ2) at pin “RADJ”. For selecting the default threshold connect pin “RADJ” to
GND. The reset adjustment range is given in Item 7.2.6.
When dimensioning the voltage divider, take into consideration that there will be an additional current constantly
flowing through the resistors.
With a voltage divider connected, the reset switching threshold VRT,adj is calculated as follows:
VRT,adj = VRADJ,th × (RADJ,1 + RADJ,2) / RADJ,2
(4)
with
•
•
•
VRT,adj: Desired reset switching threshold.
RADJ,1, RADJ,2: Resistors of the external voltage divider, see Figure 7.
VRADJ,th: Reset adjust switching threshold given in Item 7.2.5.
Datasheet
18
Rev. 1.1, 2009-08-27
TLE4678
Reset Function
I
Q
R RO
Int.
Supply
Control
VDD
CQ
RO
ID ,ch
Reset
IRO
VDST
VRADJ ,th
optional
Supply
OR
MicroController
RADJ ,1
RADJ
IRADJ
GND
opti onal
IDR ,dsch
D
BlockDiagram _ResetAdjust .vsd
GND
RADJ ,2
CD
Figure 7
Block Diagram Reset Circuit
VI
t
VQ
t < trr,blank
V RH
V RT,hi
V RT,lo
1V
t
td
VD
VDS T,hi
VDS T,lo
t
VRO
V RO,low
td
trr,total
Datasheet
t rr,total
td
t rr,total
1V
t
Thermal
Shutdown
Figure 8
td
Input
Voltage Dip
Undervoltage
Spike at
output
Overload
T i mi n g Di a g ra m_ Re se t. vs
Timing Diagram Reset
19
Rev. 1.1, 2009-08-27
TLE4678
Reset Function
7.2
Electrical Characteristics Reset Function
Electrical Characteristics: Reset Function
VI = 13.5 V, Tj = -40 °C to +150 °C,
all voltages with respect to ground, direction of currents as shown in Figure 7 (unless otherwise specified).
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Unit
Conditions
Max.
Output Undervoltage Reset Comparator Default Values (Pin RADJ = GND)
7.2.1
Output Undervoltage Reset
Lower Switching Threshold
VRT,lo
4.6
4.7
4.8
V
VI = 0 V
VQ decreasing
RADJ = GND
7.2.2
Output Undervoltage Reset
Upper Switching Threshold
VRT,hi
4.7
4.8
4.9
V
VI within operating range
VQ increasing
RADJ = GND
7.2.3
7.2.4
Output Undervoltage Reset
Switching Hysteresis
VRT,hy
Output Undervoltage Reset
Headroom
VRH
250
300
–
mV
Calculated Value:
VQ - VRT,lo
VI within operating range
IQ = 50 mA
RADJ = GND
60
120
–
mV
VI within operating range
RADJ = GND.
Reset Threshold Adjustment
7.2.5
Reset Adjust
Lower Switching Threshold
VRADJ,th
1.176
1.20
1.224
V
VI = 0 V
3.2 V ≤ VQ < 5 V
7.2.6
Lower Reset Threshold
Adjustment Range 1)
VRT,adj
3.20
–
VRT,lo
V
–
VI = 0 V;
RRO,ext = 3.3 kΩ;
1 V ≤ VQ ≤ VRT,low
VI = 0 V;
VRO = 0.4 V
1 V ≤ VQ ≤ VRT,low
Reset Output RO
7.2.7
Reset Output Low Voltage
VRO,low
–
0.2
0.4
V
7.2.8
Reset Output
RRO,ext
External Pull-up Resistor to Q
3
–
–
kΩ
7.2.9
Reset Output
Internal Pull-up Resistor
RRO
20
30
40
kΩ
internally connected
to Q
Reset Delay Timing
7.2.10
Upper Delay
Switching Threshold
VDST,hi
–
1.21
–
V
–
7.2.11
Lower Delay
Switching Threshold
VDST,lo
–
0.30
–
V
–
7.2.12
Delay Capacitor
Charge Current
ID,ch
–
2.8
–
µA
VD = 1 V
7.2.13
Delay Capacitor
Reset Discharge Current
IDR,dsch
–
80
–
mA
VD = 1 V
7.2.14
Undervoltage Reset Delay
Time
td,100nF
23
31
41
ms
Calculated value;
CD = 100 nF 2);
CD discharged to VDST,lo
Datasheet
20
Rev. 1.1, 2009-08-27
TLE4678
Reset Function
Electrical Characteristics: Reset Function (cont’d)
VI = 13.5 V, Tj = -40 °C to +150 °C,
all voltages with respect to ground, direction of currents as shown in Figure 7 (unless otherwise specified).
Pos.
7.2.15
Parameter
Symbol
Power-on Reset Delay Time
td,PWR-
Limit Values
Min.
Typ.
Max.
30
43
56
Unit
ms
ON,100nF
7.2.16
Internal Reset Reaction Time
7.2.17
Delay Capacitor
Discharge Time
7.2.18
Total Reset Reaction Time
trr,int
trr,d,100nF
–
9
15
µs
–
1.5
3
µs
10.5
18
µs
trr,total,100nF –
Conditions
Calculated value;
CD = 100 nF 2);
CD discharged to 0 V;
CD = 0 nF
CD = 100 nF 2)
Calculated Value:
trr,d,100nF + trr,int ;
CD = 100 nF 2)
1) Related Parameters (VRT,hi, VRT,hy) are scaled linear when the Reset Switching Threshold is modified.
2) For programming a different delay and reset reaction time, see Chapter 7.1.
7.3
Typical Performance Characteristics Reset Function
Reset Delay Time td, td,PWR-ON versus
Delay Capacitor CD
Undervoltage Reset Switching Thresholds
VRT,lo, VRT,hi versus Tj
VRT-Tj .v s d
td -CD .v s d
td ,
VQ [V],
VRT [V]
td ,PWR- ON
Pin RADJ = GND
[ms]
5.0
VQ
100
Output Undervoltage
Reset Headroom VRH
4,9
4,8
4,7
td (typ.)
VRT,hi
10
VRT,lo
-40 -20
0
20
40
60
1
10
80 100 120 140
Tj [°C]
Datasheet
td,PWR-ON (typ.)
100
1000
CD [nF]
21
Rev. 1.1, 2009-08-27
TLE4678
Watchdog Function
8
Watchdog Function
8.1
Description
The TLE4678 features a load dependent watchdog function with a programmable activating threshold as well as
a programmable watchdog timing.
The watchdog function monitors a microcontroller, including time base failures. In case of a missing rising edge
within a certain pulse repetition time, the watchdog output is set to ‘low’. The programming of the expected
watchdog pulse repetition time can be easily done by an external reset delay capacitor.
The watchdog output “WO” is separated from the reset output “RO”. Hence, the watchdog output might be used
as an interrupt signal for the microcontroller independent from the reset signal. It is possible to interconnect pin
“WO” and pin “RO” in order to establish a wire-or function with a dominant low signal.
Programmable Watchdog Activation Threshold and Hysteresis
In case a microcontroller is set to sleep mode or to low power mode, its current consumption is very low and the
controller might not be able to send any watchdog pulses to the regulators watchdog input “WI”. In order to avoid
unwanted wake-up signals due to missing edges at pin “WI”, the TLE4678 watchdog function can be activated
dependent on the regulator’s output current. The TLE4678 comprises a default watchdog activating threshold
IQ,WDact,th with a small hysteresis IQ,WDact,hy. The thresholds can be increased by connecting an external resistor
RWADJ,ext to pin “WADJ”. For using the default watchdog activating threshold, leave pin “WADJ” open.
The following equation calculates the external resisistor RWADJ,ext that is needed at pin “WADJ” for activating the
watchdog at a desired output current IQ,WDact,th:
RWADJ,ext =
FWDact,th × RWADJ,int
for IQ,WDact,th larger than the default value given in Item 8.2.1. (5)
(RWADJ,int × IQ,WDact,th) - FWDact,th
At decreasing output current, the deactivation threshold then would be:
IQ,WDdeact,th = FWDdeact,th ×
RWADJ,int + RWADJ,ext
RWADJ,int × RWADJ,ext
(6)
The watchdog activating threshold hysteresis IQ,WDact,hy calculates:
IQ,WDact,hy = FWDact,hy ×
RWADJ,int + RWADJ,ext
RWADJ,int × RWADJ,ext
(7)
with:
•
•
•
•
•
•
IQ,WDact,th : Desired “Watchdog Activating Threshold”
RWADJ,int : Internal Watchdog Adjust Resistor
RWADJ,ext : External Watchdog Adjust Resistor
FWDact,th : Activating Threshold Factor
FWDdeact,th : Deactivating Threshold Factor
FWDact,hy : Activating Threshold Factor Hysteresis
Datasheet
22
Rev. 1.1, 2009-08-27
TLE4678
Watchdog Function
Supply
I
IQ
Q
VDD
IWADJ
Control
CQ
RWO
VWADJ,th
RWADJ ,ext
optional
WADJ
MicroController
RWADJ ,int
(optional)
Int.
Supply
WI
Edge
Detect
OR
S
WO
I D,ch
Reset
IWO
VDW
&
1
R
IDW ,dsch
WI
I/O
VDW,hi
GND
D
GND
BlockDiagram _WatchdogAdjust .vsd
CD
Figure 9
Block Diagram Watchdog Circuit
Figure 10
Watchdog Output “WO”
The watchdog output “WO” is an open collector output with an integrated pull-up resistor. In case a lower-ohmic
“WO” signal is desired, an external pull-up resistor to the output “Q” can be connected. Since the maximum “WO”
sink current is limited, the optional external resistor RWO,ext needs to be sized to comply with the watchdog output
sink current (see Item 8.2.15 and Item 8.2.16).
Watchdog Input “WI”
The watchdog is triggered by an positive edge at the watchdog input “WI”. The signal is filtered by a bandpass
filter and therefore its amplitude and slope has to comply with the specification Item 8.2.10 to Item 8.2.14. For
details on the test pulse applied, see Figure 11.
V WI
V WI
tWI,p
VWI,hi
VWI,lo
VWI,hi
VWI,lo
d VWI / d t
t
Figure 11
Datasheet
1 / fWI
t
Test Pulses Watchdog Input WI
23
Rev. 1.1, 2009-08-27
TLE4678
Watchdog Function
Watchdog Timing
Positive edges at the watchdog input pin “WI” are expected within the watchdog trigger time frame tWI,tr, otherwise
a low signal at pin “WO” is generated. If a watchdog low signal at pin “WO” is generated, it remains low for tWD,lo.
All watchdog timings are defined by charging and discharging the capacitor CD at pin “D”. Thus, the watchdog
timing can be programmed by selecting CD. For timing details see also Figure 12.
In case a watchdog trigger time period tWI,tr different from the value for CD = 100nF is required, the delay
capacitor’s value can be derived from the specified value given in Item 8.2.22:
CD = 100nF × tWI,tr / tWI,tr,100nF
(8)
The watchdog output low time tWD,lo and the watchdog period tWD,p then becomes:
tWD,lo = tWD,lo,100nF × CD / 100nF
(9)
tWD,p = tWI,tr + tWD,lo
(10)
The formula is valid for CD ≥ 10nF. For precise timing calculations consider also the delay capacitor’s tolerance.
VWI
V WI,hi
V WI,lo
dV WI / d t
outside spec
No positive
VWI edge
VD
tWI,tr
1/ fWI
t WI,p
t
TWI,p
VDW,hi
VDW,lo
t
t WD,lo
t WD,lo
VWO
V WO,low
Figure 12
Datasheet
T i mi n g Di a g ra m_ W a t ch d o g .vsd
t
Timing Diagram Watchdog
24
Rev. 1.1, 2009-08-27
TLE4678
Watchdog Function
8.2
Electrical Characteristics Watchdog Function
Electrical Characteristics Watchdog Function
VI = 13.5 V, Tj = -40 °C to +150 °C,
all voltages with respect to ground, direction of currents as shown in Figure 9 (unless otherwise specified).
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Unit
Conditions
Max.
Default Watchdog Activating Threshold (pin WADJ left open)
8.2.1
Watchdog Activating
Threshold
IQ,WDact,th 0.65
1.1
1.5
mA
IQ increasing
8.2.2
Watchdog Deactivating
Threshold
IQ,WDdeact,th 0.55
0.9
–
mA
IQ decreasing
8.2.3
Watchdog Activating
Threshold Hysteresis
IQ,WDact,hy 50
200
–
µA
–
Adjustable Watchdog Activating Threshold (external resistor connected to pin WADJ)
8.2.4
Activating Threshold
8.2.5
Current ratio
8.2.6
Internal Watchdog Adjust
Resistor
8.2.7
Activating Threshold Factor
VWADJ,th –
IQ / IWADJ –
RWADJ,int 96
FWDact,th
693
–
mV
–
208
–
VWADJ = 0V
131
–
175
kΩ
–
127
144
162
mA
× kΩ
Calculated value 1)
8.2.8
Deactivating Threshold Factor FWDdeact,th 104
118
–
mA
× kΩ
Calculated value 1)
8.2.9
Activating Threshold
Switching Hysteresis Factor
FWDact,hy
7
26
–
mA
× kΩ
Calculated value 1)
Watchdog Input WI
8.2.10
Watchdog Input
Low Signal Valid
VWI,lo
–
–
0.8
V
– 2)
8.2.11
Watchdog Input
High Signal Valid
VWI,hi
2.6
–
–
V
– 2)
8.2.12
Watchdog Input
High Signal Pulse Length
tWI,p
0.5
–
–
µs
VWI ≥ VWI,high 2)
8.2.13
Watchdog Input Signal
Slew Rate
dVWI/dt
1
–
–
V/µs
VWI,low ≤ VWI ≤ VWI,high 2)
8.2.14
Watchdog Input Signal
Frequency Capture Range
fWI
–
–
1
MHz
Square Wave,
50% Duty Cycle 2)
Datasheet
25
Rev. 1.1, 2009-08-27
TLE4678
Watchdog Function
Electrical Characteristics Watchdog Function
VI = 13.5 V, Tj = -40 °C to +150 °C,
all voltages with respect to ground, direction of currents as shown in Figure 9 (unless otherwise specified).
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
Watchdog Output WO
8.2.15
Watchdog Output
Low Voltage
VWO,low
–
0.2
0.4
V
IWO = 1 mA;
Watchdog active;
VWI = 0 V
8.2.16
Watchdog Output
Maximum Sink Current
IWO,max
1.5
13
30
mA
VWO = 0.8 V;
Watchdog Output
Internal Pull-up Resistor
RWO
20
30
40
kΩ
–
8.2.17
Watchdog active;
VWI = 0 V
Watchdog Timing
8.2.18
Delay Capacitor
Charge Current
ID
–
2.78
–
µA
VD = 1 V
8.2.19
Delay capacitor
watchdog discharge current
IDW,disch
–
1.39
–
µA
VD = 1 V
8.2.20
Upper watchdog timing
threshold
VDW,hi
–
1.2
–
V
–
8.2.21
Lower watchdog timing
threshold
VDW,lo
–
0.7
–
V
–
8.2.22
Watchdog Trigger Time
tWI,tr,100nF 25
36
47
ms
Calculated value;
CD = 100 nF 3)
8.2.23
Watchdog Output Low Time
tWD,lo,100nF 13
18
23
ms
Calculated value;
CD = 100 nF 3)
VQ > VRT,lo
8.2.24
Watchdog Period
tWD,p,100nF 38
54
70
ms
Calculated value;
tWI,tr,100nF + tWD,lo,100nF
CD = 100 nF 3)
1) See Chapter 8.1 for calculation hint
2) For details on the test pulse applied, see Figure 11.
3) For programming a different watchdog timing, see Chapter 8.1..
Datasheet
26
Rev. 1.1, 2009-08-27
TLE4678
Watchdog Function
8.3
Typical Performance Characteristics Standard Watchdog Function
Watchdog Activating Threshold VWADJact,th
vs. External Resistor RWADJ,ext
24
Watchdog Deactivating Threshold VWADJdeact,th
vs. External Resistor RWADJ,ext
24
VWADJ a c t-RWADJ e x t.v s d
VWADJ d e a c t-RWADJ e x t.v s d
IQ,WDact,th
IQ,WDact,th
[mA]
[mA]
16
16
typ.
14
14
12
min.
12
10
10
max.
8
8
6
6
4
4
2
2
4
10
100
1000
4000
typ.
4
RWAD J ,e xt [kΩ]
10
100
1000
4000
RWAD J ,e xt [kΩ]
Watchdog Trigger Time tWI,tr vs.
Delay Capacitor CD
tWItr-CD v. s d
tWI,tr
[ms]
100
max.
typ.
10
min .
1
10
100
1000
C D [nF]
Datasheet
27
Rev. 1.1, 2009-08-27
TLE4678
Package Outlines
9
Package Outlines
1.75 MAX.
C
1)
4 -0.2
B
1.27
0.64 ±0.25
0.1
2)
0.41+0.10
-0.06
6±0.2
0.2 M A B 14x
14
0.2 M C
8
1
7
1)
8.75 -0.2
8˚MAX.
0.19 +0.06
0.175 ±0.07
(1.47)
0.35 x 45˚
A
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
GPS01230
Figure 13
Outline PG-DSO-14
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
Datasheet
28
Rev. 1.1, 2009-08-27
TLE4678
Package Outlines
0.19 +0.06
0.08 C
0.15 M C A-B D 14x
0.64 ±0.25
1
8
1
7
0.2
M
D 8x
Bottom View
3 ±0.2
A
14
6 ±0.2
D
Exposed
Diepad
B
0.1 C A-B 2x
14
7
8
2.65 ±0.2
0.25 ±0.05 2)
0.1 C D
8˚ MAX.
C
0.65
3.9 ±0.11)
1.7 MAX.
Stand Off
(1.45)
0 ... 0.1
0.35 x 45˚
4.9 ±0.11)
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion
PG-SSOP-14-1,-2,-3-PO V02
Figure 14
Outline PG-SSOP-14
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on packages, please visit our website:
http://www.infineon.com/packages.
Datasheet
29
Dimensions in mm
Rev. 1.1, 2009-08-27
TLE4678
Revision History
10
Revision History
Revision Date
1.1
Changes
2009-08-27 Final datasheet version for both package variants.
Modified the Programmable Watchdog Activation Threshold and Hysteresis
description for better understanding.
“Reset Function” on Page 17: Renamed VRT,new to VRT,adj for better understanding.
1.01
2008-08-19 Added target definition for PG-SSOP-14 package. Modifications: Overview page,
thermal resistance table, pin definition, package outlines.
1.0
2008-07-31 Final datasheet initial version.
Datasheet
30
Rev. 1.1, 2009-08-27
Edition 2009-08-27
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
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