INFINEON TLE4966-2K

TLE4966-2K
High Precision Hall Switch with two Outputs
Datasheet
Rev.1.0, 2010-06-28
Sense & Control
Edition 2010-06-28
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2010 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
TLE4966-2K
Revision History: 2010-06-28, Rev.1.0
Previous Revision:
Page
Subjects (major changes since last revision)
Trademarks of Infineon Technologies AG
ABM™, BlueMoon™, CONVERGATE™, COSIC™, C166™, FALC™, GEMINAX™, GOLDMOS™, ISAC™,
OMNITUNE™, OMNIVIA™, PROSOC™, SEROCCO™, SICOFI™, SIEGET™, SMARTi™, SMINT™,
SOCRATES™, VINAX™, VINETIC™, VOIPRO™, X-GOLD™, XMM™, X-PMU™, XWAY™
Other Trademarks
Microsoft®, Visio®, Windows®, Windows Vista®, Visual Studio®, Win32® of Microsoft Corporation. Linux® of
Linus Torvalds. FrameMaker®, Adobe® Reader™, Adobe Audition® of Adobe Systems Incorporated. APOXI®,
COMNEON™ of Comneon GmbH & Co. OHG. PrimeCell®, RealView®, ARM®, ARM® Developer Suite™ (ADS),
Multi-ICE™, ARM1176JZ-S™, CoreSight™, Embedded Trace Macrocell™ (ETM), Thumb®, ETM9™, AMBA™,
ARM7™, ARM9™, ARM7TDMI-S™, ARM926EJ-S™ of ARM Limited. OakDSPCore®, TeakLite® DSP Core,
OCEM® of ParthusCeva Inc. IndoorGPS™, GL-20000™, GL-LN-22™ of Global Locate. mipi™ of MIPI Alliance.
CAT-iq™ of DECT Forum. MIPS™, MIPS II™, 24KEc™, MIPS32®, 24KEc™ of MIPS Technologies, Inc. Texas
Instruments®, PowerPAD™, C62x™, C55x™, VLYNQ™, Telogy Software™, TMS320C62x™, Code Composer
Studio™, SSI™ of Texas Instruments Incorporated. Bluetooth® of Bluetooth SIG, Inc. IrDA® of the Infrared Data
Association. Java™, SunOS™, Solaris™ of Sun Microsystems, Inc. Philips®, I2C-Bus® of Koninklijke Philips
Electronics N.V. Epson® of Seiko Epson Corporation. Seiko® of Kabushiki Kaisha Hattori Seiko Corporation.
Panasonic® of Matsushita Electric Industrial Co., Ltd. Murata® of Murata Manufacturing Company. Taiyo Yuden™
of Taiyo Yuden Co., Ltd. TDK® of TDK Electronics Company, Ltd. Motorola® of Motorola, Inc. National
Semiconductor®, MICROWIRE™ of National Semiconductor Corporation. IEEE® of The Institute of Electrical and
Electronics Engineers, Inc. Samsung®, OneNAND®, UtRAM® of Samsung Corporation. Toshiba® of Toshiba
Corporation. Dallas Semiconductor®, 1-Wire® of Dallas Semiconductor Corp. ISO® of the International
Organization for Standardization. IEC™ of the International Engineering Consortium. EMV™ of EMVCo, LLC.
Zetex® of Zetex Semiconductors. Microtec® of Microtec Research, Inc. Verilog® of Cadence Design Systems, Inc.
ANSI® of the American National Standards Institute, Inc. WindRiver® and VxWorks® of Wind River Systems, Inc.
Nucleus™ of Mentor Graphics Corporation. OmniVision® of OmniVision Technologies, Inc. Sharp® of Sharp
Corporation. Symbian OS® of Symbian Software Ltd. Openwave® of Openwave Systems, Inc. Maxim® of Maxim
Integrated Products, Inc. Spansion® of Spansion LLC. Micron®, CellularRAM® of Micron Technology, Inc.
RFMD® of RF Micro Devices, Inc. EPCOS® of EPCOS AG. UNIX® of The Open Group. Tektronix® of Tektronix,
Inc. Intel® of Intel Corporation. Qimonda® of Qimonda AG. 1GOneNAND® of Samsung Corporation.
HyperTerminal® of Hilgraeve, Inc. MATLAB® of The MathWorks, Inc. Red Hat® of Red Hat, Inc. Palladium® of
Cadence Design Systems, Inc. SIRIUS Satellite Radio® of SIRIUS Satellite Radio Inc. TOKO® of TOKO Inc.
The information in this document is subject to change without notice.
Last Trademarks Update 2008-11-17
Datasheet
3
Rev.1.0, 2010-06-28
TLE4966-2K
Trademarks of Infineon Technologies AG . . . . . . . . . . . . . . . . . . . . . . 3
1
1.1
1.2
1.3
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pin Configuration (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
5
5
6
2
2.1
2.2
2.3
General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
7
7
8
3
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4
Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5
Electrical and Magnetic Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Field Direction Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
6
Timing Diagrams for the Speed Outputs . . . . . . . . . . . . . . . . . . . . . . . . 11
7
7.1
7.2
7.3
Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Distance between Chip and Package Surface . . . . . . . . . . . . . . . . . . . . . .
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PCB Footprint for PG-TSOP6-6-5 . . . . . . . . . . . . . . . . . . . . . . . . . . .
Datasheet
4
12
12
12
12
13
Rev.1.0, 2010-06-28
High Precision Hall Switch with two Outputs
1
Overview
1.1
Features
•
•
•
•
•
•
•
•
•
•
•
•
•
TLE4966-2K
2.7V to 24V supply voltage operation
Operation from unregulated power supply
High sensitivity and high stability
of the magnetic switching points
High resistance to mechanical stress
by Active Error Compensation
Reverse battery protection (-18V)
Superior temperature stability
Peak temperatures up to 195°C
Low jitter (typ. 1μs)
Digital output signals
Excellent matching of the 2 Hall probes
Hall plate distance 1.45mm
Two independent speed outputs
SMD package PG-TSOP6-6-5
1.2
Functional Description
The TLE4966-2K is an integrated circuit dual Hall-effect sensor designed specifically for highly accurate
applications. Precise magnetic switching points and high temperature stability are achieved by active
compensation circuits and chopper techniques on chip. The sensor provides two independent speed outputs at
Q1 and Q2 with the status (high or low) corresponding to the magnetic field value at the respective Hall element
H1 and H2. Both Hall elements have the identical thresholds for BOP and BRP (BOP1 = BOP2 and BRP1 = BRP2). For
positive magnetic fields (south pole) exceeding the threshold BOP1 and/or BOP2 the corresponding output Q1 and/or
Q2 is low, whereas for negative magnetic fields (north pole) lower than BRP the output switches to high. Due to the
spatial distance of the two Hall elements on the chip (d = 1.45mm) the two output signals will show a phase
difference in case the sensor is used with a rotating magnetized pole wheel.
Product Name
Product Type
Ordering Code
Package
TLE4966-2K
Double Hall Switch
SP000788888
PG-TSOP6-6-5
Datasheet
5
Rev.1.0, 2010-06-28
TLE4966-2K
Overview
1.3
Pin Configuration (top view)
Center of
Sensitive Area
1.45
6
0.8
± 0.15
5
4
s 66
Speed 2
1
2
Year (y) = 0...9
Month (m) = 1...9,
O - October
N - November
D - December
ym
0.73 ± 0.15
Speed 1
3
AEA03645
PG-TSOP6-6-5
Figure 1
Pin Definition and Center of Sensitive Area
Table 1
Pin Definitions and Functions
Pin No.
Symbol
Function
1
Q2
Speed 2
2
GND
Recommended connection to GND
3
Q1
Speed 1
4
VDD
Supply voltage
5
GND
Recommended connection to GND
6
GND
Ground
Datasheet
6
Rev.1.0, 2010-06-28
TLE4966-2K
General
2
General
2.1
Block Diagram
VDD
Voltage Regulator
(reverse polarity protected)
Oscillator
& Sequencer
ESD
Bias and
Compensation
Circuits
GND
Q2
Chopped
Hall
Probe
Chopped
Hall
Probe
Amplifier
Amplifier
Figure 2
Block Diagram
2.2
Circuit Description
Filter
Comparator
with
Hysteresis
Filter
Q1
The chopped Dual Hall Switch comprises two Hall probes, bias generator, compensation circuits, oscillator, and
output transistors.
The bias generator provides currents for the Hall probes and the active circuits. Compensation circuits stabilize the
temperature behavior and reduce influence of technology variations.
The Active Error Compensation rejects offsets in signal stages and the influence of mechanical stress to the Hall
probes caused by molding and soldering processes and other thermal stresses in the package. This chopper
technique together with the threshold generator and the comparator ensures high accurate magnetic switching
thresholds.
Datasheet
7
Rev.1.0, 2010-06-28
TLE4966-2K
Maximum Ratings
2.3
Application Circuit
It is recommended to use a series resistor RS with 200Ω and a capacitor of CS = 4.7nF for protection against
overvoltage and transients on the supply line. Pull-up resistors RL are required for the output pins Q1 and Q2.
VS
RS
TLE4966-2K
VDD
CS
RL
RL
Q1
Q2
GND
Figure 3
Application Circuit
3
Maximum Ratings
Table 2
Absolute Maximum Ratings
Tj = -40°C to 150°C
Parameter
Symbol
Limit Values
Unit
min.
max.
VDD
Vs
Vs
IDD
-18
-18
-18
18
24
26
V
-50
50
mA
Output voltage
VQ
-0.7
-0.7
18
26
V
Continuous output
current
IQ
-50
50
mA
Junction
temperature
Tj
–
–
–
–
155
165
175
195
°C
Storage
temperature
TS
-40
150
°C
Magnetic flux
density
B
–
unlimited
mT
Supply voltage
Supply current
through protection
device
Conditions
for 1 h, RS ≥ 200 Ω
for 5 min, RS ≥ 200 Ω
for 5 min @ 1.2 kΩ pull up
for 2000 h (not additive)
for 1000 h (not additive)
for 168 h (not additive)
for 3 x 1 h (additive)
Note: Stresses above those listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability. Maximum ratings are absolute
ratings; exceeding only one of these values may cause irreversible damage to the integrated circuit.
Datasheet
8
Rev.1.0, 2010-06-28
TLE4966-2K
Operating Range
Table 3
ESD Protection 1)
Parameter
Symbol
VESD
ESD voltage
Limit Values
min.
max.
–
±4
Unit
Notes
kV
HBM, R = 1.5 kΩ,
C = 100 pF
TA = 25°C
1) Human Body Model (HBM) tests according to: EOS/ESD Association Standard S5.1-1993 and Mil. Std. 883D method
3015.7
4
Operating Range
The following operating conditions must not be exceeded in order to ensure correct operation of the TLE4966-2K.
All parameters specified in the following sections refer to theses operating conditions unless otherwise mentioned.
Table 4
Operating Range
Parameter
Symbol
Supply voltage
VDD
VS
VS
VQ
Tj
Output voltage
Junction temperature
Output current
Datasheet
IQ
Limit Values
Unit
min.
typ.
max.
2.7
–
–
–
–
–
18
24
26
V
-0.7
–
18
V
-40
–
–
–
150
175
°C
0
–
10
mA
Conditions
1 h with RS ≥ 200 Ω
for 5 min RS ≥ 200 Ω
for 168 h
9
Rev.1.0, 2010-06-28
TLE4966-2K
Electrical and Magnetic Parameters
5
Electrical and Magnetic Parameters
Product characteristics involve the spread of values guaranteed within the specified voltage and temperature
range. Typical characteristics are the median of the production.
Table 5
Electrical Characteristics
Parameter
Symbol
IDD
Reverse current
ISR
Output saturation voltage VQSAT
Output leakage current
IQLEAK
Output fall time
tf
Output rise time
tr
Chopper frequency
fOSC
Switching frequency
fSW
3)
Delay time
td
Count Signal Delay
tdc
Output jitter 4)
tQJ
Repeatability of magnetic BREP
Supply current
thresholds
1)
Limit Values
Distance of hall plates
Thermal resistance
7)
tPON
dHALL
RthJA
Conditions
min.
typ.
max.
4
5.2
7
mA
0
0.2
1
mA
–
0.3
0.6
V
–
0.05
10
μA
–
0.2
1
μs
VDD = 2.7 V ... 18 V
VDD = -18 V
IQ = 10 mA
for VQ = 18 V
RL = 1.2 kΩ; CL < 50 pF
–
0.2
1
μs
see: Figure 4 on Page 11
–
320
–
kHz
2)
0
–
15
–
13
–
μs
50
200
1000
ns
–
1
–
μsRMS Typ. value for square wave signal 1 kHz
–
40
–
μTRMS Typ. value for ΔB/Δt > 12 mT/ms
–
13
–
μs
–
1.45
–
mm
–
100
–
K/W
5)
Power-on time 6)
Unit
kHz
VDD ≥ 2.7 V
PG-TSOP6-6-5
1) over operating range, unless otherwise specified. Typical values correspond to VDD = 12 V and TA = 25°C
2) To operate the sensor at the max. switching frequency, the magnetic signal amplitude must be 1.4 times higher than for
static fields. This is due to the -3 dB corner frequency of the low pass filter in the signal path.
3) Systematic delay between magnetic threshold reached and output switching
4) Jitter is the unpredictable deviation of the output switching delay
5) BREP is equivalent to the noise constant
6) Time from applying VDD ≥ 2.7 V to the sensor until the output state is valid
7) Thermal resistance from junction to ambient
Calculation of the ambient temperature (PG-TSOP6-6-5 example)
e.g. for VDD = 12.0 V, IDDtyp = 5.5 mA, VQSATtyp = 0.3 V and 2 x IQ = 10 mA :
Power Dissipation: PDIS = 72.0 mW.
In TA = Tj – (RthJA × PDIS) = 175°C – (100 K / W × 0.072 W)
Resulting max. ambient temperature: TA = 167.8°C
Datasheet
10
Rev.1.0, 2010-06-28
TLE4966-2K
Timing Diagrams for the Speed Outputs
Table 6
Magnetic Characteristics 1).
Parameter
Symbol
Tj
Limit Values
[°C]
min.
typ.
max.
Unit
Conditions
BOP1, BOP2
-40
25
150
5.2
5.0
4.7
7.7
7.5
7.1
10.3
10.0
9.5
mT
Operate point
BOP1 for Hall element 1
BOP2 for Hall element 2
BRP1, BRP2
-40
25
150
-10.3
-10.0
-9.5
-7.7
-7.5
-7.1
-5.2
-5.0
-4.7
mT
Release point
BRP1 for Hall element 1
BRP2 for Hall element 2
BHYS1, BHYS2
-40
25
150
–
10.0
–
–
15.0
–
–
20.0
–
mT
Hysteresis
BHYS1 = BOP1 - BRP1
BHYS2 = BOP2 - BRP2
BMATCH
–
-2.0
–
–
0
–
–
2.0
–
mT
Magnetic matching
-40
25
150
Valid for
BOP1 - BOP2 and
BRP1 - BRP2
BOFF1, BOFF2
-40
25
150
–
-2.0
–
–
0
–
–
2.0
–
mT
Magnetic offset
BOFF1 = (BOP1 + BRP1)/2
BOFF2 = (BOP2 + BRP2)/2
–
–
-350
–
ppm/°C
TC
Temperature
compensation of
magnetic thresholds
1) over operating range, unless otherwise specified. Typical values correspond to VDD = 12 V
Note: Typical characteristics specify mean values expected over the production spread.
Field Direction Definition
Positive magnetic fields related with south pole of the magnet to the branded side of package.
6
Timing Diagrams for the Speed Outputs
Applied Magnetic Field
BOP
BRP
td
VQ
td
tf
tr
90%
10%
Figure 4
Datasheet
Timing Definition of the Speed Signal
11
Rev.1.0, 2010-06-28
TLE4966-2K
Package Information
Package Information
7.1
Package Marking
s Z2
Year (y) = 0...9
Month (m) = 1...9,
o - October
n - November
d - December
ym
7
Figure 5
Marking PG-TSOP6-6-5
7.2
Distance between Chip and Package Surface
d
Branded Side
0.56 ± 0.1 mm
Figure 6
Distance Chip to Upper Side of IC
7.3
Package Outlines
2.9 ±0.2
(2.25)
B
1.1 MAX.
(0.35)
1
2
3
+0.2
acc. to DIN 6784
0.35 +0.1
-0.05
0.2
M
0.15 +0.1
-0.06
B 6x
0.95
1.9
0.2
M
1.6 ±0.1
4
10˚ MAX.
5
10˚ MAX.
6
2.6 MAX.
0.1 MAX.
A
A
GPX09300
Figure 7
Datasheet
PG-TSOP6-6-5 (Plastic Thin Small Outline Package)
12
Rev.1.0, 2010-06-28
TLE4966-2K
Package Information
PCB Footprint for PG-TSOP6-6-5
The following picture shows a recommendation for the PCB layout.
2.9
1.9
0.5
0.95
Remark: Wave soldering possible dep.
on customers process conditions
HLG09283
Figure 8
Footprint PG-TSOP6-6-5
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Datasheet
13
Dimensions in mm
Rev.1.0, 2010-06-28
www.infineon.com
Published by Infineon Technologies AG