TLE6217G Smart Quad Channel Low-Side Switch Features Product Summary Supply voltage VS Shorted Circuit Protection Drain source voltage VDS(AZ)max Overtemperature Protection Overvoltage Protection On resistance RON 1,2 Parallel Control of the Inputs (PWM Applications) RON 3,4 Separate Diagnostic Pin for Each Channel Output current ID 1,2 Power - SO 20 - Package with integrated ID 3,4 cooling area • Standby mode with low current consumption • μC compatible Input • Electrostatic Discharge (ESD) Protection •Green Product (RoHS Compliant) • • • • • • 4.8 - 32 60 0.2 0.35 2x5 2x3 V V Ω Ω A A •AEC Qualified Application • • • • All kinds of resistive and inductive loads (relays, electromagnetic valves) μC compatible power switch for 12 and 24 V applications Solenoid control switch in automotive and industrial control systems Robotic Controls PG-DSO-20-37 General description Quad channel Low-Side-Switch (2x5A/2x3A) in Smart Power Technology (SPT) with four separate inputs and four open drain DMOS output stages. The TLE 6217 GP is fully protected by embedded protection functions and designed for automotive and industrial applications. Each channel has its own status signal for diagnostic feedback. Therefore the TLE 6217 GP is particularly suitable for ABS or Powertrain Systems. Block Diagram STBY ENA VS GND normal function IN1 VBB SCB / overload IN2 as Ch. 1 IN3 as Ch. 1 IN4 as Ch. 1 overtemperature LOGIC open load/sh. to gnd Output Stage ST1 1 OUT1 4 4 ST2 ST3 as ST 1 ST4 as ST 1 Gate Control as ST 1 OUT4 GND Data Sheet 1 Rev. 6.1, 2008-04 TLE6217G Pin Configuration (Top view) PG - DSO - 20 - 37 Pin Description Pin Symbol Function 1 GND Ground 2 OUT1 Power Output channel 1 3 ST1 Status Output channel 1 4 IN4 Control Input channel 4 5 VS Supply Voltage 6 STBY Standby 7 IN3 Control Input channel 3 8 ST2 Status Output channel 2 9 OUT2 Power Output channel 2 10 GND Ground 11 GND Ground 12 OUT3 Power Output channel 3 13 ST3 Status Output channel 3 14 IN2 Control Input channel 2 15 GND Ground Logic 16 ENA Enable Input for all four channels 17 IN1 Control Input channel 1 18 ST4 Status Output channel 4 19 OUT4 Power Output channel 4 20 GND Ground Heat slug internally connected to ground pins Data Sheet 2 Rev. 6.1, 2008-04 TLE6217G Detailed Block Diagram VS STBY ENA internal supply Overtemperature Channel 4 Overtemperature Channel 1 Open Load IN1 Overload LOGIC OUT1 ST1 Open Load IN4 IPD Overload LOGIC OUT4 ST4 Overtemperature Channel 3 Overtemperature Channel 2 IPD Open Load IN2 Overload LOGIC OUT2 ST2 Open Load IN3 IPD Overload LOGIC OUT3 ST3 IPD GND Data Sheet 3 Rev. 6.1, 2008-04 TLE6217G Maximum Ratings for Tj = – 40°C to 150°C The maximum ratings may not be exceeded under any circumstances, not even momentarily and individually, as permanent damage to the IC will result. Parameter Supply voltage Symbol VS Continuous drain source voltage (OUT1...OUT4) VDS Input voltage IN1 to IN4, ENA VIN , VENA - Input voltage STBY VSTBY - 0.3 ... + 40 Status output voltage VST - 0.3 ... + 32 V Operating temperature range during clamping; Σt = 30 min during clamping; Σt = 15 min Storage temperature range Tj Tj Tj Tstg 40 ... + 150 175 190 - 55 ... + 150 °C Output current per channel ID(lim) Output current at reversal supply ID 1,2 ID 3,4 Status output current IST Inductive load switch off energy (single pulse) Tj = 25°C Electrostatic Discharge Voltage (HBM) according to MIL STD 883D, method 3015.7 and EOS/ESD assn. Standard S5.1 – 1993 Output 1-4 Pins All other Pins Thermal resistance junction – case (die soldered on the frame) Values -0.3 ... + 40 Unit V 40 V 1.5... + 6 V - overload shutdown EAS VESD VESD A -4 -2 A - 5 ... + 5 mA 50 mJ 4000 2000 V V K/W RthJC Maximum operating lifetime (according to "Ambient thermal conditions") tb 2 10000 h Ambient thermal conditions TAmbient temperature range operating periods -40 °C 2% -20 °C 10 % 25 °C 24 % 60 °C 34 % 80 °C 24 % 100 °C 5% > 120 °C 1% Data Sheet 4 Rev. 6.1, 2008-04 TLE6217G Electrical Characteristics Parameter and Conditions VS = 4.8 to 18 V ; Tj = - 40 °C to + 150 °C (unless otherwise specified) Symbol Values min Unit typ max 1. Power Supply (VS) Supply current (Outputs ON) IS 8 mA Supply current (Outputs OFF) VENA = L, VSTBY = H IS 4 mA IS 10 Standby current VSTBY = L VS Operating voltage 4.8 32 μA V 2. Power Outputs ON state resistance Channel 1,2 ID = 1A; VS ≥ 9.5 V Tj = 25 ° C Tj = 150°C RDS(ON) ON state resistance Channel 3,4 ID = 1A; VS ≥ 9.5 V Tj = 25 ° C Tj = 150°C RDS(ON) ID ≥ 100 mA VDS(AZ) 45 IPD 10 Z-Diode clamping voltage (OUT1...4) Pull down current Output Leakage Current 1 VSTBY = H, VIN = L VSTBY = L Tj = -40°C...150°C wafer test at 25°C ID = 1 A ID = 1 A ID = 1 A ID = 1 A Output turn on delay time Output turn off delay time 1 Output on fall time 1 Output off rise time 1 Overload switch-off delay time 1 2 Output off status delay time Failure extension Time for Status Report Input Suppression Time Open Load (off) filtering Time 2 Ω 0.2 0.5 Ω 0.35 0.75 20 60 V 50 μA IDlk 5 1 ton toff tfall trise tDSO tD tD-failure tD-IN tfOL(off) 0 0 3 3 20 500 500 500 10 5 10 10 10 1200 1200 1200 30 20 30 30 30 100 3000 3000 3000 100 μA μA μs 3. Digital Inputs (IN1, IN2, IN3, IN4, ENA) Input low voltage Input high voltage Input voltage hysteresis 2 Input pull down current Enable pull down current VIN = 5 V; VS ≥ 6.5 V VENA = 5 V; VS ≥ 6.5 V VINL - 0.3 1.0 V VINH 2.0 6.0 V VINHys 50 100 IIN 10 30 60 μA IENA 10 20 40 μA VSTL 0.5 V ISTH 2 μA mV 4. Digital Status Outputs (ST1 - ST4) Open Drain Output voltage low IST = 2 mA Leakage current high 1 2 See timing diagram, resistive load condition; VS ≥ 9 V This parameter will not be tested but assured by design Data Sheet 5 Rev. 6.1, 2008-04 TLE6217G Electrical Characteristics Parameter and Conditions VS = 4.8 to 18 V ; Tj = – 40 °C to + 150 °C (unless otherwise specified) Symbol Values min Unit typ max 5. Standby Input (STBY) Input low voltage VSTBY 0 1 V Input high voltage VSTBY 3.5 VS V 300 μA 0.3*VS 0.33*VS 0.36*VS V Input current VSTBY = 18 V ISTBY 6. Diagnostic Functions Open load detection voltage VENA = X, VIN = L VS ≥ 6.5 V VDS(OL) Open load detection current channel 1,2 VENA = VIN = H VS ≥ 6.5 V ID(OL) 1,2 100 240 mA Open load detection current channel 3,4 VENA = VIN = H VS ≥ 6.5 V ID(OL) 3,4 100 240 mA Overload Current channel 1, 2 VS ≥ 6.5 V ID(lim) 1,2 5 7.5 A VS ≥ 6.5 V ID(lim) 3,4 3 5 A Tth Thys 170 Overload Current channel 3 , 4 Overtemperature shutdown threshold Hysteresis 2 tIN Pulse Width for static diagnostic output 2 200 °C K 500 μs 10 This parameter will not be tested but assured by design Data Sheet 6 Rev. 6.1, 2008-04 TLE6217G Application Description This IC is especially designed to drive inductive loads (relays, electromagnetic valves). Integrated clamp-diodes limit the output voltage when inductive loads are discharged. Four open-drain logic outputs indicate the status of the integrated circuit. The following conditions are monitored and signalled: - Overloading of output (also shorted load to supply) in active mode - Open and shorted load to ground in active and inactive mode - Overtemperature Circuit Description Input Circuits The control and enable inputs, both active high, consist of schmitt triggers with hysteresis. All inputs are provided with pull-down current sources. Not connected inputs are interpreted as low and the respective output stages are switched off. In standby mode (STBY = LOW) the current consumption is greatly reduced. The circuit is active when STBY = HIGH. If the standby function is not used, it is allowed to connect the standby pin directly to VS. Status Signals: The status signals are undefined for 2ms after a power up event or a STBY low to high transition. Output Stages The four power outputs consist of DMOS-power transistors with open drains. The output stages are short circuit protected throughout the operating range. Each output has it's own zenerclamp. This causes a voltage limitation at the power transistor when inductive loads are switched off. Parallel to the DMOS transistors there are internal pull down current sources. They are provided to detect an open load condition in the off state. They will be disconnected in the standby mode. Due to EMI measures there is an internal zenerclamp in parallel to the output stage. It gets active above 33V drain source voltage. This leads to an increasing leakage current up to 1 mA @ VDS = 40V. Protective Circuits The outputs are protected against current overload and overtemperature. If the output current increases above the overload detection threshold IQO for a longer time then tDSO or the temperature increases above Tth, then the power transistor is immediately switched off. It remains off until the control signal at the input is switched off and on again. Fault Detection The status outputs indicate the switching state of the output stage. Under normal conditions is: ST = low Output off; ST = high Output on. If an error occurs, the logic level of the status output is inverted, as listed in the diagnostic table. If current overload or overtemperature occurs for a longer time than tDSO, the fault condition is latched into an internal register and the output is shutdown. The reset is done by switching off the corresponding control input for a time longer than tD-IN. Data Sheet 7 Rev. 6.1, 2008-04 TLE6217G Open load is detected for all four channels in on and off mode. In the on mode the load current is monitored. If it drops below the specified threshold value IQU then an open load condition is detected. In the off mode, the output voltage is monitored. An open load condition is detected when the output voltage of a given channel is below the threshold VDS(OL), which is typ. 33 % of the supply voltage VS. To prevent an open load diagnosis in case of transient Voltages on the outputs the open load detection in off mode uses a filter of typ. 30μs. Status output at pulse width operation If the input is operated with a pulsed signal, the status does not follow each single pulse of the input signal. An internal delay tD of typ. 1.2ms (min 500 μs) enables a continuous status output signal. See the timing diagrams on the following pages for further information. This internal status delay simplifies diagnostic software for pwm applications. Diagnostic Table In general the status follows the input signal in normal operating conditions. If any error is detected the status is inverted. Standby Input Enable Input Control Input Power Output Status Output STBY ENA IN Q ST Standby L X X off H Normal function H H H L H H X L H off off ON L L H Open load or short to ground H H H H L L H H L H L H off off off ON H H H L Overload or short to supply1) H H H off L H H H→L off L H L X off L H H H off L H H H→L off L H L X off L Operating Condition reset latch 2) Overtemperature reset latch 2) 1) Note 1) : overload/short-to-supply/overtemperature - events shorter than min. time t DSO specified in 2.10 will not be latched and not reported at the status pin. Data Sheet 8 Rev. 6.1, 2008-04 TLE6217G Note 2): to reset latched status-output in case of overload/short-to-supply/overtemperature the control input has to go low and stay low for longer than max. Input suppression time tD-IN specified in 2.13 of the characteristics Failure Situations and Status Report Logic Block Diagram Overtemperature 1.....overtemperature 0.....normal cond. Gate Driver 1... Output 0....Output O Off ENA 1....enabled 0... disabled Input 1....On 0... Off IN tDSO Delay 60μs S R SET CLR Q OUT 1,2ms typ. IN tD OUT 60μs typ. Q Delay 60μs tD tD-IN when overload d EN Overload 0.....overload 1.....normal cond. Delay D OUT IN tfOL(off) HI Open load "off" 1.....open load 0.....normal cond. tD Delay D Filter 30μs Filter EN Delay D OUT IN Status 0....High 1....Low tD-failure EN Open load "on" 0.....open load 1.... normal cond. Delay D OUT IN tD-failure Data Sheet 9 Rev. 6.1, 2008-04 TLE6217G Timing Diagrams Output Slope VIN VI NH V INL t VDS VS 85% t off t on 15% t tf tr VST tD t Fig. 1 Overload Switch OFF Delay ID t ID(lim) DSO ID(OL) t VST t D-failure t Fig. 2 Data Sheet 10 Rev. 6.1, 2008-04 Data Sheet 11 ST2 ST3 ST4 10k IN1 IENA IIN4 IIN3 IIN2 IIN1 IST4 IST3 IST2 IST1 STBY ENA IN4 IN3 IN2 IN1 ST4 ST3 ST2 ST1 IVS GND TLE 6227 VS VS TLE 6217 GP VSTBY VENA ISTBY ENA VIN4 IN4 10k VIN3 IN3 VIN2 IN2 10k VST1 VST2 VST3 VST4 VIN1 ST1 10k VD = 5V OUT4 OUT3 OUT2 OUT1 ID4 ID3 ID2 ID1 R L4 OUT3 R L2 OUT2 R L1 OUT1 VDS(OUT4) VDS(OUT3) VDS(OUT2) VDS(OUT1) OUT4 R L3 TLE6217G Test Circuit Rev. 6.1, 2008-04 TLE6217G +12V Application Circuit L4 L3 L2 ENA GND 6217 OUT3 OUT4 Enable Input Control Inputs Status Output 10k 10k 10k 10k VD = 5V C VS IN1 IN2 IN3 IN4 STBY ST1 OUT1 ST2 ST3 ST4 TLE OUT2 L1 The blocking capacitor C is recommended to avoid critical negative voltage spikes on VS in case of battery interruption during OFF-commutation. Data Sheet 12 Rev. 6.1, 2008-04 TLE6217G Timing Diagrams of Diagnostic with Pulsed Input Signal Normal condition, resistive load, pulsed input signal V IN t IN ID V ST tD tD Fig. 3 Current Overload F current overload condition tINoff V IN I D(lim) ID V ST tD-IN t DSO t DSO tINoff < tD-IN : Input suppression time avoids a restart after overtemperature Fig. 4 Data Sheet 13 Rev. 6.1, 2008-04 TLE6217G Diagnostic status output at different open load current conditions V IN I D(OL) ID t D-failure V ST tD Fig. 5 V IN tINoff I D(OL) ID tD-failure V ST tD tINOFF < tD leads to a static status signal Fig. 6 V IN tINoff I D(OL) ID V ST tD-failure tD-failure tD tD-failure tINoff > tD : Intermittend status signal Data Sheet Fig. 7 14 Rev. 6.1, 2008-04 TLE6217G Normal operation, followed by open load condition ~ 55V Open load voltage condition VDS 12V 33% VIN I D(OL) ID tfOL(off)- tD-failure VST tD-failure tD Fig. 8 Overtemperature Overtemperature VIN tINoff > tD-IN Reset of overload Flip Flop I D(OL) ID VST tD-failure tD-failure t DSO Fig. 9 Data Sheet 15 Rev. 6.1, 2008-04 TLE6217G Ordering code Type Ordering Code Package TLE6217 G TLE6217 C on request on request P - DSO - 20 – 12 Bare dice on wafer Pad Assignment Out GTV ST IN VR1 EN GN I IN T P Out GTV ST y P G N P G N x center of P G N ST GTV IN I V STB Out Data Sheet P G N IN V ST GTV Out 16 Rev. 6.1, 2008-04 TLE6217G Package Outlines +0.07 -0.02 3.5 MAX. 6.3 0.1 5˚ ±3˚ 0.25 1.3 15.74 ±0.1 (Heatslug) B 2.8 Heatslug (Mold) 0.95 ±0.15 0.25 M A 20x 20 11 1 10 14.2 ±0.3 Bottom View 11 0.25 B 20 5.9 ±0.1 (Metal) 0.4 +0.13 3.2 ±0.1 (Metal) 1.27 3.25 ±0.1 0 +0.1 1.1 ±0.1 11 ±0.15 1) Index Marking 1 x 45˚ 15.9 ±0.15 1) (Mold) 1) Figure 1 10 A 13.7 -0.2 (Metal) 1 Heatslug Does not include plastic or metal protrusion of 0.15 max. per side PG-DSO-20-37 (Please Insert Package Long Name!) Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 17 Dimensions in mm Rev. 6.1, 2008-04 TLE6217G Revision History 1 Revision History Revision Date Changes 6.1 2008-04-04 Initial version of RoHS-compliant derivate of TLE6217G Page 1: AEC certified statement added Page 1 and 17: added RoHS compliance statement and Green product feature Page 1 and 17: Package changed to RoHS compliant version Page 18-19: added Revision History, updated Legal Disclaimer Data Sheet 18 Rev. 6.1, 2008-04 Edition 2008-04 Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered.