74HC123; 74HCT123 Dual retriggerable monostable multivibrator with reset Rev. 05 — 13 July 2009 Product data sheet 1. General description The 74HC123; 74HCT123 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC123; 74HCT123 are dual retriggerable monostable multivibrators with output pulse width control by three methods: 1. The basic pulse is programmed by selection of an external resistor (REXT) and capacitor (CEXT). 2. Once triggered, the basic output pulse width may be extended by retriggering the gated active LOW-going edge input (nA) or the active HIGH-going edge input (nB). By repeating this process, the output pulse period (nQ = HIGH, nQ = LOW) can be made as long as desired. Alternatively an output delay can be terminated at any time by a LOW-going edge on input nRD, which also inhibits the triggering. 3. An internal connection from nRD to the input gates makes it possible to trigger the circuit by a HIGH-going signal at input nRD as shown in the function table. Schmitt-trigger action in the nA and nB inputs, makes the circuit highly tolerant to slower input rise and fall times. The 74HC123; 74HCT123 are identical to the 74HC423; 74HCT423 but can be triggered via the reset input. 2. Features n n n n n DC triggered from active HIGH or active LOW inputs Retriggerable for very long pulses up to 100 % duty factor Direct reset terminates output pulse Schmitt-trigger action on all inputs except for the reset input ESD protection: u HBM JESD22-A114E exceeds 2000 V u MM JESD22-A115-A exceeds 200 V n Specified from −40 °C to +85 °C and from −40 °C to +125 °C 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 3. Ordering information Table 1. Ordering information Type number 74HC123N Package Temperature range Name Description Version −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 −40 °C to +125 °C DHVQFN16 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm SOT763-1 74HCT123N 74HC123D 74HCT123D 74HC123DB 74HCT123DB 74HC123PW 74HCT123PW 74HC123BQ 4. Functional diagram 14 15 S 1A 1B 1RD 13 Q 1 4 Q 2 2RD 1Q 1Q RD 3 6 S 2B 1REXT/CEXT T 7 2A 1CEXT 5 Q 9 2CEXT 2REXT/CEXT 2Q T 12 Q 10 2Q RD 11 001aaa610 Fig 1. Functional diagram 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 2 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 14 15 CX 13 RCX 1 & 2 1CEXT 14 2CEXT 4 6 3 1REXT/CEXT 15 2REXT/CEXT Q 1 1A 7 6 S 1Q 13 2Q 5 7 Q 2 1B 10 2B CX RD 1Q & 10 4 12 2Q 12 11 3 1RD mna515 R 11 2RD Fig 2. 5 RCX 9 T 9 2A R mna516 Logic symbol Fig 3. IEC logic symbol nREXT/CEXT VCC nQ nRD R VCC nQ R CL CL VCC R CL CL nA nB Fig 4. CL R mna518 Logic diagram 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 3 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 5. Pinning information 5.1 Pinning 1 1A terminal 1 index area 74HC123 74HCT123 16 VCC 74HC123 1A 1 16 VCC 1RD 3 14 1CEXT 1B 2 15 1REXT/CEXT 1Q 4 13 1Q 1RD 3 14 1CEXT 2Q 5 12 2Q 1Q 4 13 1Q 2CEXT 6 2Q 5 12 2Q 2REXT/CEXT 7 2CEXT 6 11 2RD 8 9 15 1REXT/CEXT 2REXT/CEXT 7 10 2B 2A 2 GND 8 9 GND 1B 2A VCC(1) 11 2RD 10 2B 001aaf046 Transparent top view 001aaa698 (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as supply pin or input. Fig 5. Pin configuration for DIP16, SO16, SSOP16 and TSSOP16 Fig 6. Pin configuration for DHVQFN16 5.2 Pin description Table 2. Pin description Symbol Pin Description 1A 1 negative-edge triggered input 1 1B 2 positive-edge triggered input 1 1RD 3 direct reset LOW and positive-edge triggered input 1 1Q 4 active LOW output 1 2Q 5 active HIGH output 2 2CEXT 6 external capacitor connection 2 2REXT/CEXT 7 external resistor and capacitor connection 2 GND 8 ground (0 V) 2A 9 negative-edge triggered input 2 2B 10 positive-edge triggered input 2 2RD 11 direct reset LOW and positive-edge triggered input 2 2Q 12 active LOW output 2 1Q 13 active HIGH output 1 1CEXT 14 external capacitor connection 1 1REXT/CEXT 15 external resistor and capacitor connection 1 VCC 16 supply voltage 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 4 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 6. Functional description Function table[1] Table 3. Input Output nRD nA nB nQ nQ L X X L H H[2] H[2] X H X L[2] X X L L[2] H L ↑ H ↓ H ↑ L H [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; ↑ = LOW-to-HIGH transition; ↓ = HIGH-to-LOW transition; = one HIGH level output pulse; [2] = one LOW level output pulse. If the monostable was triggered before this condition was established, the pulse will continue as programmed. 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current IOK IO ICC supply current IGND Tstg Ptot total power dissipation Conditions Min Max Unit −0.5 +7 V VI < −0.5 V or VI > VCC + 0.5 V - ±20 mA output clamping current VO < −0.5 V or VO > VCC + 0.5 V - ±20 mA output current except for pins nREXT/CEXT; VO = −0.5 V to (VCC + 0.5 V) - ±25 mA - 50 mA ground current - −50 mA storage temperature −65 +150 °C DIP16 package [1] - 750 mW SO16 package [2] - 500 mW SSOP16 package [3] - 500 mW TSSOP16 package [3] - 500 mW DHVQFN16 package [4] - 500 mW [1] For DIP16 package: Ptot derates linearly with 12 mW/K above 70 °C. [2] For SO16 package: Ptot derates linearly with 8 mW/K above 70 °C. [3] For SSOP16 and TSSOP16 packages: Ptot derates linearly with 5.5 mW/K above 60 °C. [4] For DHVQFN16 package: Ptot derates linearly with 4.5 mW/K above 60 °C. 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 5 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter VCC supply voltage Conditions 74HC123 74HCT123 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V ∆t/∆V input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V −40 +25 +125 −40 +25 +125 Tamb nRD input ambient temperature °C 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74HC123 VIH VIL VOH VOL HIGH-level input voltage VCC = 2.0 V 1.5 1.2 - 1.5 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - 4.2 - V LOW-level input voltage VCC = 2.0 V - 0.8 0.5 - 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 - 1.8 V HIGH-level VI = VIH or VIL output voltage IO = −20 µA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = −20 µA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = −20 µA; VCC = 6.0 V 5.9 6.0 - 5.9 - 5.9 - V IO = −4 mA; VCC = 4.5 V 3.98 4.32 - 3.84 - 3.7 - V IO = −5.2 mA; VCC = 6.0 V 5.48 5.81 - 5.34 - 5.2 - V LOW-level VI = VIH or VIL output voltage IO = 20 µA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 20 µA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 20 µA; VCC = 6.0 V - 0 0.1 - 0.1 - 0.1 V IO = 4 mA; VCC = 4.5 V - 0.15 0.26 - 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.26 - 0.33 - 0.4 V VI = VCC or GND; VCC = 6.0 V - - ±0.1 - ±1.0 - ±1.0 µA - - 8.0 - 80 - 160 µA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 6.0 V 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 6 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset Table 6. Static characteristics …continued At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter CI 25 °C Conditions input capacitance −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max - 3.5 - - - - - pF 74HCT123 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = −20 µA 4.4 4.5 - 4.4 - 4.4 - V 3.98 4.32 - 3.84 - 3.7 - V - 0 0.1 - 0.1 - 0.1 V - 0.15 0.26 - 0.33 - 0.4 V - - ±0.1 - ±1.0 - ±1.0 µA - - 8.0 - 80 - 160 µA pins nA, nB - 35 125 - 160 - 170 µA pin nRD - 50 180 - 225 - 245 µA - 3.5 - - - - - pF IO = −4 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 20 µA IO = 4.0 mA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V ∆ICC additional per input pin; IO = 0 A; supply current VI = VCC − 2.1 V; other inputs at VCC or GND; VCC = 4.5 V to 5.5 V CI input capacitance VI = VCC or GND; VCC = 5.5 V 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 7 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12. Symbol Parameter 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V - 83 255 - 320 - 385 ns VCC = 4.5 V - 30 51 - 64 - 77 ns VCC = 5 V; CL = 15 pF - 26 - - - - - ns VCC = 6.0 V - 24 43 - 54 - 65 ns VCC = 2.0 V - 66 215 - 270 - 325 ns VCC = 4.5 V - 24 43 - 54 - 65 ns VCC = 5 V; CL = 15 pF - 20 - - - - - ns - 19 37 - 46 - 55 ns - 19 75 - 95 - 110 ns VCC = 4.5 V - 7 15 - 19 - 22 ns VCC = 6.0 V - 6 13 - 16 - 19 ns VCC = 2.0 V 100 8 - 125 - 150 - ns VCC = 4.5 V 20 3 - 25 - 30 - ns VCC = 6.0 V 17 2 - 21 - 26 - ns VCC = 2.0 V 100 17 - 125 - 150 - ns VCC = 4.5 V 20 6 - 25 - 30 - ns VCC = 6.0 V 17 5 - 21 - 26 - ns VCC = 2.0 V 100 14 - 125 - 150 - ns VCC = 4.5 V 20 5 - 25 - 30 - ns 17 4 - 21 - 26 - ns CEXT = 100 nF; REXT = 10 kΩ - 450 - - - - - µs CEXT = 0 pF; REXT = 5 kΩ - 75 - - - - - ns 74HC123 tpd propagation delay nRD, nA, nB to nQ or nQ; CEXT = 0 pF; REXT = 5 kΩ; see Figure 9 [1] nRD (reset) to nQ or nQ; CEXT = 0 pF; REXT = 5 kΩ; see Figure 9 VCC = 6.0 V tt tW [1] output see Figure 9 transition time VCC = 2.0 V pulse width nA LOW; see Figure 10 nB HIGH; see Figure 10 nRD LOW; see Figure 11 VCC = 6.0 V nQ HIGH and nQ LOW; VCC = 5.0 V; see Figure 10 and 11 [2] 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 8 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12. Symbol Parameter 25 °C Conditions trtrig retrigger time nA, nB; CEXT = 0 pF; REXT = 5 kΩ; VCC = 5.0 V; see Figure 10 REXT external timing see Figure 7 resistor VCC = 2.0 V [3][4] VCC = 5.0 V −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max - 110 - - - - - ns 10 - 1000 - - - - kΩ 2 - 1000 - - - - kΩ CEXT external timing VCC = 5.0 V; see Figure 7 capacitor [4] - - - - - - - pF CPD power dissipation capacitance [5] - 54 - - - - - pF VCC = 4.5 V - 30 51 - 64 - 77 ns VCC = 5 V; CL = 15 pF - 26 - - - - - ns per monostable; VI = GND to VCC 74HCT123 tPHL HIGH to LOW propagation delay nRD, nA, nB to nQ or nQ; CEXT = 0 pF; REXT = 5 kΩ; see Figure 9 nRD (reset) to nQ or nQ; CEXT = 0 pF; REXT = 5 kΩ; see Figure 9 tPLH LOW to HIGH propagation delay VCC = 4.5 V - 27 46 - 58 - 69 ns VCC = 5 V; CL = 15 pF - 23 - - - - - ns VCC = 4.5 V - 28 51 - 64 - 77 ns VCC = 5 V; CL = 15 pF - 26 - - - - - ns - 23 46 - 58 - 69 ns - 23 - - - - - ns - 7 15 - 19 - 22 ns nRD, nA, nB to nQ or nQ; CEXT = 0 pF; REXT = 5 kΩ; see Figure 9 nRD (reset) to nQ or nQ; CEXT = 0 pF; REXT = 5 kΩ; see Figure 9 VCC = 4.5 V VCC = 5 V; CL = 15 pF tt output VCC = 4.5 V; see Figure 9 transition time [1] 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 9 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); CL = 50 pF unless otherwise specified; for test circuit see Figure 12. Symbol Parameter tW pulse width 25 °C Conditions −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max nA LOW; see Figure 10 20 3 - 25 - 30 - ns nB HIGH; see Figure 10 20 5 - 25 - 30 - ns 20 7 - 25 - 30 - ns CEXT = 100 nF; REXT = 10 kΩ - 450 - - - - - µs CEXT = 0 pF; REXT = 5 kΩ - 75 - - - - - ns - 110 - - - - - ns 2 - 1000 - - - - kΩ VCC = 4.5 V nRD LOW; see Figure 11 [2] nQ HIGH and nQ LOW; VCC = 5.0 V; see Figure 10 and 11 nA, nB; CEXT = 0 pF; REXT = 5 kΩ; VCC = 5.0 V; see Figure 10 [3][4] trtrig retrigger time REXT external timing VCC = 5.0 V; see Figure 7 resistor CEXT external timing VCC = 5.0 V; see Figure 7 capacitor [4] - - - - - - - pF CPD power dissipation capacitance [5] - 56 - - - - - pF per monostable; VI = GND to VCC [1] tpd is the same as tPHL and tPLH; tt is the same as tTHL and tTLH [2] For other REXT and CEXT combinations see Figure 7. If CEXT > 10 nF, the next formula is valid. tW = K × REXT × CEXT, where: tW = typical output pulse width in ns; REXT = external resistor in kΩ; CEXT = external capacitor in pF; K = constant = 0.45 for VCC = 5.0 V and 0.55 for VCC = 2.0 V. The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is approximately 7 pF. [3] The time to retrigger the monostable multivibrator depends on the values of REXT and CEXT. The output pulse width will only be extended when the time between the active-going edges of the trigger input pulses meets the minimum retrigger time. If CEXT >10 pF, the next formula (at VCC = 5.0 V) for the setup time of a retrigger pulse is valid: trtrig = 30 + 0.19 × REXT × CEXT0.9 + 13 × REXT1.05, where: trtrig = retrigger time in ns; CEXT = external capacitor in pF; REXT = external resistor in kΩ. The inherent test jig and pin capacitance at pins 15 and 7 (nREXT/CEXT) is 7 pF. [4] When the device is powered-up, initiate the device via a reset pulse, when CEXT < 50 pF. [5] CPD is used to determine the dynamic power dissipation (PD in µW). PD = CPD × VCC2 × fi + ∑(CL × VCC2 × fo) + 0.75 × CEXT × VCC2 × fo + D × 16 × VCC where: fi = input frequency in MHz; fo = output frequency in MHz; D = duty factor in %; CL = output load capacitance in pF; VCC = supply voltage in V; CEXT = timing capacitance in pF; ∑(CL × VCC2 × fo) sum of outputs. 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 10 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 001aaa611 106 001aaa612 0.8 tW (ns) 'K' factor (1) 105 0.6 (2) (3) 104 0.4 (4) 103 0.2 102 10 1 10 102 0 104 103 CEXT (pF) 0 2 4 6 8 VCC (V) VCC = 5.0 V; Tamb = 25 °C. CEXT = 10 nF; REXT = 10 kΩ to 100 kΩ. Tamb = 25 °C. (1) REXT = 100 kΩ (2) REXT = 50 kΩ (3) REXT = 10 kΩ (4) REXT = 2 kΩ Fig 7. Typical output pulse width as a function of the external capacitor value Fig 8. 74HC123 typical ‘K’ factor as function of VCC 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 11 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 11. Waveforms VI VM nB input GND tW VI VM nA input GND tW VI VM nRD input GND tPLH tPLH tW VOH nQ output VY VM VX VOL tTHL tPHL (reset) tW tW VOH nQ output tPLH VY VM VX VOL tPHL tPHL tTLH tPLH (reset) tPHL 001aaa771 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 9. Propagation delays from inputs (nA, nB, nRD) to outputs (nQ, nQ) and output transition times 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 12 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset nB input tW nA input trtrig tW nQ output tW tW tW mna521 nRD = HIGH Fig 10. Output pulse control using retrigger pulse nB input nRD input tW nQ output tW tW mna522 nA = LOW Fig 11. Output pulse control using reset input nRD 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 13 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT RT CL 001aad983 Test data is given in Table 8. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 12. Test circuit for measuring switching times Table 8. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH 74HC123 VCC 6 ns 15 pF, 50 pF 1 kΩ open 74HCT123 3V 6 ns 15 pF, 50 pF 1 kΩ open 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 14 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 12. Application information 12.1 Timing component connections The basic output pulse width is essentially determined by the values of the external timing components REXT and CEXT. CEXT (1) REXT VCC GND nCEXT nREXT/CEXT 8 14 (6) 15 (7) 13 (5) 123 nA nB nQ 1 (9) 2 (10) 4 (12) nQ 3 (11) nRD 001aaa854 (1) For minimum noise generation it is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND). Fig 13. Timing component connections 12.2 Power-up considerations When the monostable is powered-up it may produce an output pulse, with a pulse width defined by the values of REXT and CEXT. This output pulse can be eliminated using the circuit shown in Figure 14. CEXT REXT VCC GND nCEXT nREXT/CEXT 8 14 (6) 15 (7) 13 (5) 123 nA nB nQ 1 (9) 2 (10) 4 (12) nQ 3 (11) nRD RESET VCC 001aaa613 Fig 14. Power-up output pulse elimination circuit 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 15 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 12.3 Power-down considerations A large capacitor CEXT may cause problems when powering-down the monostable due to the energy stored in this capacitor. When a system containing this device is powered-down or a rapid decrease of VCC to zero occurs, the monostable may sustain damage, due to the capacitor discharging through the input protection diodes. To avoid this possibility, use a damping diode (DEXT) preferably a germanium or Schottky type diode able to withstand large current surges and connect as shown in Figure 15. DEXT CEXT REXT VCC GND nCEXT nREXT/CEXT 8 14 (6) 15 (7) 13 (5) 123 nA nB nQ 1 (9) 2 (10) 4 (12) nQ 3 (11) 001aaa614 nRD Fig 15. Power-down protection circuit 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 16 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4 ME seating plane D A2 A A1 L c e Z w M b1 (e 1) b b2 MH 9 16 pin 1 index E 1 8 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 min. A2 max. b b1 b2 c D (1) E (1) e e1 L ME MH w Z (1) max. mm 4.2 0.51 3.2 1.73 1.30 0.53 0.38 1.25 0.85 0.36 0.23 19.50 18.55 6.48 6.20 2.54 7.62 3.60 3.05 8.25 7.80 10.0 8.3 0.254 0.76 inches 0.17 0.02 0.13 0.068 0.051 0.021 0.015 0.049 0.033 0.014 0.009 0.77 0.73 0.26 0.24 0.1 0.3 0.14 0.12 0.32 0.31 0.39 0.33 0.01 0.03 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 95-01-14 03-02-13 SOT38-4 Fig 16. Package outline SOT38-4 (DIP16) 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 17 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 17. Package outline SOT109-1 (SO16) 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 18 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm D SOT338-1 E A X c y HE v M A Z 9 16 Q A2 A (A 3) A1 pin 1 index θ Lp L 8 1 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) θ mm 2 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 7.9 7.6 1.25 1.03 0.63 0.9 0.7 0.2 0.13 0.1 1.00 0.55 8 o 0 o Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT338-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-150 Fig 18. Package outline SOT338-1 (SSOP16) 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 19 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 E D A X c y HE v M A Z 9 16 Q (A 3) A2 A A1 pin 1 index θ Lp L 1 8 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8 o 0 o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig 19. Package outline SOT403-1 (TSSOP16) 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 20 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset DHVQFN16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; SOT763-1 16 terminals; body 2.5 x 3.5 x 0.85 mm A B D A A1 E c detail X terminal 1 index area terminal 1 index area C e1 e 2 7 y y1 C v M C A B w M C b L 1 8 Eh e 16 9 15 10 Dh X 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT mm A(1) max. A1 b 1 0.05 0.00 0.30 0.18 c D (1) Dh E (1) Eh 0.2 3.6 3.4 2.15 1.85 2.6 2.4 1.15 0.85 e 0.5 e1 L v w y y1 2.5 0.5 0.3 0.1 0.05 0.05 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT763-1 --- MO-241 --- EUROPEAN PROJECTION ISSUE DATE 02-10-17 03-01-27 Fig 20. Package outline SOT763-1 (DHVQFN16) 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 21 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 14. Abbreviations Table 9. Abbreviations Acronym Abbreviation CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model 15. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT123_5 20090713 Product data sheet - 74HC_HCT123_4 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Section 3 “Ordering information” and Section 13 “Package outline”, package version SOT38-1 changed to SOT38-4 74HC_HCT123_4 20060616 Product data sheet - 74HC_HCT123_3 74HC_HCT123_3 20040511 Product specification - 74HC_HCT123_CNV_2 74HC_HCT123_CNV_2 19980708 Product specification - - 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 22 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 16.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] 74HC_HCT123_5 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 05 — 13 July 2009 23 of 24 74HC123; 74HCT123 NXP Semiconductors Dual retriggerable monostable multivibrator with reset 18. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 12.1 12.2 12.3 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 Functional description . . . . . . . . . . . . . . . . . . . 5 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 6 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 8 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Application information. . . . . . . . . . . . . . . . . . 15 Timing component connections . . . . . . . . . . . 15 Power-up considerations . . . . . . . . . . . . . . . . 15 Power-down considerations . . . . . . . . . . . . . . 16 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 17 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 22 Legal information. . . . . . . . . . . . . . . . . . . . . . . 23 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 23 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Contact information. . . . . . . . . . . . . . . . . . . . . 23 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 13 July 2009 Document identifier: 74HC_HCT123_5