LT5568 - 700MHz - 1050MHz High Linearity Direct Quadrature Modulator

LT5568
700MHz – 1050MHz High
Linearity Direct Quadrature
Modulator
DESCRIPTIO
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FEATURES
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The LT®5568 is a direct I/Q modulator designed for high
performance wireless applications, including wireless
infrastructure. It allows direct modulation of an RF signal
using differential baseband I and Q signals. It supports
PHS, GSM, EDGE, TD-SCDMA, CDMA, CDMA2000, WCDMA, and other systems. It may also be configured
as an image reject upconverting mixer, by applying
90° phase-shifted signals to the I and Q inputs. The I/Q
baseband inputs consist of voltage-to-current converters
that in turn drive double-balanced mixers. The outputs of
these mixers are summed and applied to an on-chip RF
transformer, which converts the differential mixer signals
to a 50Ω single-ended output. The four balanced I and Q
baseband input ports are intended for DC coupling from a
source with a common mode voltage level of about 0.5V.
The LO path consists of an LO buffer with single-ended
input, and precision quadrature generators that produce
the LO drive for the mixers. The supply voltage range is
4.5V to 5.25V.
Frequency Range: 700MHz to 1050MHz
High OIP3: +22.9dBm at 850MHz
Low Output Noise Floor at 5MHz Offset:
No RF: –160.3dBm/Hz
POUT = 4dBm: –154dBm/Hz
3-Ch CDMA2000 ACPR: –71.4dBc at 850MHz
Integrated LO Buffer and LO Quadrature Phase
Generator
50Ω AC-Coupled Single-Ended LO and RF Ports
50Ω DC Interface to Baseband Inputs
Low Carrier Leakage: –43dBm at 850MHz
High Image Rejection: –46dBc at 850MHz
16-Lead 4mm × 4mm QFN Package
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APPLICATIO S
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Infrastructure Tx for Cellular Bands
Image Reject Up-Converters for Cellular Bands
Low-Noise Variable Phase-Shifter for 700MHz to
1050MHz Local Oscillator Signals
RFID Reader
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
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TYPICAL APPLICATIO
CDMA2000 ACPR, AltCPR and Noise vs RF
Output Power at 850MHz for 1 and 3 Carriers
700MHz to 1050MHz Direct Conversion Transmitter Application
LT5568
V-I
I-CHANNEL
PA
0°
EN
90°
Q-CHANNEL
Q-DAC
BALUN
V-I
DOWNLINK TEST MODEL 64 DPCH 1-CH.
ACPR
–125
–135
–60
3-CH. ACPR
–70
3-CH. AltCPR
1-CH. AltCPR
–80
–145
–155
NOISE FLOOR AT 30MHz
OFFSET (dBm/Hz)
I-DAC
–50
5V
100nF
x2
RF = 700MHz
TO 1050MHz
ACPR, AltCPR (dBc)
VCC
3-CH. NOISE
BASEBAND
GENERATOR
5568 TA01
VCO/SYNTHESIZER
–90
–30
1-CH. NOISE
–165
–25
–15
–10
–5
–20
RF OUTPUT POWER PER CARRIER (dBm)
5568 TA02
5568f
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LT5568
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ABSOLUTE
AXI U RATI GS
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PACKAGE/ORDER I FOR ATIO
(Note 1)
VCC
GND
BBMI
BBPI
TOP VIEW
Supply Voltage .........................................................5.5V
Common Mode Level of BBPI, BBMI and
BBPQ, BBMQ .......................................................2.5V
Operating Ambient Temperature
(Note 2) ............................................... –40°C to 85°C
Storage Temperature Range................... –65°C to 125°C
Voltage on any Pin
Not to Exceed...................... –500mV to VCC + 500mV
16 15 14 13
EN 1
12 GND
GND 2
11 RF
17
LO 3
10 GND
GND 4
6
7
8
BBMQ
GND
BBPQ
VCC
9
5
GND
UF PACKAGE
16-LEAD (4mm × 4mm) PLASTIC QFN
TJMAX = 125°C, θJA = 37°C/W
EXPOSED PAD (PIN 17) IS GROUND, MUST BE SOLDERED TO PCB
ORDER PART NUMBER
UF PART MARKING
LT5568EUF
5568
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
VCC = 5V, EN = High, TA = 25°C, fLO = 850MHz, fRF = 852MHz, PLO = 0dBm.
BBPI, BBMI, BBPQ, BBMQ inputs 0.54VDC, Baseband Input Frequency = 2MHz, I&Q 90° shifted (upper side-band selection).
PRF, OUT = –10dBm, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
fRF
RF Frequency Range
RF Frequency Range
–3dB Bandwidth
–1dB Bandwidth
S22, ON
RF Output Return Loss
EN = High (Note 6)
MIN
TYP
MAX
UNITS
RF Output (RF)
0.6 to 1.2
0.7 to 1.05
GHz
GHz
–14
dB
S22, OFF
RF Output Return Loss
EN = Low (Note 6)
NFloor
RF Output Noise Floor
No Input Signal (Note 8)
POUT = 4dBm (Note 9)
POUT = 4dBm (Note 10)
–12
dB
GP
Conversion Power Gain
POUT/PIN, I&Q
GV
Conversion Voltage Gain
20 • Log (VOUT, 50Ω/VIN, DIFF, I or Q)
–6.8
dB
POUT
Absolute Output Power
1VP-P DIFF CW Signal, I and Q
–2.8
dBm
G3LO vs LO
3 • LO Conversion Gain Difference
(Note 17)
–23
dB
OP1dB
Output 1dB Compression
(Note 7)
8.3
dBm
OIP2
Output 2nd Order Intercept
(Notes 13, 14)
63
dBm
OIP3
Output 3rd Order Intercept
(Notes 13, 15)
22.9
dBm
–160.3
–154
–154
–9
–6.8
dBm/Hz
dBm/Hz
dBm/Hz
–3
dB
IR
Image Rejection
(Note 16)
–46
dBc
LOFT
Carrier Leakage
(LO Feedthrough)
EN = High, PLO = 0dBm (Note 16)
EN = Low, PLO = 0dBm (Note 16)
–43
–65
dBm
dBm
5568f
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LT5568
ELECTRICAL CHARACTERISTICS
VCC = 5V, EN = High, TA = 25°C, fLO = 850MHz, fRF = 852MHz, PLO = 0dBm.
BBPI, BBMI, BBPQ, BBMQ inputs 0.54VDC, Baseband Input Frequency = 2MHz, I&Q 90° shifted (upper side-band selection).
PRF, OUT = –10dBm, unless otherwise noted. (Note 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
LO Input (LO)
fLO
LO Frequency Range
PLO
LO Input Power
0.6 to 1.2
S11, ON
LO Input Return Loss
EN = High (Note 6)
–11.4
dB
S11, OFF
LO Input Return Loss
EN = Low (Note 6)
–2.7
dB
NFLO
LO Input Referred Noise Figure
(Note 5) at 850MHz
12.7
dB
GLO
LO to RF Small Signal Gain
(Note 5) at 850MHz
23.8
dB
IIP3LO
LO Input 3rd Order Intercept
(Note 5) at 850MHz
–11.5
dBm
–10
0
GHz
5
dBm
Baseband Inputs (BBPI, BBMI, BBPQ, BBMQ)
BWBB
Baseband Bandwidth
–3dB Bandwidth
380
MHz
VCMBB
DC Common Mode Voltage
(Note 4)
0.54
V
RIN, SE
Single-Ended Input Resistance
(Note 4)
48
Ω
PLO2BB
Carrier Feedthrough on BB
POUT = 0 (Note 4)
–38
dBm
IP1dB
Input 1dB Compression Point
Differential Peak-to-Peak (Notes 7, 18)
4.3
VP-P, DIFF
ΔGI/Q
I/Q Absolute Gain Imbalance
0.07
dB
ΔϕI/Q
I/Q Absolute Phase Imbalance
0.45
Deg
Power Supply (VCC)
VCC
Supply Voltage
4.5
5
5.25
V
ICC, ON
Supply Current
EN = High
80
117
165
mA
ICC, OFF
Supply Current, Sleep Mode
EN = 0V
50
μA
tON
Turn-On Time
EN = Low to High (Note 11)
0.3
μs
tOFF
Turn-Off Time
EN = High to Low (Note 12)
1.4
μs
230
V
μA
Enable (EN), Low = Off, High = On
Enable
Sleep
Input High Voltage
Input High Current
EN = High
EN = 5V
Input Low Voltage
Input Low Current
EN = Low
EN = 0V
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Specifications over the –40°C to 85°C temperature range are
assured by design, characterization and correlation with statistical process
controls.
Note 3: Tests are performed as shown in the configuration of Figure 7.
Note 4: On each of the four baseband inputs BBPI, BBMI, BBPQ and
BBMQ.
Note 5: V(BBPI) – V(BBMI) = 1VDC, V(BBPQ) – V(BBMQ) = 1VDC.
Note 6: Maximum value within –1dB bandwidth.
Note 7: An external coupling capacitor is used in the RF output line.
Note 8: At 20MHz offset from the LO signal frequency.
Note 9: At 20MHz offset from the CW signal frequency.
1.0
0.5
0
V
μA
Note 10: At 5MHz offset from the CW signal frequency.
Note 11: RF power is within 10% of final value.
Note 12: RF power is at least 30dB lower than in the ON state.
Note 13: Baseband is driven by 2MHz and 2.1MHz tones. Drive level is set
in such a way that the two resulting RF tones are –10dBm each.
Note 14: IM2 measured at LO frequency + 4.1MHz.
Note 15: IM3 measured at LO frequency + 1.9MHz and LO frequency +
2.2MHz.
Note 16: Amplitude average of the characterization data set without image
or LO feedthrough nulling (unadjusted).
Note 17: The difference in conversion gain between the spurious signal at
f = 3 • LO – BB versus the conversion gain at the desired signal at f = LO +
BB for BB = 2MHz and LO = 850MHz.
Note 18: The input voltage corresponding to the output P1dB.
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LT5568
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TYPICAL PERFOR A CE CHARACTERISTICS
VCC = 5V, EN = High, TA = 25°C, fLO = 850MHz,
PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 0.54VDC, Baseband Input Frequency fBB = 2MHz, I&Q 90° shifted. fRF = fBB + fLO (upper
sideband selection). PRF, OUT = –10dBm (–10dBm/tone for 2-tone measurements), unless otherwise noted. (Note 3)
RF Output Power vs LO Frequency
at 1VP-P Differential Baseband Drive
Supply Current vs Supply Voltage
85°C
120
25°C
110
–40°C
100
4.5
5
SUPPLY VOLTAGE (V)
–4
–2
–6
–4
–6
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–8
–10
550
5.5
Voltage Gain vs LO Frequency
0
VOLTAGE GAIN (dB)
130
RF OUTPUT POWER (dBm)
SUPPLY CURRENT (mA)
140
650
–8
–10
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–12
–14
550
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G02
650
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G03
5568 G01
Output IP3 vs LO Frequency
26
70
fBB, 1 = 2MHz
fBB, 2 = 2.1MHz
22
20
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
18
16
550
650
8
OP1dB (dBm)
65
OIP2 (dBm)
OIP3 (dBm)
10
fIM2 = fBB, 1 + fBB, 2 + fLO
fBB, 1 = 2MHz
fBB, 2 = 2.1MHz
24
60
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
55
50
550
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
650
5568 G04
–42
–45
P(2 • LO) (dBm)
–40
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–46
–48
550
650
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G07
2
550
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G05
2 • LO Leakage to RF Output
vs 2 • LO Frequency
–40
–44
6
–45
–50
–55
–55
–60
1.3
1.5 1.7 1.9 2.1 2.3
2 • LO FREQUENCY (GHz)
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G06
–40
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
1.1
650
3 • LO Leakage to RF Output
vs 3 • LO Frequency
–50
–60
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
4
P(3 • LO) (dBm)
LO Feedthrough to RF Output
vs LO Frequency
LOFT (dBm)
Output 1dB Compression
vs LO Frequency
Output IP2 vs LO Frequency
2.5
5568 G08
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–65
1.65 1.95 2.25 2.55 2.85 3.15 3.45 3.75
3 • LO FREQUENCY (GHz)
5568 G09
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LT5568
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TYPICAL PERFOR A CE CHARACTERISTICS
VCC = 5V, EN = High, TA = 25°C, fLO = 850MHz,
PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 0.54VDC, Baseband Input Frequency fBB = 2MHz, I&Q 90° shifted. fRF = fBB + fLO (upper
sideband selection). PRF, OUT = –10dBm (–10dBm/tone for 2-tone measurements), unless otherwise noted. (Note 3)
Noise Floor vs RF Frequency
–162
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–164
550
650
–35
–40
650
5568 G10
Absolute I/Q Gain Imbalance
vs LO Frequency
ABSOLUTE I/Q PHASE IMBALANCE (DEG)
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G13
3
750 850 950 1050 1150 1250
RF FREQUENCY (MHz)
5568 G12
–6
2
–8
–10
–12
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
1
–14
0
550
650
–16
–20
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G14
–16
–12
–8
–4
0
4
LO INPUT POWER (dBm)
10
–10
–30
21
19
fBB, 1 = 2MHz
fBB, 2 = 2.1MHz
–16
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–12
–8
–4
0
4
LO INPUT POWER (dBm)
8
5568 G16
RF
–40°C
85°C
25°C
0
–40°C
25°C
85°C
–40
HD3
HD2
–60
–20
25°C
–50
–10
–30
–40°C
–40
85°C
–70
–80
RF CW OUTPUT POWER (dBm)
–20
23
15
8
5568 G15
RF CW Output Power, HD2 and HD3 vs
CW Baseband Voltage and Temperature
25
13
–20
RF PORT, EN = HIGH, PLO = 0dBm
650
Voltage Gain vs LO Power
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
Output IP3 vs LO Power
17
RF PORT, EN = HIGH, No LO
–4
HD2, HD3 (dBc)
650
0IP3 (dBm)
ABSOLUTE I/Q GAIN IMBALANCE (dB)
0.1
RF PORT,
EN = LOW
–40
550
750 850 950 1050 1150 1250
LO FREQUENCY (MHz)
5568 G11
4
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
0
550
–20
Absolute I/Q Phase Imbalance
vs LO Frequency
0.2
LO PORT, EN = HIGH,
PLO = 0dBm
LO PORT,
–30 EN = HIGH,
PLO = –10dBm
–45
–50
550
750 850 950 1050 1150 1250
RF FREQUENCY (MHz)
LO PORT, EN = LOW
–10
VOLTAGE GAIN (dB)
–163
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
S11 (dB)
–161
0
–30
fLO = 850MHz
(FIXED)
IMAGE REJECTION (dBc)
NOISE FLOOR (dBm/Hz)
–160
LO and RF Port Return Loss
vs RF Frequency
Image Rejection vs LO Frequency
–50
0
1
2
3
4
5
I AND Q BASEBAND VOLTAGE (VP–P, DIFF)
–60
HD2 = MAX POWER AT fLO + 2 • fBB OR fLO – 2 • fBB
HD3 = MAX POWER AT fLO + 3 • fBB OR fLO – 3 • fBB
5568 G17
5568f
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LT5568
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TYPICAL PERFOR A CE CHARACTERISTICS
VCC = 5V, EN = High, TA = 25°C, fLO = 850MHz,
PLO = 0dBm. BBPI, BBMI, BBPQ, BBMQ inputs 0.54VDC, Baseband Input Frequency fBB = 2MHz, I&Q 90° shifted. fRF = fBB + fLO (upper
sideband selection). PRF, OUT = –10dBm (–10dBm/tone for 2-tone measurements), unless otherwise noted. (Note 3)
RF CW Output Power, HD2 and
HD3 vs CW Baseband Voltage
and Supply Voltage
LO Feedthrough to RF Output
vs CW Baseband Voltage
10
5V
4.5V
HD2, HD3 (dBc)
–30
–10
HD3
–20
–40
–50
–30
5V
4.5V
HD2
–60
–40
5.5V
–70
–80
RF CW OUTPUT POWER (dBm)
0
–35
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–38
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–40
IR (dBc)
RF
–20
–36
LOFT (dBm)
–10
Image Rejection
vs CW Baseband Voltage
–40
–42
–45
–50
–50
0
–60
1
2
3
4
5
I AND Q BASEBAND VOLTAGE (VP–P, DIFF)
–44
0
–55
1
2
3
4
5
I AND Q BASEBAND VOLTAGE (VP–P, DIFF)
HD2 = MAX POWER AT fLO + 2 • fBB OR fLO – 2 • fBB
HD3 = MAX POWER AT fLO + 3 • fBB OR fLO – 3 • fBB
0
1
2
3
4
5
I AND Q BASEBAND VOLTAGE (VP–P, DIFF)
5568 G19
5568 G20
5568 G18
RF Two-Tone Power (Each Tone),
IM2 and IM3 vs Baseband Voltage
and Supply Voltage
RF Two-Tone Power (Each Tone),
IM2 and IM3 vs Baseband Voltage
and Temperature
–20
–40°C
25°C
25°C
–30
85°C
–40
IM3
–40°C
IM2
–60
–70
85°C
fBBI = 2MHz, 2.1MHz, 0°
fBBQ = 2MHz, 2.1MHz, 90°
–80
5568 G21
–50
25°C
5V, 5.5V
–20
–30
5V, 5.5V
IM3
–40
5V
–50
4.5V
IM2
–60
5.5V
1
10
0.1
I AND Q BASEBAND VOLTAGE (VP–P, DIFF, EACH TONE)
IM2 = POWER AT fLO + 4.1MHz
IM3 = MAX POWER AT fLO + 1.9MHz OR fLO + 2.2MHz
Noise Floor Distribution
fNOISE = 870MHz
–40°C
25°C
85°C
0
30
20
PLO = –10dBm
NO BASEBAND
APPLIED
20
10
–159.2
5568 G24
0
–8
–7.5
–6.5
–7
GAIN (dB)
–6
5568 G23
Image Rejection Distribution
–40°C
25°C
85°C
40
VBB = 800mVP-P,DIFF
30
20
10
10
6
20
50
PERCENTAGE (%)
PERCENTAGE (%)
PERCENTAGE (%)
40
–160
–159.6
–160.4
NOISE FLOOR (dBm/Hz)
30
LO Leakage Distribution
40
30
0
–160.8
40
10
fBBI = 2MHz, 2.1MHz, 0°
fBBQ = 2MHz, 2.1MHz, 90°
–80
60
50
4.5V
–70
1
10
0.1
I AND Q BASEBAND VOLTAGE (VP–P, DIFF, EACH TONE)
IM2 = POWER AT fLO + 4.1MHz
IM3 = MAX POWER AT fLO + 1.9MHz OR fLO + 2.2MHz
–40°C
25°C
85°C
50
4.5V
–10
PERCENTAGE (%)
85°C
–10
–40°C
25°C
85°C
RF
0
PRF,TONE (dBm), IM2, IM3 (dBc)
–40°C
60
5568 G22
RF
0
PRF,TONE (dBm), IM2, IM3 (dBc)
Gain Distribution
10
10
–54
–50
–46
–42
–38
LO LEAKAGE (dBm)
–34
5568 G25
0
< –60
–52
–48
–56
IMAGE REJECTION (dBc)
–44
5568 G26
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LT5568
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PI FU CTIO S
EN (Pin 1): Enable Input. When the enable pin voltage is
higher than 1V, the IC is turned on. When the input voltage
is less than 0.5V, the IC is turned off.
BBPQ, BBMQ (Pins 7, 5): Baseband Inputs for the Q-channel, each 50Ω input impedance. Internally biased at about
0.54V. Applied voltage must stay below 2.5V.
GND (Pins 2, 4, 6, 9, 10, 12, 15): Ground. Pins 6, 9, 15
and 17 (exposed pad) are connected to each other internally. Pins 2 and 4 are connected to each other internally
and function as the ground return for the LO signal. Pins
10 and 12 are connected to each other internally and
function as the ground return for the on-chip RF balun.
For best RF performance, pins 2, 4, 6, 9, 10, 12, 15 and
the Exposed Pad 17 should be connected to the printed
circuit board ground plane.
VCC (Pins 8, 13): Power Supply. Pins 8 and 13 are connected to each other internally. It is recommended to use
0.1μF capacitors for decoupling to ground on each of
these pins.
LO (Pin 3): LO Input. The LO input is an AC-coupled singleended input with approximately 50Ω input impedance at
RF frequencies. Externally applied DC voltage should be
within the range –0.5V to VCC + 0.5V in order to avoid
turning on ESD protection diodes.
RF (Pin 11): RF Output. The RF output is an AC-coupled
single-ended output with approximately 50Ω output impedance at RF frequencies. Externally applied DC voltage
should be within the range –0.5V to VCC + 0.5V in order
to avoid turning on ESD protection diodes.
BBPI, BBMI (Pins 14, 16): Baseband Inputs for the
I-channel, each with 50Ω input impedance. Internally biased
at about 0.54V. Applied voltage must stay below 2.5V.
Exposed Pad (Pin 17): Ground. This pin must be soldered
to the printed circuit board ground plane.
5568f
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LT5568
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BLOCK DIAGRA
VCC
8
BBPI 14
13
LT5568
V-I
BBMI 16
11 RF
0°
90°
BBPQ 7
BALUN
1 EN
V-I
BBMQ 5
2
4
6
9
3
GND
LO
10
12
15
17
5568 BD
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The LT5568 consists of I and Q input differential voltageto-current converters, I and Q up-conversion mixers, an
RF output balun, an LO quadrature phase generator and
LO buffers.
LT5568
RF
C
VCC = 5V
BALUN
FROM
Q
LOMI
R1A
25Ω
LOPI
R2B
23Ω
R1B
23Ω
BBPI
R2A
25Ω
CM
12pF
R3
R4
12pF
Baseband Interface
VREF = 540mV
BBMI
5568 F01
GND
Figure 1. Simplified Circuit Schematic of the LT5568
(Only I-Half is Drawn)
External I and Q baseband signals are applied to the differential baseband input pins, BBPI, BBMI, and BBPQ,
BBMQ. These voltage signals are converted to currents and
translated to RF frequency by means of double-balanced
up-converting mixers. The mixer outputs are combined
in an RF output balun, which also transforms the output
impedance to 50Ω. The center frequency of the resulting
RF signal is equal to the LO signal frequency. The LO input
drives a phase shifter which splits the LO signal into inphase and quadrature LO signals. These LO signals are then
applied to on-chip buffers which drive the up-conversion
mixers. Both the LO input and RF output are single-ended,
50Ω-matched and AC coupled.
The baseband inputs (BBPI, BBMI), (BBPQ, BBMQ) present
a differential input impedance of about 100Ω. At each of the
four baseband inputs, a first-order lowpass filter using 25Ω
5568f
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and 12pF to ground is incorporated (see Figure 1), which
limits the baseband bandwidth to approximately 330MHz
(–1dB point). The common mode voltage is about 0.54V
and is approximately constant over temperature.
It is important that the applied common mode voltage level
of the I and Q inputs is about 0.54V in order to properly
bias the LT5568. Some I/Q test generators allow setting
the common mode voltage independently. In this case, the
common mode voltage of those generators must be set
to 0.27V to match the LT5568 internal bias, because for
DC signals, there is no –6dB source-load voltage division
(see Figure 2).
50Ω
+
–
50Ω
0.27VDC
0.54VDC
50Ω
+
–
GENERATOR
48Ω
0.54VDC
0.54VDC
0.54VDC
GENERATOR
+
–
LT5568
5568 F02
Figure 2. DC Voltage Levels for a Generator Programmed at
0.27VDC for a 50Ω Load and the LT5568 as a Load
The baseband inputs should be driven differentially; otherwise, the even-order distortion products will degrade the
overall linearity severely. Typically, a DAC will be the signal
source for the LT5568. Reconstruction filters should be
placed between the DAC output and the LT5568’s baseband
inputs. In Figure 3, an example interface schematic shows a
commonly used DAC output interface followed by a passive
5th order ladder filter. The DAC in this example sources
a current from 0mA to 20mA. The interface may be DC
coupled. This allows adjustment of the DAC’s differential
output current to minimize the LO feedthrough. Optionally,
transformer T1 can be inserted to improve the current
balance in the BBPI and BBMI pins. This will improve the
2nd order distortion performance (OIP2).
The maximum single sideband CW RF output power at
850MHz using both I and Q channels with the configuration shown in Figure 3 is about –3dBm. The maximum
CW output power can be increased by connecting load
resistors R5 and R6 to –5V instead of GND, and changing
their values to 550Ω. In that case, the maximum single
sideband CW RF output power at 850MHz will be about
+2dBm. In addition, the ladder filter component values
require adjustment for a higher source impedance.
VCC = 5V
LT5568
BALUN
RF = –3dBm, MAX
C
LOMI
0.5V
0mA to 20mA
L1A
C1
BBPI
•
R5, 50Ω
DAC
C2
T1
1:1
GND
R6, 50Ω
L1B
C3
L2B
R1
45Ω
R2
45Ω
CM
R3
33Ω
VREF = 500mV
•
0mA to 20mA
L2A
LOPI
R4
33Ω
15mA
BBMI
0.5V
5568 F03
GND
Figure 3. LT5568 5th Order Filtered Baseband Interface with Common DAC (Only I-Channel is Shown)
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LO Section
The internal LO input amplifier performs single-ended to
differential conversion of the LO input signal. Figure 4
shows the equivalent circuit schematic of the LO input.
VCC
20pF
LO
INPUT
51Ω
5568 F04
Figure 4. Equivalent Circuit Schematic of the LO Input
The internal, differential LO signal is then split into in-phase
and quadrature (90° phase shifted) signals that drive LO
buffer sections. These buffers drive the double balanced
I and Q mixers. The phase relationship between the LO
input and the internal in-phase LO and quadrature LO
signals is fixed, and is independent of start-up conditions.
The internal phase shifters are designed to deliver accurate quadrature signals. For LO frequencies significantly
below 600MHz or above 1GHz, however, the quadrature
accuracy will diminish, causing the image rejection to
degrade. The LO pin input impedance is about 50Ω, and
the recommended LO input power is 0dBm. For lower
LO input power, the gain, OIP2, OIP3 and noise floor at
PRF = 4dBm will degrade, especially below –5dBm and at
TA = 85°C. For high LO input power (e.g., +5dBm), the LO
feedthrough will increase with no improvement in linearity
or gain. For lower LO input power, e.g., PLO = –5dBm, the
image rejection improves (especially around 950MHz) at
the cost of 1.5dB degradation of the noise floor at PRF =
4dBm. Harmonics present on the LO signal can degrade the
image rejection because they can introduce a small excess
phase shift in the internal phase splitter. For the second (at
1.7GHz) and third harmonics (at 2.55GHz) at –20dBc, the
resulting signal at the image frequency is about –56dBc
or lower, corresponding to an excess phase shift of much
less than 1 degree. For the second and third LO harmonics
at –10dBc, the introduced signal at the image frequency is
about –47dBc. Higher harmonics than the third will have
less impact. The LO return loss typically will be better than
11dB over the 700MHz to 1.05GHz range. Table 1 shows
the LO port input impedance vs frequency.
Table 1. LO Port Input Impedance vs Frequency for EN = High
and PLO = 0dBm
Frequency
MHz
Input Impedance
Ω
Mag
S11
Angle
500
600
700
800
900
1000
1100
1200
47.5 + j12.1
59.4 + j8.4
66.2 – j1.14
67.2 – j13.4
61.1 – j23.9
53.3 – j26.8
48.2 – j26.1
42.0 – j27.4
0.126
0.115
0.140
0.185
0.232
0.252
0.258
0.297
95.0
37.8
–3.41
–31.7
–53.2
–68.7
–79.4
–90.0
If the part is in shutdown mode, the input impedance of
the LO port will be different. The LO input impedance for
EN = Low is given in Table 2.
Table 2. LO Port Input Impedance vs Frequency for EN = Low and
PLO = 0dBm
Frequency
MHz
Input Impedance
Ω
Mag
S11
Angle
500
600
700
800
900
1000
1100
1200
33.6 + j41.3
59.8 + j69.1
140 + j89.8
225 – j62.6
92.9 – j128
39.8 – j95.9
22.8 – j72.7
16.0 – j57.3
0.477
0.539
0.606
0.659
0.704
0.735
0.755
0.763
85.4
49.8
19.6
–6.8
–29.6
–45.5
–65.6
–79.7
RF Section
After up-conversion, the RF outputs of the I and Q mixers are
combined. An on-chip balun performs internal differential
to single-ended output conversion, while transforming the
output signal impedance to 50Ω. Table 3 shows the RF
port output impedance vs frequency.
Table 3. RF Port Output Impedance vs Frequency for EN = High
and PLO = 0dBm
Frequency
MHz
Input Impedance
Ω
Mag
S22
Angle
500
600
700
800
900
1000
1100
1200
22.0 + j5.7
28.2 + j12.5
38.8 + j14.8
49.4 + j7.2
49.3 – j5.1
42.5 – j11.1
36.7 – j11.7
33.0 – j10.3
0.395
0.317
0.206
0.072
0.051
0.143
0.202
0.238
164.2
141.3
117.5
90.6
–94.7
–117.0
–130.7
–141.6
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The RF output S22 with no LO power applied is given in
Table 4.
Table 4. RF Port Output Impedance vs Frequency for EN = High
and No LO Power Applied
Frequency
MHz
Input Impedance
Ω
Mag
S22
Angle
500
22.7 + j5.6
0.381
164.0
600
29.7 + j11.6
0.290
142.0
700
40.5 + j11.6
0.164
121.9
800
47.3 + j2.2
0.037
139.6
900
44.1 – j6.7
0.094
–126.9
1000
38.2 – j9.8
0.171
–133.9
1100
34.0 – j9.4
0.218
–143.1
1200
31.5 – j7.8
0.245
–151.6
For EN = Low the S22 is given in Table 5.
Table 5. RF Port Output Impedance vs Frequency for EN = Low
Frequency
MHz
Input Impedance
Ω
Mag
S22
Angle
500
21.2 + j5.4
0.409
164.9
600
26.6 + j12.5
0.340
142.5
700
36.6 + j16.6
0.241
118.1
800
49.2 + j11.6
0.116
87.4
900
52.9 – j2.0
0.034
–33.1
1000
46.4 – j11.2
0.121
–101.1
1100
39.3 – j13.2
0.188
–120.6
1200
34.4 – j12.1
0.231
–133.8
VCC
Note that an ESD diode is connected internally from
the RF output to ground. For strong output RF signal
levels (higher than 3dBm), this ESD diode can degrade
the linearity performance if the 50Ω termination impedance is connected directly to ground. To prevent this, a
coupling capacitor can be inserted in the RF output line.
This is strongly recommended during a 1dB compression
measurement.
Enable Interface
Figure 6 shows a simplified schematic of the EN pin interface. The voltage necessary to turn on the LT5568 is
1V. To disable (shut down) the chip, the enable voltage
must be below 0.5V. If the EN pin is not connected, the
chip is disabled. This EN = Low condition is assured by
the 75k on-chip pull-down resistor. It is important that
the voltage at the EN pin does not exceed VCC by more
than 0.5V. If this should occur, the supply current could
be sourced through the EN pin ESD protection diodes,
which are not designed to carry the full supply current,
and damage may result.
VCC
EN
75k
25k
21pF
RF
OUTPUT
7nH
1pF
51Ω
5568 F06
5568 F05
Figure 5. Equivalent Circuit Schematic of the RF Output
Figure 6. EN Pin Interface
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Evaluation Board
Figure 7 shows the evaluation board schematic. A good
ground connection is required for the exposed pad. If this
is not done properly, the RF performance will degrade. Additionally, the exposed pad provides heat sinking for the part
and minimizes the possibility of the chip overheating.
J1
R1 (optional) limits the EN pin current in the event that
the EN pin is pulled high while the VCC inputs are low. In
Figures 8 and 9 the silk screens and the PCB board layout
are shown.
J2
BBIM
BBIP
VCC
16
R1
100Ω 1
VCC EN
2
LO
IN
J4
3
4
15
14
C2
100nF
13
BBMI GND BBPI VCC
EN
GND
GND
RF
LT5568
LO
GND
GND
GND
GND
BBMQ GND BBPQ VCC
5
6
7
12
10
BBQM
RF
OUT
9
17
8
C1
100nF
J5
J3
11
J6
GND
BBQP
BOARD NUMBER: DC966A
Figure 7. Evaluation Circuit Schematic
5568 F07
Figure 8. Component Side of Evaluation Board
Figure 9. Bottom Side of Evaluation Board
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Application Measurements
The LT5568 is recommended for base-station applications
using various modulation formats. Figure 10 shows a typical application. Figure 11 shows the ACPR performance
for CDMA2000 using 1- and 3-carrier modulation. Figures
12 and 13 illustrate the 1- and 3-carrier CDMA2000 RF
spectrum. To calculate ACPR, a correction is made for the
spectrum analyzer noise floor. If the output power is high,
the ACPR will be limited by the linearity performance of the
part. If the output power is low, the ACPR will be limited
by the noise performance of the part. In the middle, an
optimum ACPR is observed.
Because of the LT5568’s very high dynamic range, the test
equipment can limit the accuracy of the ACPR measure-
V-I
I-CHANNEL
0°
1
EN
11
90°
7
Q-DAC
5
Q-CHANNEL
BALUN
V-I
PA
–135
–60
3-CH. ACPR
–70
3-CH. AltCPR
1-CH. AltCPR
–80
BASEBAND
GENERATOR
2, 4, 6, 9, 10, 12, 15, 17
3
VCO/SYNTHESIZER
–125
DOWNLINK TEST MODEL 64 DPCH 1-CH.
ACPR
–145
–155
NOISE FLOOR AT 30MHz
OFFSET (dBm/Hz)
16
–50
ACPR, AltCPR (dBc)
L5568
14
The ACPR performance is sensitive to the amplitude match
of the BBIP and BBIM (or BBQP and BBQM) inputs. This
is because a difference in AC current amplitude will give
rise to a difference in amplitude between the even-order
harmonic products generated in the internal V-I converter.
As a result, they will not cancel out entirely. Therefore, it
is important to keep the currents in those pins exactly the
same (but of opposite sign). The current will enter the
LT5568’s common-base stage, and will flow to the mixer
upper switches. This can be seen in Figure 1 where the
internal circuit of the LT5568 is drawn. For best results,
a high ohmic source is recommended; for example, the
5V
100nF
x2
RF = 700MHz
TO 1050MHz
VCC 8, 13
I-DAC
ment. See Application Note 99. Consult the factory for
advice on the ACPR measurement, if needed.
3-CH. NOISE
5568 F10
1-CH. NOISE
–90
–30
–165
–25
–15
–10
–5
–20
RF OUTPUT POWER PER CARRIER (dBm)
5568 F11
Figure 10. 700MHz to 1050MHz Direct
Conversion Transmitter Application
–30
–50
–60
–70
–80
–90 UNCORRECTED
SPECTRUM
–100
CORRECTED
SPECTRUM
–110
SPECTRUM ANALYSER NOISE FLOOR
–130
846.25 847.75 849.25 850.75 852.25 853.75
RF FREQUENCY (MHz)
5568 F12
Figure 12. 1-Carrier CDMA2000 Spectrum
DOWNLINK
TEST
MODEL 64
DPCH
–40
POWER IN 30kHz BW (dBm)
POWER IN 30kHz BW (dBm)
–30
DOWNLINK TEST
MODEL 64 DPCH
–40
–120
Figure 11. APCR, AltCPR and Noise
CDMA2000 Modulation
–50
–60
–70
–80
–90
UNCORRECTED
SPECTRUM
–100
–110
–120
–130
844
CORRECTED
SPECTRUM
846
SPECTRUM ANALYSER
NOISE FLOOR
850
852
852
848
RF FREQUENCY (MHz)
856
5568 F13
Figure 13. 3-Carrier CDMA2000 Spectrum
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interface circuit drawn in Figure 3, modified by pulling
resistors R5 and R6 to a –5V supply and adjusting their
values to 550Ω, with T1 omitted.
Another method to reduce current mismatch between
the currents flowing in the BBIP and BBIM pins (or the
BBQP and BBQM pins) is to use a 1:1 transformer with
the two windings in the DC path (T1 in Figure 3). For DC,
the transformer forms a short, and for AC, the transformer
will reduce the common mode current component, which
forces the two currents to be better matched. Alternatively,
a transformer with 1:2 impedance ratio can be used, which
gives a convenient DC separation between primary and
secondary in combination with the required impedance
–40
match. The secondary center tap should not be connected,
which allows some voltage swing if there is a single-ended
input impedance difference at the baseband pins. As a
result, both currents will be equal. The disadvantage is that
there is no DC coupling, so the LO feedthrough calibration
cannot be performed via the BB connections. After calibration when the temperature changes, the LO feedthrough
and the image rejection performance will change. This is
illustrated in Figure 14. The LO feedthrough and image
rejection can also change as a function of the baseband
drive level, as is depicted in Figure 15. In Figures 16 and
17 the LO feedthrough and image rejection vs LO power
are shown.
10
CALIBRATED WITH PRF = –10dBm
–40°C
0
LOFT (dBm), IR (dBc)
–60
LO FEEDTHROUGH
–70
–80
VCC = 5V
fBBI = 2MHz, 0°
fBBQ = 2MHz, 90° + ϕ
fLO = 850MHz
–90
–40
–20
PRF, LOFT (dBm), IR (dBc)
IMAGE REJECTION
–50
40
20
0
TEMPERATURE (°C)
60
25°C
–10
–20
LOFT
–30
–40°C
–40°C
–40
85°C
–50
IR
85°C
VCC = 5V
EN = High
fLO = 850MHz
–60
–70
fRF = fBB + fLO
PLO = 0dBm
EN = High
–80
–90
80
85°C
PRF
25°C
0
5568 F14
fBB, 1 = 2MHz, 0°
fBB, 0 = 2MHz, 90°
fRF = fBB + fLO
PLO = 0dBm
1
3
4
5
2
I AND Q BASEBAND VOLTAGE (VP-P, DIFF)
5568 F15
Figure 14. LO Feedthrough and Image Rejection
vs Temperature after Calibration at 25°C
Figure 15. LO Feedthrough and Image Rejection
vs Baseband Drive Voltage after Calibration at 25°C
–42
–25
fLO = 850MHz
fLO = 850MHz
PRF = –10dBm
IMAGE REJECTION (dBc)
LO FEEDTHROUGH (dBm)
–30
–44
–46
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–48
–50
–20
–16
–12 –8
–4
0
4
LO INPUT POWER (dBm)
–35
–40
–45
5V, –40°C
5V, 25°C
5V, 85°C
4.5V, 25°C
5.5V, 25°C
–50
8
5568 G16
Figure 16. LO Feedthrough vs LO Power
–55
–20
–16
0
4
–12 –8
–4
LO INPUT POWER (dBm)
8
5568 G17
Figure 17. Image Rejection vs LO Power
5568f
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LT5568
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PACKAGE DESCRIPTIO
UF Package
16-Lead Plastic QFN (4mm × 4mm)
(Reference LTC DWG # 05-08-1692)
0.72 ±0.05
4.35 ± 0.05
2.15 ± 0.05
2.90 ± 0.05 (4 SIDES)
PACKAGE OUTLINE
0.30 ±0.05
0.65 BSC
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
BOTTOM VIEW—EXPOSED PAD
4.00 ± 0.10
(4 SIDES)
0.75 ± 0.05
R = 0.115
TYP
15
PIN 1 NOTCH R = 0.20 TYP
OR 0.35 × 45° CHAMFER
16
0.55 ± 0.20
PIN 1
TOP MARK
(NOTE 6)
1
2.15 ± 0.10
(4-SIDES)
2
(UF16) QFN 10-04
0.200 REF
0.00 – 0.05
0.30 ± 0.05
0.65 BSC
NOTE:
1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGC)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON THE TOP AND BOTTOM OF PACKAGE
5568f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However,
no responsibility is assumed for its use. Linear Technology Corporation makes no representation that
the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LT5568
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT5511
High Linearity Upconverting Mixer
RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer
LT5512
DC to 3GHz High Signal Level Downconverting
Mixer
DC to 3GHz, 17dBm IIP3, Integrated LO Buffer
LT5514
Ultralow Distortion, IF Amplifier/ADC Driver
with Digitally Controlled Gain
850MHz Bandwidth, 47dBm OIP3 at 100MHz, 10.5dB to 33dB Gain Control Range
LT5515
1.5GHz to 2.5GHz Direct Conversion Quadrature 20dBm IIP3, Integrated LO Quadrature Generator
Demodulator
LT5516
0.8GHz to 1.5GHz Direct Conversion Quadrature 21.5dBm IIP3, Integrated LO Quadrature Generator
Demodulator
LT5517
40MHz to 900MHz Quadrature Demodulator
21dBm IIP3, Integrated LO Quadrature Generator
LT5518
1.5GHz to 2.4GHz High Linearity Direct
Quadrature Modulator
22.8dBm OIP3 at 2GHz, –158.2dBm/Hz Noise Floor, 50Ω Single-Ended LO and RF
Ports, 4-Ch W-CDMA ACPR = –64dBc at 2.14GHz
LT5519
0.7GHz to 1.4GHz High Linearity Upconverting
Mixer
17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50Ω Matching,
Single-Ended LO and RF Ports Operation
LT5520
1.3GHz to 2.3GHz High Linearity Upconverting
Mixer
15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50Ω Matching,
Single-Ended LO and RF Ports Operation
LT5521
10MHz to 3700MHz High Linearity
Upconverting Mixer
24.2dBm IIP3 at 1.95GHz, NF = 12.5dB, 3.15V to 5.25V Supply, Single-Ended LO
Port Operation
LT5522
600MHz to 2.7GHz High Signal Level
Downconverting Mixer
4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50Ω Single-Ended RF
and LO Ports
LT5524
Low Power, Low Distortion ADC Driver with
Digitally Programmable Gain
450MHz Bandwidth, 40dBm OIP3, 4.5dB to 27dB Gain Control
LT5526
High Linearity, Low Power Downconverting
Mixer
3V to 5.3V Supply, 16.5dBm IIP3, 100kHz to 2GHz RF, NF = 11dB, ICC = 28mA,
–65dBm LO-RF Leakage
LT5527
400MHz to 3.7GHz High Signal Level
Downconverting Mixer
IIP3 = 23.5dBm and NF = 12.5dB at 1900MHz, 4.5V to 5.25V Supply, ICC = 78mA
LT5528
1.5GHz to 2.4GHz High Linearity Direct
Quadrature Modulator
21.8dBm OIP3 at 2GHz, –159.3dBm/Hz Noise Floor, 50Ω, 0.5VDC Baseband Interface,
4-Ch W-CDMA ACPR = –66dBc at 2.14GHz
Infrastructure
RF Power Detectors
LTC®5505
RF Power Detectors with >40dB Dynamic
Range
LTC5507
100kHz to 1000MHz RF Power Detector
100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply
LTC5508
300MHz to 7GHz RF Power Detector
44dB Dynamic Range, Temperature Compensated, SC70 Package
LTC5509
300MHz to 3GHz RF Power Detector
36dB Dynamic Range, Low Power Consumption, SC70 Package
LTC5532
300MHz to 7GHz Precision RF Power Detector
Precision VOUT Offset Control, Adjustable Gain and Offset
LT5534
50MHz to 3GHz Loq RF Power Detector with
60dB Dynamic Range
±1dB Output Variation over Temperature, 38ns Response Time
LTC5536
Precision 600MHz to 7GHz RF Detector with
Fast Comparater
25ns Response Time, Comparator Reference Input, Latch Enable Input, –26dBm to
+12dBm Input Range
LT5537
Wide Dynamic Range Loq RF/IF Detector
Low Frequency to 800MHz, 83dB Dynamic Range, 2.7V to 5.25V Supply
LTC2220-1
12-Bit, 185Msps ADC
Single 3.3V Supply, 910mW Consumption, 67.5dB SNR, 80dB SFDR, 775MHz Full
Power BW
LTC2249
14-Bit, 80Msps ADC
Single 3V Supply, 222mW Consumption, 73dB SNR, 90dB SFDR
LTC2255
14-Bit, 125Msps ADC
Single 3V Supply, 395mW Consumption, 72.4dB SNR, 88dB SFDR, 640MHz Full
Power BW
300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply
High Speed ADCs
5568f
16 Linear Technology Corporation
LT/TP 1005 500 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
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www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2005