SPA06N80C3 CoolMOSTM Power Transistor Product Summary Features • New revolutionary high voltage technology • Extreme dv/dt rated V DS 800 V R DS(on)max @ Tj = 25°C 0.9 Ω Q g,typ 31 nC • High peak current capability • Qualified according to JEDEC1) for target applications • Pb-free lead plating; RoHS compliant • Ultra low gate charge • Ultra low effective capacitances • Fully isolated package (2500 VAC; 1 minute) CoolMOSTM 800V designed for: • Industrial application with high DC bulk voltage • Switching Application ( i.e. active clamp forward ) Type Package Marking SPA06N80C3 PG-TO220-3 06N80C3 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous drain current2) ID Value T C=25 °C 6 T C=100 °C 3.8 Pulsed drain current3) I D,pulse T C=25 °C 18 Avalanche energy, single pulse E AS I D=1.2 A, V DD=50 V 230 Avalanche energy, repetitive t AR3),4) E AR I D=6 A, V DD=50 V 0.2 Avalanche current, repetitive t AR3),4) I AR MOSFET dv /dt ruggedness dv /dt Gate source voltage V GS Power dissipation P tot Operating and storage temperature T j, T stg Mounting torque Rev. 2.9 Unit A mJ 6 A V DS=0…640 V 50 V/ns static ±20 V AC (f >1 Hz) ±30 T C=25 °C 39 W -55 ... 150 °C M2.5 screws page 1 50 Ncm 2008-10-15 SPA06N80C3 Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Symbol Conditions Continuous diode forward current IS Value Unit 6 A T C=25 °C Diode pulse current3) I S,pulse 18 Reverse diode dv /dt 5) dv /dt 4 V/ns Parameter Symbol Conditions Values Unit min. typ. max. - - 3.9 leaded - - 80 1.6 mm (0.063 in.) from case for 10s - - 260 °C 800 - - V - 870 - Thermal characteristics Thermal resistance, junction - case R thJC Thermal resistance, junction ambient R thJA Soldering temperature, T sold wave soldering only allowed at leads K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=250 µA Avalanche breakdown voltage V (BR)DS V GS=0 V, I D=6 A Gate threshold voltage V GS(th) V DS=V GS, I D=0.25 mA 2.1 3 3.9 Zero gate voltage drain current I DSS V DS=800 V, V GS=0 V, T j=25 °C - - 10 V DS=800 V, V GS=0 V, T j=150 °C - 50 - µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - - 100 nA Drain-source on-state resistance R DS(on) V GS=10 V, I D=3.8 A, T j=25 °C - 0.78 0.9 Ω V GS=10 V, I D=3.8 A, T j=150 °C - 2.1 - f =1 MHz, open drain - 1.2 - Gate resistance Rev. 2.9 RG page 2 Ω 2008-10-15 SPA06N80C3 Parameter Values Symbol Conditions Unit min. typ. max. - 785 - - 33 - - 26 - Dynamic characteristics Input capacitance C iss Output capacitance C oss Effective output capacitance, energy C o(er) related6) V GS=0 V, V DS=100 V, f =1 MHz pF V GS=0 V, V DS=0 V to 480 V Effective output capacitance, time related7) C o(tr) - 69 - Turn-on delay time t d(on) - 25 - Rise time tr - 15 - Turn-off delay time t d(off) - 72 - Fall time tf - 8 - Gate to source charge Q gs - 4 - Gate to drain charge Q gd - 15 - Gate charge total Qg - 31 41 Gate plateau voltage V plateau - 5.5 - V - 1 1.2 V - 520 - ns - 5 - µC - 18 - A V DD=400 V, V GS=0/10 V, I D=6 A, R G=15 ? , T j=25 °C ns Gate Charge Characteristics V DD=640 V, I D=6 A, V GS=0 to 10 V nC Reverse Diode Diode forward voltage V SD Reverse recovery time t rr Reverse recovery charge Q rr Peak reverse recovery current I rrm V GS=0 V, I F=I S=6 A, T j=25 °C V R=400 V, I F=I S=6 A, di F/dt =100 A/µs 1) J-STD20 and JESD22 2) Limited only by maximum temperature 3) Pulse width t p limited by T j,max 4) Repetitive avalanche causes additional power losses that can be calculated as P AV=E AR*f. 5) ISD=ID, di/dt=400A/µs, VDClink = 400V, Vpeak<V(BR)DSS, Tj<Tjmax , identical low side and high side switch 6) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS. 7) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS. Rev. 2.9 page 3 2008-10-15 SPA06N80C3 1 Power dissipation 2 Safe operating area P tot=f(T C) I D=f(V DS); T C=25 °C; D =0 parameter: t p 102 40 limited by on-state resistance 30 10 µs I D [A] P tot [W] 101 20 1 µs 100 µs 1 ms 100 10 ms DC 10 10-1 0 0 25 50 75 100 125 1 150 10 T C [°C] 100 1000 V DS [V] 3 Max. transient thermal impedance 4 Typ. output characteristics ZthJC=f(tP) I D=f(V DS); T j=25 °C; t p=10 µs parameter: D=t p/T parameter: V GS 101 20 20 V 0.5 Z thJC [K/W] 100 15 10 V 0.2 I D [A] 0.1 0.05 10 6.5 V 0.02 0.01 10-1 6V single pulse 5 5.5 V 5V 10-2 10-5 0 10-4 10-3 10-2 10-1 100 101 t p [s] Rev. 2.9 0 5 10 15 20 25 V DS [V] page 4 2008-10-15 SPA06N80C3 5 Typ. output characteristics 6 Typ. drain-source on-state resistance I D=f(V DS); T j=150 °C; t p=10 µs R DS(on)=f(I D); T j=150 °C parameter: V GS parameter: V GS 12 4.2 3.8 20 V 10 V 9 3.4 6 R DS(on) [Ω] I D [A] 6V 5.5 V 3 2.6 6V 5.5 V 10 V 5V 4.5 V 5V 20 V 2.2 3 4.5 V 1.8 0 1.4 0 5 10 15 20 25 0 3 6 V DS [V] 9 I D [A] 7 Drain-source on-state resistance 8 Typ. transfer characteristics R DS(on)=f(T j); I D=3.8 A; V GS=10 V I D=f(V GS); |V DS|>2|I D|R DS(on)max; t p=10 µs parameter: T j 2.4 20 25 °C 2 15 98% I D [A] R DS(on) [Ω] 1.6 1.2 10 150 °C typ 0.8 5 0.4 0 0 -60 -20 20 60 100 140 180 Rev. 2.9 0 2 4 6 8 10 V GS [V] T j [°C] page 5 2008-10-15 SPA06N80C3 9 Typ. gate charge 10 Forward characteristics of reverse diode V GS=f(Q gate); I D=6 A pulsed I F=f(V SD); t p=10 µs parameter: V DD parameter: T j 102 10 8 160 V 25°C (98°C) 101 640 V 25 °C 150 °C 150°C (98%) I F [A] V GS [V] 6 4 100 2 10-1 0 0 10 20 30 0 40 0.5 1 Q gate [nC] 1.5 2 V SD [V] 11 Avalanche energy 12 Drain-source breakdown voltage E AS=f(T j); I D=1.2 A; V DD=50 V V BR(DSS)=f(T j); I D=0.25 mA 960 250 920 200 V BR(DSS) [V] E AS [mJ] 880 150 840 800 100 760 50 720 0 680 25 50 75 100 125 150 T j [°C] Rev. 2.9 -60 -20 20 60 100 140 180 T j [°C] page 6 2008-10-15 SPA06N80C3 13 Typ. capacitances 14 Typ. Coss stored energy C =f(V DS); V GS=0 V; f =1 MHz E oss= f(V DS) 104 6 5 103 Ciss E oss [µJ] C [pF] 4 102 Coss 3 2 101 1 Crss 100 0 0 100 200 300 400 500 V DS [V] Rev. 2.9 0 100 200 300 400 500 600 700 800 V DS [V] page 7 2008-10-15 SPA06N80C3 Definition of diode switching characteristics Rev. 2.9 page 8 2008-10-15 SPA06N80C3 PG-TO220-3 (fully isolated): Outline Rev. 2.9 page 9 2008-10-15 SPA06N80C3 Published by Infineon Technologies AG 81726 Munich, Germany © 2008 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.9 page 10 2008-10-15