Supertex inc.
HV9150
High Voltage Output Hysteretic Mode
Step Up DC/DC Controller
Features
General Description
►► Wide output voltage range: 6V to 500V
►► Low input voltage: 2.7V
►► 5W maximum output power with external MOSFET
driver
►► Built-in charge pump converter for the gate driver
►► Programmable switching frequency from 40kHz to
400kHz
►► Four programmable duty cycles from 50% to 87.5%
►► FB return ground switch for power savings
applications
►► Built-in delay timer for internal protection
►► Non-isolated DC/DC converter
►► Processed with HVCMOS® technology
Applications
The HV9150 is a high output voltage hysteretic mode step up
DC/DC controller that has both a built-in charge pump converter
and a linear regulator for a wide range of input voltage. The
charge pump converter mode is ideal for battery powered
applications. The internal converter can provide a minimum of
5.0V gate driver output voltage (at VIN = 2.7V) to the external
N-channel MOSFET. The range of 2.7V to 4.5V input supply
voltage is ideal for battery powered applications such as portable
electronics equipment. The internal linear regulator is selected
when a higher supply voltage rail is available in the system.
A feedback return ground path switch is also integrated in the
device to minimize the quiescent current during the controller
shutdown. This feature provides power savings for energy
critical applications.
In addition, a built-in timer is available to protect the internal
circuit and to help dissipate the energy from the external high
voltage storage capacitor. This device is designed for systems
requiring high voltage and low current applications such as
MEMS devices.
►► Portable electronic equipment
►► MEMS
►► Printers
Block Diagram
VIN
2.7 - 4.5V
L
VDD
CCP1±
CCP2±
VLL
CP_EN
VCONTROL
VOUT
6.0 - 500V
GATE
FREQ_ADJ
HV9150
RFREQ
EXT_REF
0V/3.3V
FB
EN
CT
Doc.# DSFP-HV9150
NR031914
GND
FB_RTN
R2
R1
Supertex inc.
www.supertex.com
HV9150
Packing
HV9150K6-G
16-Lead (3x3) QFN
3000/Reel
16
-G denotes a lead (Pb)-free / RoHS compliant package
XNN
Absolute Maximum Ratings*
1
XFF
IPF
Parameter
Value
ICVG
GP
HDaTVP
-0.5V to 5.0V
ERaGP
Continuous power dissipation
(Note: on a 3” by 4” FR4 PCB @Ta = 25°C)
3000mW
Junction temperature range
-25°C to +125°C
Storage temperature range
-65°C to +125°C
* All voltages referenced to device GND.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in
the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
16-Lead QFN
(top view)
Note: Pads are at the bottom of the package. Center heat slug is at ground potential.
Product Marking
H150
YWLL
Typical Thermal Resistance
Package
θja
16-Lead QFN
33°C/W
EV
-0.5V to VLL +0.5V
HD
XEQPVTQN"
Logic input levels
-0.5V to 13.6V
GZVaTGH
VDD, Charge pump output voltage
HTGSaCFL
VLL, Input voltage supply
EER4-
Package Option
EER4/
EER3/
Part Number
EER3-
Pin Configuration
Ordering Information
Y = Last Digit of Year Sealed
W = Code for Week Sealed
L = Lot Number
= “Green” Packaging
Package may or may not include the following marks: Si or
16-Lead QFN
Recommended Operating Conditions
Symbol
Parameter
Min
Typ
Max
Units
Conditions
VLL
Input voltage (CP mode)
2.7
-
4.5
V
---
VIH
High-level input voltage
0.8VLL
-
VLL
V
---
VIL
Low-level input voltage
0
-
0.2VLL
V
---
Power-Up and Power-Down Sequence
Power-up sequence should be the following:
1. Connect ground.
2. Apply VIN.
3. Set all inputs to a known state.
Power-down sequence should be the reverse of the above.
Doc.# DSFP-HV9150
NR031914
2
Supertex inc.
www.supertex.com
HV9150
DC Electrical Characteristics
(Over recommended operating supply voltages and temperatures unless otherwise noted, TJ = 25oC)
Sym
Description
Min
Typ
Max
Unit
Conditions
-
-
2.0
μA
---
mA
fOSC = 100kHz, VLL = 4.5V
mA
fOSC = 100kHz, VDD = 12.6V
Power Supply
ILLQ(off)
Quiescent VLL supply current (EN = ”0”)
VLL supply current
GATE = NC
-
-
1.5
(EN = ”1”)
GATE = 300pF
-
-
4.0
VDD supply current
GATE = NC
-
-
1.0
(EN = ”1”)
GATE = 300pF
-
-
2.5
Quiescent VDD supply current (EN = ”0”)
-
-
2.0
μA
---
IIH
High-level logic input current
-
-
1.0
μA
VIH = VLL
IIL
Low-level logic input current
-
-
-1.0
μA
VIL = 0V
10.2
-
12.3
V
---
5.0
-
6.9
3.0
-
3.6
V
---
ILL(on)
IDD(on)
IDDQ(off)
GATE
VLL(LDO)
GATE driver output
voltage
VLL = 4.5V
GATE = NC
VLL = 2.7V
GATE = NC
Linear regulator output voltage
AC Electrical Characteristics
(Over recommended operating supply voltages and temperatures unless otherwise noted, TJ = 25oC)
Sym
Description
Min
Typ
Max
Unit
Conditions
Accuracy
1.22
1.25
1.28
Range
1.20
1.25
1.30
-
-
1.0
μA
EXT_REF is selected
0
-
VLL-1.4
V
---
0
-
0.12
V
0.5
-
VLL-1.4
V
ON-resistance, RDS
-
-
500
Ω
IO = 2.0mA
Breakdown voltage, BV
-
-
13.5
V
---
Feedback (FB)
VREF
Internal feedback
reference voltage
IBIAS
Input bias current
Range
EXT_REF
FB_RTN
External
reference voltage
Trigger INT
reference
Trigger EXT
reference
V
--Tj = -25 to 85°C
During EN positive
triggering
GATE Driver Output (GATE)
tR
Rise time
-
-
36
ns
tF
Fall time
-
-
12
ns
VDD = 5.0V
-
-
45
VDD = 12V
-
-
30
VDD = 5.0V
-
-
15
VDD = 12V
-
-
12
RUP
RDOWN
Doc.# DSFP-HV9150
NR031914
Pull up resistance
Pull down resistance
3
Ω
Ω
CL = 300pF, VDD = 12V
IO = 20mA
IO = 50mA
IO = 20mA
IO = 50mA
Supertex inc.
www.supertex.com
HV9150
AC Electrical Characteristics
(Over recommended operating supply voltages and temperatures unless otherwise noted, TJ = 25oC)
Sym
Description
fGATE
Oscillator frequency
Min
Typ
Max
Unit
Conditions
-
½ fOSC
-
kHz
---
Charge Pump Converter
VDD
Charge pump output voltage
fOSC
Oscillator frequency
Δf
5.0
3VLL-1.8
12.6
Accuracy
170
195
220
Range
40
-
400
-
15
-
%
50kHz ≤ fOSC ≤ 250kHz
86
87.5
89
%
RFREQ = 270kΩ
-
0
-
%
0< VCNTL ≤ 0.18VLL
-
50
-
%
0.22VLL < VCNTL ≤ 0.38VLL
-
62.5
-
%
0.42VLL < VCNTL ≤ 0.58VLL
-
75
-
%
0.62VLL < VCNTL ≤ 0.78VLL
-
87.5
-
%
0.82VLL < VCNTL ≤ VLL
0
-
VLL
V
See table
120k
-
1.2M
Ω
---
Pull up
-
-
20
Pull down
-
-
20
Ω
VLL = 2.7V, IO = 10mA
Oscillator frequency tolerance
Accuracy
DC
VCONTROL
RFREQ
RCP
VRIPPLE
Duty cycle
Range
Duty cycle adjustment
Frequency adjustment resistor
Maximum charge
pump output resistance
Output ripple at VDD
V
2.7V ≤ VLL ≤ 4.5V
CCP1 = 220nF
CCP2 = 220nF
CCP3 = 220nF
kHz
RFREQ = 270kΩ, VLL = 3.3V
Over RFREQ range
-
-
100
mV
2.7V ≤ VLL ≤ 4.5V
fOSC = 200kHz
CCP1 = 220nF
CCP2 = 220nF
CCP3 = 220nF
CGATE = 300pF
BW = 20MHz
-
240
-
ms
CT = 1.0μF
Delay Timer
TDELAY
Doc.# DSFP-HV9150
NR031914
Shutdown delay timer
4
Supertex inc.
www.supertex.com
HV9150
Functional Block Diagram
VDD
CCP1+/-
CCP2+/-
VLL
CP
Mode
3x Charge Pump
Converter
LDO
Mode
VLL
VDD
LDO
VLL
CP_EN
VDD
VCONTROL
(Duty Cycle Adj)
GATE
OSC
FREQ_ADJ
VLL
VLL
VREF
-
+
Hysteretic Mode
Controller
EXT_REF
FB
FP_RTN
Delay
EN
CT
GND
Functional Description
Hysteretic Mode Controller
XKP
A hysteretic mode controller consists of an oscillator, a
voltage reference, a comparator and a driver. Both the
internal oscillator and the duty cycle of the gate driver are
running at a fixed rate.
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As this device is designed for a step up conversion, a pulse
train is used to control the switch of a classical switching
boost converter. The pulse train is gated by the output of
the comparator, which compares the feedback of the output
voltage with the voltage reference.
Hysteretic Mode Controller
and a Classical Boost Converter
Internal Oscillator
If the output voltage reaches the target voltage, the
comparator will turn off the pulse train. When the output
voltage drops below the target voltage, the comparator
will pass the pulse train to the switch and start the inductor
charging cycle. The advantage of this hysteretic mode
controller is its stability and simple operation.
Doc.# DSFP-HV9150
NR031914
XQWV
This device has an internal oscillator which generates the
reference clock for the hysteretic mode controller. The
controller is running at half of the frequency of the internal
oscillator. This oscillator is powered by the VLL power supply
pin.
5
Supertex inc.
www.supertex.com
HV9150
Charge Pump Converter (CP mode)
The frequency of the oscillator is set by the external resistor
RFREQ, and this frequency is inversely proportional to the
value of RFREQ. Its characteristic is shown in the fOSC vs
RFREQ diagram.
1
fOSC =
4 • RFREQ • C
A 3x charge pump converter is integrated into this device
to provide a 5V to 12V rail for the gate driver. It can be
activated by setting CP_EN to ground. A 3.3V supply is
more common and easily available for digital logic systems;
however, this voltage level is less desirable for driving a high
voltage MOSFET to obtain a lower ON-resistance for better
efficiency.
where C = 4.75pF
In order to reduce the number of supply rails used in the
system, an internal two stage charge pump converter is
added, which can boost the 3.3V supply voltage to 8.0V. A
8.0V gate driver output will outperform a 3.3V gate driver
by far and substantially improves the ON-resistance of the
external MOSFET.
Voltage Reference (VREF)
The voltage reference is used by the comparator to compare
with the feedback voltage and the boost converter output.
This device provides the options of using either its internal
voltage reference or an external voltage reference.
The charge pump input can operate with an input voltage
from 2.7V to 4.5V. Its input and output are connected to the
VLL and VDD pins, respectively.
The internal voltage reference provides a stable 1.25V with a
tolerance of ±2.5%. With the use of ±1% tolerance feedback
resistors, the output can be achieved with a tolerance of
±4.5%. In order to use the internal voltage reference, the
EXT_REF pin must be connected to ground.
XNN
If the output voltage of the boost converter is required to
have high precision and tight tolerance, the external voltage
reference can be used to achieve that purpose. The external
reference voltage must be between 0.5V and VLL -1.4V, and
connect to the EXT_REF pin. A single low to high transition
must be presented at the EN pin to trigger the device to
select an external voltage reference. If no enable control
signal is available in the application, this signal can be easily
mimicked by a simple RC circuit.
QUE
Three Times (3X) Charge Pump Converter
Linear Regulator (LDO mode)
In some applications, efficiency may be a key factor, and
higher voltage rails such as 5V, 6V, 9V or 12V may be
available in the system. The internal charge pump converter
cannot operate with these voltage levels because of the
maximum output voltage limit of the charge pump converter.
At the same time, these voltage levels are high enough to
provide an adequate supply for the gate driver.
VIN
EXT_REF
GND
Internal
EXT_REF
Under this circumstance, an internal linear regulator is used
to replace the charge pump converter. This linear regulator
input can accept voltage from 5.0V to 12.0V, and generates
a 3.3V output to supply to the internal circuit. This linear
regulator can be activated by setting CP_EN to VLL.
Voltage
Reference
GND
External
Voltage Connection Reference
In a scenario when the device is operating in LDO mode and
in shutdown state (EN = ”0”), the voltage at VLL is undefined.
In order to wake up the controller device, a voltage above
2.7V has to be presented at the enable pin (EN).
Gate Driver (GATE)
The MOSFET gate driver of this controller is specially
designed to be able to drive the gate of the external MOSFET
up to 12V. A high pulse voltage will help to minimize the
ON-resistance of the external MOSFET transistor. A lower
ON-resistance improves the overall efficiency and heat
dissipation.
FB Ground Return Switch (FB_RTN)
Any DC/DC controller requires a feedback from the output
to monitor its operation so that it can regulate its output
accordingly. A simple resistor network is used in conjunction
with a feedback ground switch as a feedback path. The
purpose of this feedback ground switch is to save power
consumed by the feedback resistor network when the
controller is disabled. This function is quite useful for power
saving especially for battery operated applications.
This gate driver is powered by the supply voltage VDD
which can be generated by either the internal charge pump
converter (CP mode) or the external power supply (LDO
mode), depending on the available voltage supply rail of the
application.
Doc.# DSFP-HV9150
NR031914
XFF
6
Supertex inc.
www.supertex.com
HV9150
Shutdown Timer and Timing Capacitor (CT)
Duty Cycle Control (VCONTROL)
A shutdown timer is also integrated into the controller for
safety purposes. When the controller shuts down from its
normal operation, the converter initial output is still at its high
level. If the feedback ground return switch is disabled at the
same time, a current path is created from the output via the
feedback resistor, and the internal protection clamping diode
at the FB pin. Depending upon the value of the FB resistor,
this momentarily conducting current can be high enough to
damage this clamping diode. In order to avoid this potential
problem, a timer is added to the disable function to keep the
feedback ground switch to the on position for a short period
of time. This on time duration is controlled by an external
capacitor CT. The larger the capacitor value is, the longer
this on time is. Its characteristic is shown in the performance
section.
The input voltage at the VCONTROL pin controls the duty
cycle of the internal oscillator output to the GATE driver. The
internal comparators are all powered by the VLL supply and
their input threshold voltages are all referenced to VLL voltage. A voltage divider formed by the two resistors can be
adjusted accordingly to select the desired duty cycle of the
pulse signal to the gate driver. Please see the table below.
VOUT
R2
FB
Internal
Protection
Diode
CT
0 to 0.18VLL
0%
0.22 to 0.38VLL
50%
0.42 to 0.58VLL
62.5%
0.62 to 0.78VLL
75%
0.82 to 1.0VLL
87.5%
VLL
R1
VCONTROL
Delay
EN
Duty Cycle
VLL
FB_RTN
0V/3.3V
VCONTROL
GND
Internal Protection Diode at FB Pin
Hysteretic Controller Enable (EN)
The controller enable pin (EN), serves two main purposes.
The most obvious function is to turn the controller on and off,
and the other function is to act as a trigger to activate the
device to accept external voltage reference.
For any applications required a highly precise voltage
reference, an external voltage reference should be used. To
activate the device to accept the external voltage reference,
a low to high transition has to appear at the EN pin while the
voltage at the EXT_REF pin is above 0.5V.
+
-
Duty Cycle 87.5%
+
-
Duty Cycle 75.0%
+
-
Duty Cycle 62.5%
+
-
Duty Cycle 50.0%
If the system lacks enable function control, a RC circuit can
be used to mimic this function to allow the external voltage
reference.
3.3V (min)
R
EN
C
GND
Simple RC Circuit for EN Pin
Doc.# DSFP-HV9150
NR031914
7
Supertex inc.
www.supertex.com
HV9150
Design Procedure
There are several parameters that a user will decide for
the DC/DC converter design. The input voltage, output
voltage and output power requirement are usually defined
at the beginning. The few parameters that the user needs
to decide on include: operating frequency, inductor value,
duty cycle and the ON-resistance of the MOSFET. There
is some degree of flexibility in deciding the values of these
parameters. The following provides the user a general
approach to this subject.
switching frequency can be computed. The required RFREQ
resistance can be found in the fGATE vs RFREQ table. Next,
the peak current of the inductor is checked by the following
equation. The saturation current of the inductor must be
larger than IPEAK.
Vi • D
IPEAK =
L • fGATE
Step 1
The most important factors to determine the MOSFET are
the breakdown voltage, the current capability, the ONresistance, the minimum VGS threshold voltage and the input
capacitance.
Step 3
Since this DC/DC controller device is operating in a
discontinuous conduction mode, the following equations
are used to determine the inductance and the switching
frequency.
The HV9150 gate driver is designed to drive a maximum of
300pF capacitive load. So, the maximum input capacitance
of the external MOSFET should be less than 300pF. The
minimum breakdown voltage must be larger than the
required DC/DC converter output voltage. If the breakdown
voltage is too low, the output will never reach the required
voltage output. A MOSFET with high ON-resistance will limit
the peak current charging the inductor. The user can use
a simple RL charging circuit equation to determine its final
charging current.
= duty cycle
= load resistance of the high voltage output
= minimum input voltage
= output voltage
Unknown:
L
= inductance
fGATE = driver switching frequency
where:
K =
Vi
2
(
• 1+ 1+
4D2
K
(
VO =
IL =
2 • L • fGATE
(
RON
Vi
D
1 - exp •
RON
fGATE
L
(
Given:
D
R
Vi
VO
It is recommended that the calculated value of IL is within
95% of the IPEAK calculated in step 2. An ON-resistance of
less than 1Ω is usually a good starting point.
R
The maximum duty cycle can be determined by the following
equation:
Vi
DMAX = 1 Vo
If the final circuit is short on the output current capability,
there are a few ways to boost the output. The user can do
any or all of the following to improve the output:
(1) increase the duty cycle
(2) decrease the fGATE
(3) use a MOSFET with lower ON-resistance.
Then, the user can choose any duty cycle less than DMAX. It
is recommended that the largest possible setting be chosen.
To compensate for the limited efficiency, the user can add
the efficiency factor into the load resistance R. With the
above equation, the product of L and fGATE is determined.
The design will be limited by the product of L and fGATE.
Step 2
The standard inductor is usually sold in an incremental
inductance value, for example, 10, 22, 33 or 47µH. The user
can choose the inductance based on the size of the inductor,
the peak current, the maximum operating frequency and the
DC resistance. After the value of L is decided, the gate driver
Doc.# DSFP-HV9150
NR031914
8
Supertex inc.
www.supertex.com
HV9150
Typical Application Circuits
Charge Pump (CP) Mode
VDD
0.22µF
CCP1± CCP2±
0.22µF 0.22µF
VIN
2.7 - 4.5V
1.0µF
VLL
3x Charge Pump
Converter
CP
Mode
LDO
Mode
L
VDD
LDO
CP_EN
VLL
VOUT
6.0 - 500V
VDD
VCONTROL
OSC
FREQ_ADJ
VREF
- +
RFREQ
GATE
VLL
VLL
EXT_REF
FB
R2
FB_RTN
0V/3.3V
EN
R1
Delay
CT
GND
Linear Regulator (LDO) Mode
VDD
CCP1± CCP2±
CP
Mode
3x Charge Pump
Converter
L
LDO
Mode
VDD
LDO
CP_EN
VLL
GATE
OSC
VLL
VLL
- +
RFREQ
VOUT
15 - 500V
VDD
VCONTROL
FREQ_ADJ
VIN
5.0 - 12V
1.0µF
VLL
VREF
EXT_REF
FB
R2
FB_RTN
0V/3.3V
EN
CT
Doc.# DSFP-HV9150
NR031914
R1
Delay
GND
9
Supertex inc.
www.supertex.com
HV9150
Typical Performance Characteristics
Gate Driver Rise Time (tr) and Fall Time (tf) vs Load Capacitance at 25OC
35
30
Rise time tr, VDD = 5V
(LDO mode)
25
Rise time tr, VDD = 11V
(CP mode)
Time (ns)
20
15
Fall time tf, VDD = 5V
(LDO mode)
10
Fall time tf, VDD = 11V
(CP mode)
5
0
0
50
100
150
200
250
300
350
Load Capacitance (pF)
Gate Driver Switching Frequency vs RFREQ
(VIN = 3.3V at 25OC)
Frequency (kHz)
1000
100
10
10
100
1000
RFREQ (kΩ)
Doc.# DSFP-HV9150
NR031914
10
Supertex inc.
www.supertex.com
HV9150
Typical Performance Characteristics (cont.)
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7.0
6.0
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Doc.# DSFP-HV9150
NR031914
11
Supertex inc.
www.supertex.com
HV9150
Typical Performance Characteristics (cont.)
Charge Pump Output Voltage vs Load Capacitance at 25OC
(fGATE = 100kHz, CCP1 = CCP2 = 0.22µF, CVDD = 1.0µF)
12
VLL = 4.5V
11
Output Voltage VDD (V)
10
9.0
VLL = 3.6V
8.0
VLL = 3.3V
7.0
6.0
5.0
VLL = 2.7V
0
50
100
150
200
250
300
350
Load Capacitance (pF)
Gate Driver Switching Frequency vs VLL Input Voltage
(Gate output load capacitance = 330pF, RFREQ = 255kΩ @ 25OC)
101
100
Frequency (kHz)
CP mode
99
LDO mode
98
97
96
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
11
12
13
14
VLL Input Voltage (V)
Doc.# DSFP-HV9150
NR031914
12
Supertex inc.
www.supertex.com
HV9150
Typical Performance Characteristics (cont.)
Duty Cycle Selection Hysteresis at VCONTROL Pin at 25OC
100
87.5% Duty Cycle
90
80
82%
78%
75% Duty Cycle
Percentage of VLL
70
60
62%
62.5% Duty Cycle
10
0
62.5% Duty Cycle
42%
38%
50% Duty Cycle
30
20
75% Duty Cycle
58%
50
40
87.5% Duty Cycle
50% Duty Cycle
22%
18%
0% Duty Cycle
0% Duty Cycle
VCONTROL from Max to Min
VCONTROL from Min to Max
VIN = 4.5V
VIN = 2.7V
VCP Noise
Doc.# DSFP-HV9150
NR031914
13
Supertex inc.
www.supertex.com
HV9150
Switching Waveforms
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XKJ
GP
XKN
Initial power up
Enabling to use the External Voltage Reference
XQWV
2X
tDELAY
HDaTVP
2X
XKJ
GP
XKN
Delay Time at FB_RTN
Pin Description
Pin #
Function
1
VLL
Input supply voltage
2
GND
Ground connection
3
EN
4
CP_EN
5
VCONTROL
Duty cycle adjustment voltage control input
6
FREQ_ADJ
Frequency adjustment
7
EXT_REF
8
CT
Timing capacitor
9
FB
Feedback input voltage
10
FB_RTN
11
GATE
Gate control output
12
VDD
Charge pump output voltage
13
CCP2+
Charge pump storage capacitor #2 plus terminal
14
CCP2-
Charge pump storage capacitor #2 minus terminal
15
CCP1+
Charge pump storage capacitor #1 plus terminal
16
CCP1-
Charge pump storage capacitor #1 minus terminal
Center Pad
Doc.# DSFP-HV9150
NR031914
Description
Enable
Charge pump/LDO enable input
External reference voltage input
Feedback return
Substrate connection (at ground potential)
14
Supertex inc.
www.supertex.com
HV9150
16-Lead QFN Package Outline (K6)
3.00x3.00mm body, 1.00mm height (max), 0.50mm pitch
D
16
D2
16
Note 1
(Index Area
D/2 x E/2)
1
Note 1
(Index Area
D/2 x E/2)
1
e
E2
E
b
Top View
Bottom View
View B
Note 3
θ
L
A A3
Seating
Plane
A1
L1
Note 2
View B
Side View
Notes:
1. A Pin 1 identifier must be located in the index area indicated. The Pin 1 identifier can be: a molded mark/identifier; an embedded metal marker; or
a printed indicator.
2. Depending on the method of manufacturing, a maximum of 0.15mm pullback (L1) may be present.
3. The inner tip of the lead may be either rounded or square.
Symbol
Dimension
(mm)
A
A1
MIN
0.80
0.00
NOM
0.90
0.02
MAX
1.00
0.05
A3
0.20
REF
b
D
D2
E
E2
e
0.18
2.85*
1.50
2.85*
1.50
0.25
3.00
1.65
3.00
1.65
0.30
3.15*
1.80
3.15*
1.80
0.50
BSC
L
L1
θ
0.20†
0.00
0O
0.30†
-
-
0.45
0.15
14O
JEDEC Registration MO-220, Variation VEED-4, Issue K, June 2006.
* This dimension is not specified in the JEDEC drawing.
† This dimension differs from the JEDEC drawing.
Drawings not to scale.
Supertex Doc.#: DSPD-16QFNK63X3P050, Version A092909.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
information go to http://www.supertex.com/packaging.html.)
Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives
an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability
to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and
specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com)
Supertex inc.
©2014 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited.
Doc.# DSFP-HV9150
NR031914
15
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com