DEMO CIRCUIT 1 0 6 3 Q UICK S TA RT LT6559 G UIDE L T6 5 5 9 Trip le 3 0 0 MH z V id e o Op e ra tio n a l A m p lifie r DESCRIPTION Demonstration circuit 1063 features the LT6559 Triple 300M Hz Video Operational Amplifier. The LT6559 is designed for RGB video cable-driver applications operating from a single 5V supply. As show n in Figure 1, the form-factor of this demo circuit allow s a PC video port to serve as a high-speed signalsource. Rapid video evaluation can be performed by simply inserting the board in-line w ith the RGB monitor cable and connecting a 5V pow er source to it. Device characteristics that are demonstrated in the DC1063 are show n in the Performance Summary below . Figure 1. LT6559 on D C1063, Show n ActualSize Design files for this circuit board are available. Call the LTC factory. ,LT,are registered trademarks ofLinear Technology Corporation. Other product names may be trademarks ofthe companies that manufacture the products. PERF ORM A NCE SU M M A RY Specifications are atTA = 25°C SYM BOL V+ ZIN ZOUT A BW SR VIN IS PARAM ETER Input Supply Range Input Impedance Output Impedance Gain Bandw idth Slew Rate Input signalsw ing Pow er Supply Current CONDITIONS 1.4VP-P amplifier output sw ing ac-coupled ac-coupled Output terminated into 75Ω Output terminated into hi-Z -3dB,small-signal V+= 5V V+= 5V,no output clipping V+= 5V,no signal M IN 4.75 TYP 5 75 75 0 +6 300 600 M AX 12 1.3 15 UNITS V Ω Ω dB dB M Hz V/µs VP-P mA OPERA TING PRINCIPL ES DC1063 simply inserts LT6559 amplifier stages in series w ith the Red,Green,and Blue video signals ofa standard High-Density 15-contact D-subminature PC monitor connection (“VGA” port). Allother standard connections are passed-through to allow normal monitor operation, as show n in the schematic diagram in Figure 5. The amplifier sections terminate the incoming signalinto 75Ω, then ac-couple to the non-inverting input of each amplifier w ith a 22µF capacitor. DC biasing of the ac-coupled signals is provided by resistor dividers that nominally divide the supply voltage in half. Gain of each section is set to tw o by equal-value feedback resistors (ac-coupled so that dc gain is unity for biasing 1 LT6559 purposes). The selection of feedback resistor value is important to optimize the frequency response, since the LT6559 is a current-feedback topology op-amp. The amplifier outputs are then back-terminated in 75Ω and ac-coupled via 220µF capacitors to the video cable connection. The back-terminations inherently form a 2:1 voltage division at the destination loads, therefore the overall video insertion gain of the DC1063 is unity. This means that placing the DC1063 in-line w ith the normal monitor connection w ill result in only introducing artifacts associated w ith frequency response and linearity of the LT6559. For display formats w ith about 7ns or longer pixel times (“SXGA” resolutions, 1280x1024@ 75Hz for instance), no visual differentiation is normally discernable, verifying the suitability of the LT6559 for use in the actual application (note: a “phasing” tw eak may be required w ith LCD displays to account for about 2ns delay through the video amplifiers vs. no delay for the syncs). Figure 2 show s the w ellbehaved time response of the LT6559 on DC1063 passing a nominal 7.5ns/700mVP-P video pulse (the display amplitude is scaled 42.3% due to a 75Ω/50Ω min-loss conversion adapter, thus nominally 296mVP-P at the instrument; note the actual voltage sw ing at the op-amp output is 1.4VP-P). In PC applications, like the DC1063 is designed to highlight, the RGB video sw ings are 700mVP-P. For accoupling as used on the DC1063, varying picture conditions can expand the dynamic operational range to approximately 1.2VP-P at the input. Even this expanded range is readily handled by the LT6559 on a single 5V pow er supply. An ENable jumper is provided, that w hen removed (or relocated to the alternate pin-pair) disables the LT6559 w hile pow er remains applied. The jumper does not disconnect the input biasing resistors how ever,so at 5V, about 2.3mA of residual resistor current w ill flow in the shutdow n condition that is not attributable to the LT6559 itself. Figure 2. LT6559 Large-SignalPulse R esponse in D C1063 Q U ICK STA RT PROCEDU RE Demonstration circuit 1063 is easy to set up to evaluate the performance of the LT6559. Refer to Figure 3 for proper measurement equipment setup and follow the procedure below : NOTE. Due to the Ultra High Frequencies (UHF) involved,RF measurement practices are required to accurately instrument the performance ofthe LT6559. 1. Place/verify jumper in the follow ing position: JP1 ENable position 2 2. W hile disconnected from the DC1063, set a pow er supply to 5V (or other voltage up to 12V, if desired), then de-energize. 3. Install DC1063 into PC monitor port. J1, the left-side connector (w ith pins) is the side to connect to the PC. A “VGA” extender cable may be used if circumstances don’t permit convenient installation ofDC1063 directly to the PC (note that such a cable may induce subtle settling anomalies in an oscilloscope presentation that are unrelated to the performance ofthe LT6559). LT6559 4. Attach the pow er clip-leads according to the silkscreened legends. Supply ground is tied to the turret closest to J1. Supply pow er (+5V normally) is tied to the turret nearest the ENable jumper. Use caution to avoid shorting clips together or to other points of the circuitry. 5. Connect the video monitor cable to J2. J2 is the rightside connector (w ith receptacles). The video cable may drive a video display or other instrumentation as desired in the evaluation. PC (Rear Panel) 6. Pow er up the DC1063 pow er source. A normal video presentation should be seen on a video monitor, or a specific signalat the test equipment being used. If an LCD video display is being used,re-tuning of the sync “phasing” may be required to optimize the internal w aveform sampling times due to about 2ns sync shift through DC1063 (refer to the LCD display Operators’ M anualfor details). For instrumentation hookup, keep cable lengths as short as practicable. W hen 75Ω test equipment is not available, use quality 75Ω to 50Ω adapters (w ideband “min-loss pads”) and 50Ω instrument settings for best results. Power Supply Computer Monitor COM + Figure 3. Proper M easurem entEquipm entSetup ITEM 1 2 3 4 5 6 7 8 9 10 11 12 13 14 QTY 6 3 1 1 2 1 1 1 1 3 6 6 3 1 REFERENCE C1-C6 C7-C9 C10 C11 E1,E2 J1 J2 JP1 SH1 R1-R3 R4-R9 R10-R15 R16-R18 U1 PART DESCRIPTION CAP.,X5R,22uF,6.3V,20% ,1206 CAP.,POSCAP,220uF,6.3V,2816 CAP.,X7R,0.1uF,16V,5% ,0603 CAP.,X5R,4.7uF,16V,20% ,1206 TESTPOINT,TURRET,0.064 CONN,HD-15,M ALE,HORZ-PCB CONN,HD-15,FEM ALE,HORZ-PCB 0.079 SINGLE ROW HEADER,3 PIN SHUNT, RES.,CHIP,78.7,1% ,0402 RES.,CHIP,3.32K, 1% ,0402 RES.,CHIP,301,1% ,0402 RES.,CHIP,75,1% ,0402 IC.,LT6559CUD,QFN16 M ANUFACTURER /PART # AVX,12066D226M AT SANYO,6TPE220M I AVX,0603YC104JAT Taiyo Yuden EM K316BJ475M L-T M ILL-M AX 2308-2 AM P 5749767-1 AM P 1-1470250-3 SAM TEC,TM M 103-02-L-S SAM TEC,2SN-BK-G VISHAY,CRCW 040278R7FKED VISHAY,CRCW 04023K32FKED VISHAY,CRCW 0402301RFKED VISHAY,CRCW 040275R0FKED LINEAR TECH.,LT6559CUD Figure 4. BillofM aterial(BO M ) for D C1063 3 LT6559 Figure 5. D C1063 ElectricalSchem atic Diagram 4