2N6661 N-Channel, Enhancement-Mode, Vertical DMOS FET Features Description • • • • • • • 2N6661 is an enhancement-mode (normally-off) transistor that utilizes a vertical DMOS structure and a wellproven silicon-gate manufacturing process. This combination produces a device with the power-handling capabilities of bipolar transistors, and the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Free from secondary breakdown Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode High input impedance and high gain Applications • • • • • • Motor controls Converters Amplifiers Switches Power supply circuits Drivers: relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc. Vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where verylow threshold voltage, high breakdown voltage, highinput impedance, low-input capacitance, and fast switching speeds are desired. Package Types GATE SOURCE DRAIN TO-39 Case: Drain See Table 2-1 for pin information 2016 Microchip Technology Inc. DS20005516A-page 1 2N6661 1.0 ELECTRICAL CHARACTERISTICS ABSOLUTE MAXIMUM RATINGS† Drain-to-source voltage ......................................................................................................................................... BVDSS Drain-to-gate voltage.............................................................................................................................................BVDGS Gate-to-source voltage............................................................................................................................................ ±20V Operating and Storage Temperature .......................................................................................................... -55 to 150 °C † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, for all specifications TA = +25°C Parameter Symbol Min Typ Max Units Conditions DC Parameters (Note 1, unless otherwise stated) Drain-to-source breakdown voltage BVDSS 90 - - V VGS= 0V, ID= 10µA Gate threshold voltage VGS(th) 0.8 - 2.0 V VGS= VDS, ID= 1.0mA ∆VGS(th) - -3.8 -5.5 Gate body leakage current IGSS - - 100 nA VGS= ±20V, VDS= 0V Zero gate voltage drain current IDSS - - 10 µA VGS= 0V, VDS= Max rating - - 500 ID(ON) 1.5 - - A RDS(ON) - - 5.0 Ω - - 4.0 GFS 170 - - VGS(th) change with temperature On-state drain current Static drain-to-source on-state resistance mV/°C VGS= VDS, ID= 1.0mA (Note 2) VDS= 0.8 Max Rating, VGS= 0V, TA= 125°C (Note 2) VGS= 10V, VDS= 10V VGS= 5.0V, ID= 0.3A VGS= 10V, ID= 1.0A AC Parameters (Note 2) Forward transconductance Input capacitance CISS - - 50 Common source output capacitance COSS - - 40 Reverse transfer capacitance CRSS - - 10 Turn-on time t(ON) - - 10 Turn-off time t(OFF) - - 10 VSD - 1.2 trr - 350 mmho VDS= 25V, ID= 0.5A pF VGS= 0V, VDS= 24V, f = 1.0MHz ns VDD= 25V, ID= 1.0A, RGEN= 25Ω - V VGS= 0V, ISD= 1.0A (Note 1) - ns VGS= 0V, ISD= 1.0A (Note 2) Diode Parameters Diode forward voltage drop Reverse recovery time Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle. 2: Specification is obtained by characterization and is not 100% tested. TEMPERATURE SPECIFICATIONS Parameter Symbol Min Typ Max TA -55 – 150 Units Conditions Temperature Ranges Operating and Storage Temperature DS20005516A-page 2 °C 2016 Microchip Technology Inc. 2N6661 THERMAL CHARACTERISTICS Package ID(1) continuous (mA) ID pulsed (A) Power Dissipation @TA = 25°C (W) IDR(1) (mA) IDRM (A) TO-39 350 3.0 6.25 350 3.0 Note 1: ID (continuous) is limited by max rated TJ. Product Summary 2.0 BVDSX/BVDGS (V) RDS(ON) (max) (Ω) IDSS (min) (A) 90 4.0 1.5 PIN DESCRIPTION The locations of the pins are listed in Package Types and Packaging Information. TABLE 2-1: PIN DESCRIPTION Pin # TO-39 Function 1 SOURCE 2 GATE 3 DRAIN 2016 Microchip Technology Inc. DS20005516A-page 3 2N6661 3.0 FUNCTIONAL DESCRIPTION Figure 3-1 shows the switching waveform and test circuit for 2N6661. 10V VDD 90% INPUT 0V Pulse Generator 10% t(ON) td(ON) VDD OUTPUT 0V FIGURE 3-1: DS20005516A-page 4 t(OFF) tr td(OFF) OUTPUT RGEN tf 10% 10% 90% RL INPUT D.U.T. 90% Switching Waveforms and Test Circuit 2016 Microchip Technology Inc. 2N6661 4.0 PACKAGING INFORMATION 4.1 Package Marking Information 3-Lead TO-39 Example XX XXXXXXXXXX YYWW NNN e4 2N6661 1605 343 e4 Legend: XX...X Y YY WW NNN e3 * Note: Product Code or Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for product code or customer-specific information. Package may or not include the corporate logo. 2016 Microchip Technology Inc. DS20005516A-page 5 2N6661 Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging. DS20005516A-page 6 2016 Microchip Technology Inc. 2N6661 APPENDIX A: REVISION HISTORY Revision A (March 2016) • Converted Supertex Doc #DSFP-2N6661 to Microchip DS20005516A. • Minor text changes throughout. • Update to Features. 2016 Microchip Technology Inc. DS20005516A-page 7 2N6661 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device XX - X - Package Environmental Options X Media Type Device: 2N6661 = N-Channel, Enhancement-Mode, Vertical DMOS FET Package: (blank) = TO-39, 3-lead Environmental (blank) = Lead (Pb)-free/ROHS-compliant package Media Type: (blank) = 500/Bag for TO-39 packages DS20005516A-page 8 Examples: a) 2N6661 TO-39 package, 500/bag 2016 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights unless otherwise stated. Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. QUALITYMANAGEMENTSYSTEM CERTIFIEDBYDNV == ISO/TS16949== 2016 Microchip Technology Inc. Trademarks The Microchip name and logo, the Microchip logo, AnyRate, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo, Kleer, LANCheck, LINK MD, MediaLB, MOST, MOST logo, MPLAB, OptoLyzer, PIC, PICSTART, PIC32 logo, RightTouch, SpyNIC, SST, SST Logo, SuperFlash and UNI/O are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. ClockWorks, The Embedded Control Solutions Company, ETHERSYNCH, Hyper Speed Control, HyperLight Load, IntelliMOS, mTouch, Precision Edge, and QUIET-WIRE are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, MiWi, motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, RightTouch logo, REAL ICE, Ripple Blocker, Serial Quad I/O, SQI, SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries. GestIC is a registered trademarks of Microchip Technology Germany II GmbH & Co. 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