DN1509
N-Channel, Depletion-Mode, Vertical DMOS FET
Features
Description
•
•
•
•
•
•
This low threshold, depletion-mode, normally-on, transistor utilizes an advanced vertical Diffusion Metal
Oxide Semiconductor (DMOS) structure and a well
proven silicon-gate manufacturing process. This combination produces a device with the power-handling
capabilities of bipolar transistors, plus the high-input
impedance and positive-temperature coefficient inherent in Metal-Oxide Semiconductor (MOS) devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary breakdown.
High-input impedance
Low-input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakages
Applications
•
•
•
•
•
•
Normally-on switches
Battery operated systems
Converters
Linear amplifiers
Constant current sources
Telecom
2015 Microchip Technology Inc.
Vertical DMOS Field-Effect Transistors (FETs) are ideally suited to a wide range of switching and amplifying
applications where a very low threshold voltage, high
breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
DS20005403B-page 1
DN1509
Package Type
SOURCE
DRAIN
GATE
N/C
DRAIN
N/C
5-lead SOT-23
SOURCE
DRAIN
GATE
TO-243AA (SOT-89)
See Table 2-1 for pin information
DS20005403B-page 2
2015 Microchip Technology Inc.
DN1509
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS†
Drain-to-source voltage................................................................................................................................................................ BVDSX
Drain-to-gate voltage....................................................................................................................................................................BVDGX
Gate-to-source voltage................................................................................................................................................................... ±20V
Operating and storage temperature ............................................................................................................................. -55°C to +150°C
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
1.1
Electrical Specifications
TABLE 1-1:
DC AND AC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, for all specifications TA =TJ = +25°C
Symbol
Parameter
Min
Typ
Max
Units Conditions
Drain-to-source breakdown voltage
90
–
–
V
VGS = -5V, ID = 1.0µA
Gate-to-source off voltage
-1.8
–
-3.5
V
ID = 10µA
VGS(OFF) change with temperature
–
–
-4.5
Gate body leakage
–
–
100
nA
VGS = ±20V, VDS = 0V
–
–
1.0
µA
VDS = BVDSX, VGS = -5.0V
–
–
1.0
mA
VDS = 0.8 BVDSX,
VGS = -5.0V, TA= 125°C (Note 2)
300
540
–
mA
VGS = 0V, VDS = 25V
Static drain-to-source on-state
resistance
–
3.2
6.0
Ω
VGS = 0V, ID= 200mA
Change in RDS(ON) with temperature
–
–
1.1
%/°C
200
–
–
70
150
–
20
40
DC Parameters (Note 1, unless otherwise stated)
BVDSX
VGS(OFF)
∆VGS(OFF)
IGSS
ID(OFF)
IDSS
RDS(ON)
∆RDS(ON)
Drain-to-source leakage current
Saturated drain-to-source current
mV/°C VDS = 15V, ID= 10µA (Note 2)
VGS = 0V, ID= 200mA (Note 2)
AC Parameters (Note 2)
GFS
Forward transconductance
CISS
Input capacitance
COSS
Common source output capacitance
CRSS
Reverse transfer capacitance
–
6.0
15
td(ON)
Turn-on delay time
–
12
30
Rise time
–
16
45
Turn-off delay time
–
15
45
Fall time
–
25
60
Diode forward voltage drop
–
–
Reverse recovery time
–
400
tr
td(OFF)
tf
mmho VDS = 10V, ID= 200mA
pF
VGS = -10V, VDS = 25V,
f = 1MHz
ns
VDD = 25V,
ID = 100mA,
RGEN = 25Ω
1.8
V
VGS = -5.0V, ISD= 500mA
(Note 1)
–
ns
VGS = -5.0V, ISD= 500mA
(Note 2)
Diode Parameters
VSD
trr
Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle.
2: Specification is obtained by characterization and is not 100% tested.
2015 Microchip Technology Inc.
DS20005403B-page 3
DN1509
TABLE 1-2:
1.
TYPICAL THERMAL RESISTANCE
Package
θja
5-lead SOT-23
253°C/W
TO-243AA (SOT-89)
78°C/W1
Mounted on FR4 board, 25mm x 25mm x 1.57 mm
TABLE 1-3:
THERMAL CHARACTERISTICS
Package
ID1
continuous
(mA)
ID
pulsed
(mA)
Power
Dissipation
@TA = 2.5°C (W)
IDR1
(mA)
IDRM
(mA)
5-lead SOT-23
200
500
0.49
200
500
500
2
360
500
TO-243AA (SOT-89)
1.
2.
2.0
360
1.6
ID continuous is limited by max rated TJ
Mounted on FR4 board, 25mm x 25mm x 1.57 mm
PIN DESCRIPTION
The locations of the pins are listed in Package Type.
TABLE 2-1:
PIN DESCRIPTION
Pin # SOT-23
Pin # TO-243AA
Function
5
1
GATE
2
2
DRAIN
4
3
SOURCE
1,3
DS20005403B-page 4
NC
2015 Microchip Technology Inc.
DN1509
3.0
APPLICATION INFORMATION
Figure 3-1 shows the switching waveform and test circuit for DN1509.
0V
VDD
90%
INPUT
-10V
Pulse
Generator
10%
t(ON)
td(ON)
VDD
t(OFF)
tr
td(OFF)
tf
10%
90%
0V
FIGURE 3-1:
OUTPUT
RGEN
10%
OUTPUT
RL
INPUT
D.U.T.
90%
Switching Waveforms and Test Circuit
Product Summary
BVDSX/BVDGX
(V)
RDS(ON)
(max) (Ω)
IDSS
(min) (mA)
90
6.0
300
2015 Microchip Technology Inc.
DS20005403B-page 5
DN1509
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
Example
5-lead SOT-23 *
XXXXY
WWNNN
N5A5
17343
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005403B-page 6
Example
3-lead TO-243AA *
(SOT-89)
XXXYYWW
NNN
DN5A517
343
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
2015 Microchip Technology Inc.
DN1509
3-Lead TO-243AA (SOT-89) Package Outline (N8)
D
D1
C
E H
1
2
E1
3
L
b
b1
A
e
e1
Side View
Top View
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol
Dimensions
(mm)
A
b
b1
C
D
D1
E
E1
MIN
1.40
0.44
0.36
0.35
4.40
1.62
2.29
2.00†
NOM
-
-
-
-
-
-
-
-
MAX
1.60
0.56
0.48
0.44
4.60
1.83
2.60
2.29
e
1.50
BSC
e1
3.00
BSC
H
L
3.94
0.73†
-
-
4.25
1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
† This dimension differs from the JEDEC drawing
Drawings not to scale.
2015 Microchip Technology Inc.
DS20005403B-page 7
DN1509
5-Lead SOT-23 Package Outline (K1)
2.90x1.60mm body, 1.45mm height (max), 0.95mm pitch
D
θ1
e1
5
E1 E
Note 1
(Index Area
D/2 x E1/2)
1
e
L2
Gauge
Plane
θ
Seating
Plane
L
b
L1
Top View
View B
View B
A
A
A2
A1
Seating
Plane
A
Side View
View A - A
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Note:
1. $3LQLGHQWL¿HUPXVWEHORFDWHGLQWKHLQGH[DUHDLQGLFDWHG7KH3LQLGHQWL¿HUFDQEHDPROGHGPDUNLGHQWL¿HUDQHPEHGGHGPHWDOPDUNHURU
a printed indicator.
Symbol
MIN
Dimension
NOM
(mm)
MAX
A
A1
A2
b
0.90*
0.00
0.90
0.30
1.45
0.15
1.15
1.30
0.50
D
E
E1
e
e1
2.75* 2.60* 1.45*
2.90
2.80
1.60
3.05* 3.00* 1.75*
L
L1
L2
0.30
0.95
BSC
1.90
BSC
0.45
0.60
0.60
REF
0.25
BSC
ș
ș
0O
5O
4
O
10O
8
O
15O
JEDEC Registration MO-178, Variation AA, Issue C, Feb. 2000.
7KLVGLPHQVLRQLVQRWVSHFL¿HGLQWKH-('(&GUDZLQJ
Drawings not to scale.
DS20005403B-page 8
2015 Microchip Technology Inc.
DN1509
APPENDIX A:
REVISION HISTORY
Revision A (June 2015)
• Update file to new format
Revision B (August 2015)
• Minor fix to Table 1-1
2015 Microchip Technology Inc.
DS20005403B-page 9
DN1509
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
-
XX
X
-
Package Environmental
Options
X
Media
Type
Device:
DN1509 = N-Channel, Depletion-Mode,
vertical DMOS FET
Package:
K1
N8
= SOT-23, 5-lead
= TO-243AA (SOT-89), 3-lead
Environmental
G
= Lead (Pb)-free/ROHS-compliant package
Media Type:
(blank)
= 3000/Reel for K1 packages
= 2000/Reel for N8 packages
DS20005403B-page 10
Examples:
a)
DN1509K1-G
b)
DN1509N8-G
SOT-23 package,
3000/reel
TO-243AA package,
2000/reel
2015 Microchip Technology Inc.
DN1509
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
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Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
FlashFlex, flexPWR, JukeBlox, KEELOQ, KEELOQ logo, Kleer,
LANCheck, MediaLB, MOST, MOST logo, MPLAB,
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SST, SST Logo, SuperFlash and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
The Embedded Control Solutions Company and mTouch are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Analog-for-the-Digital Age, BodyCom, chipKIT, chipKIT logo,
CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
Serial Programming, ICSP, Inter-Chip Connectivity, KleerNet,
KleerNet logo, MiWi, MPASM, MPF, MPLAB Certified logo,
MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient Code
Generation, PICDEM, PICDEM.net, PICkit, PICtail,
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WiperLock, Wireless DNA, and ZENA are trademarks of
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SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
Silicon Storage Technology is a registered trademark of
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GestIC is a registered trademarks of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2015, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-63277-700-3
QUALITYMANAGEMENTSYSTEM
CERTIFIEDBYDNV
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Microchip received ISO/TS-16949:2009 certification for its worldwide
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DS20005403B-page 11
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DS20005403B-page 12
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