DN2450 DATA SHEET (07/10/2015) DOWNLOAD

DN2450
N-Channel, Depletion-Mode, Vertical DMOS FET
Features
Description
•
•
•
•
•
•
This low threshold, depletion-mode, normally-on, transistor utilizes an advanced vertical Diffusion Metal
Oxide Semiconductor (DMOS) structure and a well
proven silicon-gate manufacturing process. This combination produces a device with the power-handling
capabilities of bipolar transistors, plus the high-input
impedance and positive-temperature coefficient inherent in Metal-Oxide Semiconductor (MOS) devices.
Characteristic of all MOS structures, this device is free
from thermal runaway and thermally-induced secondary breakdown.
High-input impedance
Low-input capacitance
Fast switching speeds
Low on-resistance
Free from secondary breakdown
Low input and output leakages
Applications
•
•
•
•
•
Normally-on switches
Battery operated systems
Voltage to current converters
Constant current sources
Current and voltage limiters
 2015 Microchip Technology Inc.
Vertical DMOS Field-Effect Transistors (FETs) are ideally suited to a wide range of switching and amplifying
applications where a very low threshold voltage, high
breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
DS20005404A-page 1
DN2450
Package Type
DRAIN
DRAIN
SOURCE
SOURCE
DRAIN
GATE
GATE
TO-252 (D-PAK)
TO-243AA (SOT-89)
See Table 2-1 for pin information
DS20005404A-page 2
 2015 Microchip Technology Inc.
DN2450
1.0
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS†
Drain-to-source voltage................................................................................................................................................................ BVDSX
Drain-to-gate voltage....................................................................................................................................................................BVDGX
Gate-to-source voltage................................................................................................................................................................... ±20V
Operating and storage temperature ............................................................................................................................. -55°C to +150°C
Maximum junction temperature.....................................................................................................................................................150°C
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at those or any other conditions above those indicated in the
operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
1.1
ELECTRICAL SPECIFICATIONS
TABLE 1-1:
DC AND AC CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, for all specifications TA =TJ = +25°C
Symbol
Parameter
Min
Typ
Max
Units Conditions
Drain-to-source breakdown voltage
500
–
–
V
VGS= -5.0V, ID= 100µA
Gate-to-source off voltage
-1.5
–
-3.5
V
VDS= 25V, ID= 10µA
–
–
-4.5
–
–
100
–
–
1.0
µA
VDS= BVDSX, VGS= -10V
–
–
1.0
mA
VDS= 0.8 BVDSX,
VGS= -10V, TA= 125°C (Note 2)
700
–
–
mA
VGS= 0V, VDS= 25V
Static drain-to-source on-state
resistance
–
7.0
10
Ω
VGS= 0V, ID= 300mA
Change in RDS(ON) with temperature
–
–
1.1
%/°C
DC Parameters (Note 1, unless otherwise stated)
BVDSX
VGS(OFF)
∆VGS(OFF) Change in VGS(OFF) with temperature
IGSS
ID(OFF)
IDSS
RDS(ON)
∆RDS(ON)
Gate body leakage
Drain-to-source leakage current
Saturated drain-to-source current
mV/°C VDS= 25V, ID= 10µA (Note 2)
nA
VGS= ±20V, VDS= 0V
VGS= 0V, ID= 300mA (Note 2)
AC Parameters (Note 2)
GFS
Forward transconductance
500
–
–
CISS
Input capacitance
–
150
200
COSS
Common source output capacitance
–
40
55
CRSS
Reverse transfer capacitance
–
15
25
td(ON)
Turn-on delay time
–
–
15
Rise time
–
–
20
Turn-off delay time
–
–
15
Fall time
–
–
15
Diode forward voltage drop
–
–
Reverse recovery time
–
800
tr
td(OFF)
tf
mmho VDS= 10V, ID= 300mA
pF
VGS= -10V,
VDS= 25V,
f = 1MHz
ns
VDD= 25V,
ID= 300mA,
RGEN= 25Ω,
1.8
V
VGS= -5.0V, ISD= 300mA (Note 1)
–
ns
VGS= -5.0V, ISD= 300mA (Note 2)
Diode Parameters
VSD
trr
Note 1: All DC parameters are 100% tested at 25°C unless otherwise stated. Pulse test: 300 µs pulse, 2% duty cycle.
2: Specification is obtained by characterization and is not 100% tested.
 2015 Microchip Technology Inc.
DS20005404A-page 3
DN2450
TABLE 1-2:
TABLE 1-3:
TYPICAL THERMAL RESISTANCE
Package
θja
TO-252 (D-PAK)
81°C/W
TO-243AA (SOT-89)
133°C/W
THERMAL CHARACTERISTICS
Package
ID1
continuous
(mA)
ID
pulsed
(mA)
Power
Dissipation
@TA = 25°C (W)
IDR1
(mA)
IDRM
(mA)
TO-252 (D-PAK)
350
1000
2.52
350
1000
2
230
900
TO-243AA (SOT-89)
1.
2.
2.0
230
900
1.6
ID continuous is limited by max rated Tj
Mounted on FR4 board, 25mm x 25mm x 1.57 mm
PIN DESCRIPTION
The locations of the pins are listed in Package Type.
TABLE 2-1:
PIN DESCRIPTION
Pin # TO-252
Pin # TO-243AA
Function
1
1
GATE
3
3
SOURCE
2,4
2,4
DRAIN
DS20005404A-page 4
 2015 Microchip Technology Inc.
DN2450
3.0
APPLICATION INFORMATION
Figure shows the switching waveform and test circuit
for DN2450.
0V
VDD
90%
INPUT
-10V
Pulse
Generator
10%
t(ON)
td(ON)
VDD
t(OFF)
tr
td(OFF)
RGEN
10%
90%
0V
FIGURE 3-1:
OUTPUT
tf
10%
OUTPUT
RL
INPUT
D.U.T.
90%
Switching Waveforms and Test Circuit
Product Summary
BVDSX/BVDGX
(V)
RDS(ON)
(max) (Ω)
IDSS
(min) (mA)
500
10
700
 2015 Microchip Technology Inc.
DS20005404A-page 5
DN2450
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
TO-252 (D-PAK)
Example
XXXX
XXXXX e3
YYWWNNN
DN
2450 e3
1517343
3-lead TO-243AA *
(SOT-89)
XXXYYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS20005404A-page 6
Example
DN4E517
343
Product Code or Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for product code or customer-specific information. Package may or
not include the corporate logo.
 2015 Microchip Technology Inc.
DN2450
3-Lead TO-243AA (SOT-89) Package Outline (N8)
D
D1
C
E H
L
1
2
E1
3
b
b1
e
A
e1
Side View
Top View
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
Symbol
Dimensions
(mm)
A
b
b1
C
D
D1
E
E1
MIN
1.40
0.44
0.36
0.35
4.40
1.62
2.29
2.00†
NOM
-
-
-
-
-
-
-
-
MAX
1.60
0.56
0.48
0.44
4.60
1.83
2.60
2.29
e
1.50
BSC
e1
3.00
BSC
H
L
3.94
0.73†
-
-
4.25
1.20
JEDEC Registration TO-243, Variation AA, Issue C, July 1986.
† This dimension differs from the JEDEC drawing
Drawings not to scale.
 2015 Microchip Technology Inc.
DS20005404A-page 7
DN2450
Note: For the most current package drawings, see the Microchip Packaging Specification at www.microchip.com/packaging.
DS20005404A-page 8
 2015 Microchip Technology Inc.
DN2450
APPENDIX A:
REVISION HISTORY
Revision A (July 2015)
• Update file to new format
 2015 Microchip Technology Inc.
DS20005404A-page 9
DN2450
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
-
XX
X
-
Package Environmental
Options
X
Media
Type
Device:
DN2450 = N-Channel, Depletion-Mode,
vertical DMOS FET
Package:
K4
N8
= TO-252 (D-PAK)
= TO-243AA (SOT-89)
Environmental
G
= Lead (Pb)-free/ROHS-compliant package
Media Type:
(blank)
= 2000/Reel
DS20005404A-page 10
Examples:
a)
DN2450K4-G
b)
DN2450N8-G
TO-252 package,
2000/reel
TO-243AA package,
2000/reel
 2015 Microchip Technology Inc.
DN2450
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
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Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
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The Embedded Control Solutions Company and mTouch are
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CodeGuard, dsPICDEM, dsPICDEM.net, ECAN, In-Circuit
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© 2015, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
ISBN: 978-1-63277-585-6
QUALITYMANAGEMENTSYSTEM
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DS20005404A-page 11
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DS20005404A-page 12
 2015 Microchip Technology Inc.