Supertex inc. TP5322 P-Channel Enhancement-Mode Vertical DMOS FET General Description Features ►► ►► ►► ►► ►► ►► ►► The Supertex TP5322 is a low threshold enhancementmode (normally-off) transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. High input impedance Low threshold (-2.4V max.) Low input capacitance (110pF max.) Fast switching speeds Low on-resistance Low input and output leakage Free from secondary breakdown Applications ►► ►► ►► ►► ►► ►► Logic level interfaces - ideal for TTL and CMOS Battery operated systems Photo voltaic devices Analog switches General purpose line drivers Telecom switches Ordering Information Part Number Product Summary Package Option Packing TP5322K1-G TO-236AB (SOT-23) 3000/Reel TP5322N8-G 3-Lead TO-92 2000/Reel -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage ±20V -55OC to +150OC Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Package θja TO-236AB (SOT-23) 203OC/W TO-243AA (SOT-89) 133OC/W -220V RDS(ON) (max) 12Ω ID(ON) VGS(th) -700mA -2.4V (min) (max) DRAIN DRAIN Parameter Typical Thermal Resistance BVDSS/BVDGS Pin Configuration Absolute Maximum Ratings Operating and storage temperature Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. SOURCE SOURCE DRAIN GATE GATE TO-236AB (SOT-23) TO-243AA (SOT-89) Product Marking P3CW W = Code for week sealed = “Green” Packaging Package may or may not include the following marks: Si or TO-236AB (SOT-23) TP3CW W = Code for week sealed = “Green” Packaging Package may or may not include the following marks: Si or TO-243AA (SOT-89) Doc.# DSFP-TP5322 C081613 Supertex inc. www.supertex.com TP5322 Thermal Characteristics ID Package (continuous)† ID Power Dissipation (pulsed) @TA = 25OC -120mA -700mA 0.36W TO-236AB (SOT-23) TO-243AA (SOT-89) -260mA -0.90mA Notes: † ID (continuous) is limited by max rated Tj. ‡ Mounted on FR4 board, 25mm x 25mm x 1.57mm. Electrical Characteristics (T A Sym 1.6W ‡ IDR† IDRM -120mA -700mA -260mA -0.90mA = 25OC unless otherwise specified) Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage -220 - - V VGS = 0V, ID = -2.0mA VGS(TH) Gate threshold voltage -1.0 - -2.4 V VGS = VDS, ID = -1.0mA Change in VGS(TH) with temperature - - 4.5 mV/ C VGS = VDS, ID = -1.0mA IGSS Gate body leakage current - - -100 nA VGS = ±20V, VDS = 0V - - -10 µA ID(SS) Zero gate voltage drain current VDS = Max rating, VGS = 0V - - -1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC ID(ON) On-state drain current -0.7 -0.95 - A VGS = -10V, VDS = -25V - 10 15 8.0 12 - - 1.7 %/OC VGS = -10V, ID = -200mA 100 250 - mmho VDS = -25V, ID = -200mA ΔVGS(TH) Static drain-to-source on-state resistance RDS(ON) ΔRDS(ON) Change in RDS(ON) with temperature GFS Forward transconductance CISS Input capacitance - 110 COSS Common source output capacitance - 45 CRSS Reverse transfer capacitance - 20 td(ON) Turn-on delay time - - 10 Rise time - - 15 Turn-off delay time - - 20 Fall time - - 15 Diode forward voltage drop - - Reverse recovery time - 300 tr td(OFF) tf VSD trr O Ω Conditions VGS = -4.5V, ID = -100mA VGS = -10V, ID = -200mA pF VGS = 0V, VDS = -25V, f = 1.0MHz ns VDD = -25V, ID = -700mA, RGEN = 25Ω, -1.8 V VGS = 0V, ISD = -500mA - ns VGS = 0V, ISD = -500mA Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V INPUT -10V Pulse Generator 10% td(ON) 0V OUTPUT VDD Doc.# DSFP-TP5322 C081613 tr td(OFF) 90% 10% RGEN 90% t(OFF) t(ON) D.U.T. tf INPUT OUTPUT RL 90% 10% 2 VDD Supertex inc. www.supertex.com TP5322 3-Lead TO-236AB (SOT-23) Package Outline (K1) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch D 3 E1 E Gauge Plane 0.25 1 e b e1 Seating Plane L L1 2 View B Top View View B A A A2 Seating Plane A1 Side View Symbol Dimension (mm) View A - A A A A1 A2 b D E E1 MIN 0.89 0.01 0.88 0.30 2.80 2.10 1.20 NOM - - 0.95 - 2.90 - 1.30 MAX 1.12 0.10 1.02 0.50 3.04 2.64 1.40 e e1 L L1 0.20 † 0.95 BSC 1.90 BSC 0.50 0.60 0.54 REF θ 0O 8O JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO236ABK1, Version C041309. Doc.# DSFP-TP5322 C081613 3 Supertex inc. www.supertex.com TP5322 3-Lead TO-243AA (SOT-89) Package Outline (N8) D D1 C E H L 1 2 E1 3 b b1 e A e1 Top View Symbol Dimensions (mm) Side View A b b1 C D D1 E E1 e MIN 1.40 0.44 0.36 0.35 4.40 1.62 2.29 2.00† NOM - - - - - - - - MAX 1.60 0.56 0.48 0.44 4.60 1.83 2.60 2.29 1.50 BSC e1 3.00 BSC H L 3.94 0.73† - - 4.25 1.20 JEDEC Registration TO-243, Variation AA, Issue C, July 1986. † This dimension differs from the JEDEC drawing Drawings not to scale. Supertex Doc. #: DSPD-3TO243AAN8, Version F111010. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TP5322 C081613 4 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com