Supertex inc. TP5335 P-Channel Enhancement-Mode Vertical DMOS FET Features ►► ►► ►► ►► ►► ►► ►► General Description High input impedance and high gain Low power drive requirement Ease of paralleling Low CISS and fast switching speeds Excellent thermal stability Integral source-drain diode Free from secondary breakdown The Supertex TP5335 is a low threshold enhancementmode (normally-off) transistor utilizing an advanced vertical DMOS structure and Supertex’s well-proven silicon-gate manufacturing process. This combination produces a device with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices. Characteristic of all MOS structures, this device is free from thermal runaway and thermally-induced secondary breakdown. Applications ►► ►► ►► ►► ►► Logic level interfaces - ideal for TTL and CMOS Solid state relays Analog switches Power management Telecom switches Ordering Information Product Summary Part Number Package Option Packing TP5335K1-G TO-236AB (SOT-23) 3000/Reel -G denotes a lead (Pb)-free / RoHS compliant package. Contact factory for Wafer / Die availablity. Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant. Parameter Value Drain-to-source voltage BVDSS Drain-to-gate voltage BVDGS Gate-to-source voltage RDS(ON) BVDSS/BVDGS -55 C to +150OC O Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. Continuous operation of the device at the absolute rating level may affect device reliability. All voltages are referenced to device ground. Typical Thermal Resistance Package θja TO-236AB (SOT-23) 203OC/W (max) (max) -350V 30Ω -2.4V DRAIN SOURCE ±20V Operating and storage temperature VGS(th) Pin Configuration Absolute Maximum Ratings Doc.# DSFP-TP5335 B081913 Supertex’s vertical DMOS FETs are ideally suited to a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. GATE TO-236AB (SOT-23) Product Marking P3SW W = Code for week sealed = “Green” Packaging Package may or may not include the following marks: Si or TO-236AB (SOT-23) Supertex inc. www.supertex.com TP5335 Thermal Characteristics ID Package TO-236AB (SOT-23) (continuous)† ID Power Dissipation (pulsed) @TA = 25OC -85mA -400mA 0.36W IDR† IDRM -85mA -400mA Notes: † ID (continuous) is limited by max rated Tj. Electrical Characteristics (T A = 25OC unless otherwise specified) Sym Parameter Min Typ Max Units BVDSS Drain-to-source breakdown voltage -350 - - V VGS = 0V, ID = -100µA VGS(TH) Gate threshold voltage -1.0 - -2.4 V VDS = VGS, ID = -1.0mA Change in VGS(TH) with temperature - - 4.5 mV/ C VDS = VGS, ID = -1.0mA Gate body leakage current - - -100 nA VGS = ±20V, VDS = 0V - - -10 µA VDS = Max rating, VGS = 0V - - -1.0 mA VDS = 0.8 Max Rating, VGS = 0V, TA = 125OC - - -5.0 nA VGS = 0V, VDS = -330V -200 - - -400 - - ΔVGS(TH) IGSS IDSS ID(ON) RDS(ON) ΔRDS(ON) Zero gate voltage drain current On-state drain current - - 30 Change in RDS(ON) with temperature - - 1.7 %/ C VGS = -10V, ID = -200mA 125 - - mmho VDS = -25V, ID = -200mA - - 110 COSS Common source output capacitance - - 60 CRSS Reverse transfer capacitance - - 22 td(ON) Turn-on delay time - - 20 Rise time - - 15 Turn-off delay time - - 25 Fall time - - 25 Diode forward voltage drop - - Reverse recovery time - 800 trr VGS = -4.5V, ID = -150mA 75 Input capacitance VSD VGS = -10V, VDS = -25V - CISS tf VGS = -4.5V, VDS = -25V - Forward transconductance td(OFF) mA Static drain-to-source on-state resistance GFS tr O Conditions Ω O VGS = -10V, ID = -200mA pF VGS = 0V, VDS = -25V, f = 1MHz ns VDD = -25V, ID = -150mA, RGEN = 25Ω, -1.8 V VGS = 0V, ISD = -200mA - ns VGS = 0V, ISD = -200mA Notes: 1. All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.) 2. All A.C. parameters sample tested. Switching Waveforms and Test Circuit 0V INPUT -10V Pulse Generator 10% td(ON) 0V OUTPUT VDD Doc.# DSFP-TP5335 B081913 tr td(OFF) 90% 10% RGEN 90% t(OFF) t(ON) D.U.T. tf INPUT OUTPUT RL 90% 10% 2 VDD Supertex inc. www.supertex.com TP5335 3-Lead TO-236AB (SOT-23) Package Outline (K1) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch D 3 E1 E Gauge Plane 0.25 1 e b e1 Seating Plane L L1 2 View B Top View View B A A A2 Seating Plane A1 Side View Symbol Dimension (mm) View A - A A A A1 A2 b D E E1 MIN 0.89 0.01 0.88 0.30 2.80 2.10 1.20 NOM - - 0.95 - 2.90 - 1.30 MAX 1.12 0.10 1.02 0.50 3.04 2.64 1.40 e e1 0.95 BSC 1.90 BSC L 0.20† 0.50 0.60 L1 0.54 REF θ 0O 8O JEDEC Registration TO-236, Variation AB, Issue H, Jan. 1999. † This dimension differs from the JEDEC drawing. Drawings not to scale. Supertex Doc.#: DSPD-3TO236ABK1, Version C041309. (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to http://www.supertex.com/packaging.html.) Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications refer to the Supertex inc. (website: http//www.supertex.com) Supertex inc. ©2013 Supertex inc. All rights reserved. Unauthorized use or reproduction is prohibited. Doc.# DSFP-TP5335 B081913 3 1235 Bordeaux Drive, Sunnyvale, CA 94089 Tel: 408-222-8888 www.supertex.com