CY3280-22X45 Universal CapSense(R) Controller Development Kit Guide.pdf

CY3280-22x45 Universal CapSense®
Controller Development Kit Guide
Doc. # 001-51921 Rev. *H
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl): 408.943.2600
http://www.cypress.com
Copyrights
Copyrights
© Cypress Semiconductor Corporation, 2009-2014. The information contained herein is subject to change without notice.
Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a
Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted
nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an
express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components
in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user.
The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such
use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by
and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty
provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create
derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described
herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein.
Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure
may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all
charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
PSoC® and CapSense® are registered trademarks and PSoC Designer™, Programmable System-on-Chip™, and PSoC
Creator™ are trademarks of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein
are property of the respective corporations.
Flash Code Protection
Cypress products meet the specifications contained in their particular Cypress PSoC Data Sheets. Cypress believes that its
family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used.
There may be methods, unknown to Cypress, that can breach the code protection features. Any of these methods, to our
knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable."
Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly
evolving. We at Cypress are committed to continuously improving the code protection features of our products.
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CY3280-22x45 Universal CapSense® Controller Development Kit Guide, Doc. # 001-51921 Rev. *H
Contents
Safety Information
5
1. Introduction
7
1.1
1.2
1.3
1.4
1.5
1.6
Kit Contents .................................................................................................................7
1.1.1 Prerequisites ....................................................................................................7
1.1.2 MiniProg1 Programmer ....................................................................................7
1.1.3 CY3240-I2USB Bridge .....................................................................................8
1.1.4 CY3280 Universal CapSense Module Boards .................................................8
PSoC Designer ............................................................................................................8
PSoC Programmer ......................................................................................................8
Bridge Control Panel....................................................................................................8
Additional Learning Resources....................................................................................8
Documentation Conventions........................................................................................9
2. Getting Started
2.1
2.2
2.3
Kit Installation ............................................................................................................11
PSoC Designer ..........................................................................................................16
PSoC Programmer ....................................................................................................17
3. Kit Operation
3.1
3.2
3.3
4.2
19
Introduction ................................................................................................................19
CY3280-22x45 Universal CapSense Controller Board Features...............................19
Hardware Requirement..............................................................................................19
3.3.1 Connecting CapSense Module Board............................................................20
3.3.2 Test the Board ................................................................................................21
3.3.3 Reset Board to Factory Settings ....................................................................21
4. Hardware Design
4.1
11
23
System Block Diagram ..............................................................................................23
4.1.1 PSoC Power Supply.......................................................................................24
4.1.2 Dual-channel CSD Scanning .........................................................................25
4.1.3 External Crystal Oscillator of 32.768 k ...........................................................25
Hardware Interface and Description ..........................................................................26
4.2.1 Connector and Hardware Descriptions .........................................................26
4.2.2 Potentiometer in Parallel with Cmod Selection Jumper (JP1, JP2) ...............26
4.2.3 PSoC VCC Selection Jumper (JP3)...............................................................26
4.2.4 XRES/INT Selection Jumper (JP4) ................................................................27
4.2.5 External 9-V Battery Power Connector (BH1)................................................27
4.2.6 SPI/I2C Interface (J1).....................................................................................27
4.2.7 RS-232 Interface (J2).....................................................................................28
4.2.8 ISSP/I2CUSB Interface (J3)...........................................................................28
4.2.9 ICE Interface (J4) ...........................................................................................29
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Contents
4.3
4.2.10 External Power Supply Interface (J5) ............................................................ 29
4.2.11 CY3280-SLM Board Connector (J6) .............................................................. 30
4.2.12 CapSense Plus Module Connector (J7)......................................................... 32
Test Point and Description ....................................................................................... 33
5. Code Examples
5.1
A. Appendix
A.1
A.2
A.3
A.4
51
Schematics ................................................................................................................ 51
Top Silk Screen ......................................................................................................... 52
Bill of Materials (BOM)............................................................................................... 53
Regulatory Compliance Information .......................................................................... 54
Revision History
4
35
Create a CapSense Project Using PSoC Designer................................................... 35
5.1.1 Flowchart ....................................................................................................... 35
5.1.2 Create New Project........................................................................................ 35
5.1.2.1 Add CSD2X, LED, and EzI2Cs User Module to Your Design ......... 37
5.1.2.2 Configure LED and EzI2Cs User Modules ...................................... 41
5.1.2.3 Configure Sensor CSD2X User Module .......................................... 42
5.1.3 Program CY3280-22x45 Board...................................................................... 46
5.1.4 Test the Board................................................................................................ 48
5.1.5 Reading CapSense Data over I2C.................................................................48
55
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Safety Information
Regulatory Compliance
The CY3280-22x45 is intended for use as a development platform for hardware or software in a
laboratory environment. The board is an open system design, which does not include a shielded
enclosure. This may cause interference to other electrical or electronic devices in close proximity. In
a domestic environment, this product may cause radio interference. In this case, the user may be
required to take adequate prevention measures. Also, the board should not be used near any
medical equipment or RF devices.
Attaching additional wiring to this product or modifying the product operation from the factory default
may affect its performance and cause interference with other apparatus in the immediate vicinity. If
such interference is detected, suitable mitigating measures should be taken.
The CY3280-22x45 as shipped from the factory has been verified to meet with requirements of CE
as a Class A product..
The CY3280-22x45 contains electrostatic discharge (ESD) sensitive
devices. Electrostatic charges readily accumulate on the human body
and any equipment, and can discharge without detection. Permanent
damage may occur on devices subjected to high-energy discharges.
Proper ESD precautions are recommended to avoid performance
degradation or loss of functionality. Store unused CY3280-22x45
boards in the protective shipping package.
End-of-Life / Product Recycling
This Kit has end-of life after 5 years of date of manufactured
mentioned on the back side of the Box. Please contact your nearest
recycler for dispositioning the kit.
CY3280-22x45 Universal CapSense® Controller Development Kit Guide, Doc. # 001-51921 Rev. *H
5
Safety Information
General Safety Instructions
ESD Protection
ESD can damage boards and associated components. Cypress recommends that you perform
procedures only at an ESD workstation. If one is not available, use appropriate ESD protection by
wearing an antistatic wrist strap attached to chassis ground (any unpainted metal surface) on your
board when handling parts.
Handling Boards
CY3280-22x45 boards are sensitive to ESD. Hold the board only by its edges. After removing the
board from its box, place it on a grounded, static free surface. Use a conductive foam pad if
available. Do not slide board over any surface.
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1.
Introduction
Thank you for your interest in the CY3280-22x45 Universal CapSense® Controller Development Kit.
This kit showcases the features of CY8C22x45 chip. The CY8C22x45 family of PSoC® includes the
following devices: CY8C21345-24SXI, CY8C22345-24SXI, and CY8C22545-24AXI. The 56-pin onchip debug (OCD) part is assembled in the CY3280-22x45 Universal CapSense Controller (UCC)
board. This part is used only for in-circuit debugging.
Note OCD parts are not available for production.
The CapSense feature of CY8C22x45 can be implemented with the CY3280-SLM Universal
CapSense Linear Slider Module. The two boards are connected by a 44-pin connector. The
CapSense plus features of CY3280-22x45 can be implemented using a board designed to mate with
the 40-pin CapSense plus connector.
1.1
Kit Contents
The following items are included in the kit:
1.1.1
■
CY3280-22x45 UCC board
■
Printed documents
■
CY3280-22x45 UCC DVD
■
CY3240-I2USB board
■
CY3217-MiniProg1 programmer
■
USB A to Mini B cable
Prerequisites
The following are required for the functioning of the kit:
1.1.2
■
CY3280-Universal CapSense Module board or user custom board similar to CY3280 module
boards (see 1.1.4 CY3280 Universal CapSense Module Boards)
■
12 V DC adapter (optional)
■
CY3215-DK (optional, required to debug programs in PSoC Designer™). For more information,
visit http://www.cypress.com/go/CY3215-DK.
MiniProg1 Programmer
The PSoC MiniProg1 allows you to program PSoC parts quickly and easily. It is small, compact, and
connects to your PC using the provided USB 2.0 cable. During prototyping, the MiniProg1 can be
used as an in-system serial programmer (ISSP) to program PSoC devices on your PCB.
When the MiniProg1 is connected, you can use PSoC Programmer to program. PSoC Programmer
is a free software, which can either be launched from within PSoC Designer or run as a standalone
program. For details, refer to MiniProg1's web page – http://www.cypress.com/?rID=37459.
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Introduction
1.1.3
CY3240-I2USB Bridge
The I2USB bridge allows you to test, tune, and debug hardware and software of a PSoC application
by bridging the USB port to I2C. Populated with the CY8C24894 PSoC device, the I2USB bridge can
be connected through the ISSP pins on the controller board. For details, refer to the CY3240 kit web
page – http://www.cypress.com/?rID=3421.
1.1.4
CY3280 Universal CapSense Module Boards
CY3280 Universal CapSense Module boards are available for purchase separately or as part of the
combination kits. The CY3280-22x45 Universal CapSense Controller can be connected to CY3280SLM, CY3280-SRM, CY3280-BMM, and CY3280-BSM CapSense boards.
1.2
PSoC Designer
PSoC Designer is the integrated development environment (IDE) used to customize your PSoC
application. More information about PSoC Designer is available in the PSoC Designer IDE Guide; go
to: <Install_directory>\PSoC Designer\<version>\Documentation. The default
<Install_directory> is "C:\Program Files\Cypress."
1.3
PSoC Programmer
PSoC Programmer offers a simple GUI to configure and program PSoC devices. For more information about PSoC Programmer, go to the following location:
<Install_directory>\Programmer\<version>\Documents.
The default <Install_directory> is "C:\Program Files\Cypress."
1.4
Bridge Control Panel
The Bridge Control Panel GUI is used with CY3240-I2USB bridge to enable communication with I2C
slave devices; here, it is used with the CY3280-22x45 Universal CapSense Controller. This software
is used to configure I2C devices as well as acquire and process data received from I2C slave
devices. The Bridge Control Panel helps in optimizing, debugging, and tuning the target devices. For
details on using the Bridge Control Panel for CapSense debug, refer to the application note,
AN2397 or refer to the CY3240 kit documentation.
1.5
Additional Learning Resources
Visit http://www.cypress.com for additional learning resources in the form of data sheets, technical
reference manual, and application notes.
8
■
PSoC CY8C22x45 data sheet contains pin descriptions and other specifications of CY8C22545:
http://www.cypress.com/?mpn=CY8C22545-24AXI
■
PSoC CY8C22545 Technical Reference Manual: http://www.cypress.com/?rID=37728
■
Schematics and Board Layouts of CY3280-22x45: http://www.cypress.com/?rID=36805
■
CY3240-I2USB Bridge Guide: http://www.cypress.com/?rID=3421
■
CY3280-SLM Linear Slider Module Kit: http://www.cypress.com/go/CY3280-SLM
■
CY3280-SRM Radial Slider Module Kit: http://www.cypress.com/go/CY3280-SRM
■
CY3280-BSM Simple Button Module Kit: http://www.cypress.com/go/CY3280-BSM
■
CY3280-BMM Matrix Button Module Kit: http://www.cypress.com/go/CY3280-BMM
■
MiniProg Users Guide and Code Examples: http://www.cypress.com/?rID=37459
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Introduction
1.6
■
PSoC Designer Training: http://www.cypress.com/?rID=40543. This is a web-based course that
provides an overview of PSoC and its design tool.
■
Getting started with CapSense: http://www.cypress.com/?rID=48787
Documentation Conventions
Table 1-1. Document Conventions for Guides
Convention
Usage
Courier New
Displays file locations, user entered text, and source code:
C:\ ...cd\icc\
Italics
Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Designer User Guide.
[Bracketed, Bold]
Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
File > Open
Represents menu paths:
File > Open > New Project
Bold
Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Times New Roman
Displays an equation:
2+2=4
Text in gray boxes
Describes Cautions or unique functionality of the product.
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Introduction
Note: Intentionally left blank.
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2.
Getting Started
This chapter describes the installation and configuration of the CY3280-22x45 Universal CapSense
Controller Kit.
2.1
Kit Installation
To install the kit software, follow these steps:
Note You can also download the latest kit installer from http://www.cypress.com/?rID=36805.
Three different types of installers are available for download.
a. CY3280-22x45 Kit ISO: This file (ISO image) is an archive file of the optical disc provided with
the kit. You can use this to create an installer DVD or extract information using WinRar or similar tools. This ISO file includes kit code examples, hardware files, documents, Cypress prerequisites (PSoC® Designer and PSoC Programmer), and other mandatory prerequisite like
Microsoft® Internet Explorer®, Windows® Installer, and .NET framework.
b. CY3280-22x45 Kit Setup: This executable file installs Kit code examples, Kit hardware files,
and documents along with Cypress prerequisites (PSoC Designer and PSoC Programmer).
c. CY3280-22x45 Kit Only: This executable file installs only the kit contents, which includes kit
code examples, hardware files, and user documents.
1. Insert the kit DVD into the DVD drive of your PC. The DVD is designed to auto-run and the kit
installer startup screen appears.
2. Click Install the CY3280-22x45 to start the installation, as shown in Figure 2-1.
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11
Getting Started
Figure 2-1. Kit Installer Startup Screen
Note If auto-run does not execute, double-click cyautorun.exe in the root directory of the DVD,
as shown in Figure 2-2.
Figure 2-2. DVD Root Directory
3. The InstallShield Wizard screen appears, which shows the default setup location. You can
change the location using Change, as shown in Figure 2-3.
4. Click Next to launch the kit installer.
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Getting Started
Figure 2-3. InstallShield Wizard
5. In the Product Installation Overview screen, select the installation type that best suits your
requirement. The drop-down menu has three options - Typical, Complete, and Custom, as
shown in Figure 2-4.
6. Accept the license agreement to proceed.
7. Click Next to start the installation.
Figure 2-4. Installation Type Options
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13
Getting Started
8. When the installation begins, a list of packages appear on the Installation Page. A green check
mark appears adjacent to every package that is downloaded and installed (see Figure 2-5).
9. Wait until all the packages are downloaded and installed successfully.
Figure 2-5. Installation Page
10.Click Finish to complete the installation.
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Getting Started
Figure 2-6. Installation Complete Page
After software installation, verify your setup by opening PSoC Programmer with the MiniProg
attached to PC. Open Bridge Control Panel with the CY3240-I2USB bridge attached to the PC to
verify driver installation.
Note Advanced users can skip to Code Examples chapter on page 35.
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Getting Started
2.2
PSoC Designer
1. Click Start > All Programs > Cypress > PSoC Designer <version> > PSoC Designer <version>.
2. Click File > New Project to create new project; click File > Open Project to work with an existing
project.
Figure 2-7. PSoC Designer Interconnect View
3. To experiment with the code examples, go to Code Examples chapter on page 35.
Note For more details on PSoC Designer, see the PSoC Designer IDE Guide at:
<Install_directory>\PSoC Designer\<version>\Documentation.
The default <Install_directory> is "C:\Program Files\Cypress."
See Additional Learning Resources on page 8 for links to PSoC Designer training. The PSoC
Designer quick start guide is available at: http://www.cypress.com/?rID=47954.
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Getting Started
2.3
PSoC Programmer
1. Click Start > All Programs > Cypress > PSoC Programmer <version> > PSoC Programmer
<version>.
2. Select the MiniProg from Port Selection and click the power button, as shown in Figure 2-8.
Figure 2-8. PSoC Programmer Window
3. Click the File Load button from the PSoC Programmer menu bar, navigate and select the hex
file.
4. Use the Program button to program the hex file on to the chip.
5. When programming is successful, Programming Succeeded appears in the Actions pane.
6. Close PSoC Programmer.
Note For more details on PSoC Programmer, go to Programmer user guide at:
<Install_directory>\Programmer\<version>\Documents. The default <Install_directory>
is "C:\Program Files\Cypress."
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Getting Started
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3.
3.1
Kit Operation
Introduction
The CY3280-22x45 board is pre-programmed with a demonstration firmware. When this board is
powered by a PSoC MiniProg, a CY3240-I2USB Bridge, or an optional external power supply, the
LEDs light up when a finger touches one of the buttons.
These instructions assume your board is reprogrammed with factory settings. If it has not, follow the
instructions in 3.3.3 Reset Board to Factory Settings.
3.2
3.3
CY3280-22x45 Universal CapSense Controller Board Features
■
CY3280-SLM Universal CapSense Linear Slider Module support
■
External 12-V power supply
■
Fixed 5 V or adjustable voltage for PSoC
■
ICE interface for in-circuit debugging
■
MiniProg interface
■
RS-232 interface
■
LEDs indicate power status
■
32.768 kHz external oscillator option
■
Multiple test points
Hardware Requirement
■
CY3280-22x45 Universal CapSense Controller board
■
CY3280-SLM board or a similar CapSense module board
■
MiniProg1
■
CY3240-I2USB bridge
■
USB A to Mini-B cable
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Kit Operation
3.3.1
Connecting CapSense Module Board
1. Connect CY3280-SLM Universal CapSense Linear Slider Module Board
2. Place shunt on pins 1 and 2 of jumper J2 to enable shield signal routing in CY3280-SLM
module. Place shunt on pins 2 and 3 of jumper J2 if no overlay is present in the SLM board.
3. Place shunt on pins 1 and 2 of JP4 (default setting).
4. Connect your computer to the CapSense test board ISSP connector (J3) using the MiniProg and
a USB cable.
5. Click Start > All Programs > Cypress > PSoC Programmer <version> > PSoC Programmer
<version>.
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Kit Operation
6. From the Port menu, select MiniProg1/<Identification Code>.
7. Click Toggle Device Power. The D1 and D2 LEDs (red) on the CY3280-22x45 board light up.
3.3.2
Test the Board
Touch one or more buttons. The LEDs corresponding to the buttons being pressed light up. When
sliding the finger from SLD0 to SLD9 in the SLM board turns on LED0 to LED4 one by one based on
the finger position.
Figure 3-1. CapSense Buttons
3.3.3
Reset Board to Factory Settings
Follow these steps to reset the board to the original factory installed programming:
1. Place shunt on pins 2 and 3 of JP3 and pins 1 and 2 of JP4 (default setting). Remove JP1 and
JP2 if present.
2. Connect your computer to the CY3280-22x45 board ISSP connector (J3) using the MiniProg and
a USB cable.
3. Click Start > All Programs > Cypress > PSoC Programmer <version> > PSoC Programmer
<version>.
4. Click File > File Load, navigate to and open the CY3280_22X45_SLM.hex file on the DVD at:
<Installed directory>\CY3280-22X45\1.0\Firmware\CY3280_22X45_SLM
5. If using Miniprog3, select the Protocol as 'ISSP' and Voltage as '5.0 V' in Programmer >
Programmer characteristics as shown in Figure 3-2.
6. From the Device Family menu, select 22x45.
7. In Programmer > Programming Mode, select "Power Cycle"
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Kit Operation
Figure 3-2. Programmer Settings for MiniProg3
8. From the Device menu, select CY8C22545-24AXI.
9. Click Program. "Programming Succeeded..." appears in the Actions pane when programming is
complete.
Note: Intentionally left blank.
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4.
Hardware Design
The CY3280-22x45 Universal CapSense Controller Board is used to demonstrate the features of
CY8C22x45. The CY8C22x45 family includes CY8C21345-24SXI, CY8C22345-24SXI, and
CY8C22545-24AXI. A special circuit is needed to demonstrate some features of CY8C22x45.
4.1
System Block Diagram
The CY3280-22x45 Universal Capsense Controller Board has the following sections:
■
PSoC CY8C22045-24AXI
Note: CY8C22045 is an On-Chip Debug (OCD) part which can be used for debugging projects
developed for all CY8C22x45 and CY8C21x45 family of devices.
■
Power Supply System
■
RJ45 Connector/ICE Cube debug connector
■
ISSP/I2C Connector
■
Vadj variable regulator
■
LEDs
■
Modulator capacitor (CMOD)
9V Battery
12 Adapter
Figure 4-1. System Block Diagram
RS232 Interface
UART To PC
Fixed Regulator
CMOD
ISSP/I2C
Connector
Adjustable
Regulator
Power
Selection
Jumper
LEDs
MiniProg1
I2C-USB Bridge
PSoC Vcc
CapSense
Module
Connector
PSoC
CY8C22045-24AXI
ICE-Cube Connector
CapSense Plus
Connector
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Hardware Design
4.1.1
PSoC Power Supply
There are two kinds of power supplies for PSoC VCC: fixed 5 V or variable Vadj. The JP3 is used to
select the power. If pin 2 is shorted to pin 3, the fixed 5 V is selected for the PSoC VCC. If pin 2 is
shorted to pin 1, the variable Vadj is selected for the PSoC VCC.
Figure 4-2. Schematics
Vadj is the output of LP3875ES-ADJ. According to the schematics, the output is calculated from this
equation:
Equation 1
If RV1 can vary from 0  to 10 k, the maximum voltage of Vadj and the minimum voltage of Vadj
can be calculated individually by using these equations:
Equation 2
Equation 3
For more information about the LP3875ES-ADJ, refer to the LP3875ES-ADJ data sheet.
Follow these steps if the fixed 5 V is selected for PSoC power:
■
Disconnect the external 12 V power supply and 9 V battery power
■
Place shunt on pin 2 and pin 3 of JP3
■
Connect the external 12 V power supply or 9 V battery power
Follow these steps if the Vadj is selected for PSoC power:
24
■
Remove any shunt on JP3
■
Connect the external 12 V power supply or 9 V battery power
■
Measure the voltage of pin 1 of JP3 with a multimeter, tuning the potentiometer RV1 until the
desired voltage is obtained
■
Disconnect the external 12 V power supply or 9 V battery power
■
Place shunt on pin 1 and pin 2 of JP3
■
Connect the external 12 V power supply or 9 V battery power
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Hardware Design
4.1.2
Dual-channel CSD Scanning
The significant improvement of CY8C22x45 is the dual-channel CSD scanning. To demonstrate this
new feature, two external capacitors are required. According to the CY8C22x45 Technical Reference
Manual (TRM), pin 5 and pin 7 of port 0 are dedicated for external capacitor connection. The
capacitor Cmod assigned to pin 5 of port 0 is connected to the internal left analog bus. The capacitor
Cmod assigned to pin 7 of port 0 is connected to the internal right analog bus. There is an option of
potentiometer in parallel to Cmod. If the potentiometer RV2 is needed for the left channel, place
shunt on JP1. If the potentiometer RV3 is needed for the right channel, place shunt on JP2. The
resistors of R55 and R56 are not populated as default.
Note RV2 and RV3 potentiometers are not Bleed resistors; they can be used as a resistor parallel to
CMOD to convert IDAC output on AMUX buses to voltage signals.
Figure 4-3. Potentiometer in Parallel with Cmod Selection Jumper Schematic
4.1.3
External Crystal Oscillator of 32.768 k
The CY8C22x45 has multiple clock sources that include the phase locked loop (PLL), internal main
oscillator (IMO), internal low speed oscillator (ILO), and 32.768 kHz external crystal oscillator (ECO)
for precision, programmable clocking. The clocks, together with programmable clock dividers, provide the flexibility to integrate almost any timing requirement into the PSoC device.
The ECO is assigned to the P1[1] crystal (XTALin) and P1[0] crystal (XTALout). Refer to AN2027 for
details on the PSoC 1 ECO.
Figure 4-4. ECO Circuit
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Hardware Design
4.2
Hardware Interface and Description
4.2.1
Connector and Hardware Descriptions
Table 4-1. Connector and Hardware Descriptions
Board ID
4.2.2
Description
JP1
Short to connect Potentiometer RV2 in parallel with Cmod on P0[5]
JP2
Short to connect Potentiometer RV3 in parallel with Cmod on P0[7]
JP3
PSoC VCC selection jumper
JP4
XRES selection
BH1
External 9-V battery connector
J1
SPI/I2C interface
J2
RS-232 interface
J3
ISSP/I2CUSB connector
J4
ICE interface
J5
External power supply
J6
CY3280-SLM board connector
J7
CapSense Plus module connector
Potentiometer in Parallel with Cmod Selection Jumper (JP1, JP2)
If the potentiometer RV2 is needed for the left channel, place shunt on JP1. If the potentiometer RV3
is needed for the right channel, place shunt on JP2. Refer to Figure 4-3 for details.
Note RV2 and RV3 potentiometers are not Bleed resistors; they can be used as a resistor parallel to
CMOD to convert IDAC output on AMUX buses to voltage signals.
4.2.3
PSoC VCC Selection Jumper (JP3)
Figure 4-5. PSoC VCC Selection Jumper
Place shunt on pin 2 and pin 3 of JP3 to select fixed 5 V as PSoC VCC power supply. Place shunt on
pin 1 and pin 2 of JP3 to select variable Vadj as PSoC VCC power supply. If VCC power is applied,
the power on LED D2 lights up. Refer to PSoC Power Supply on page 24 for more information.
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Hardware Design
4.2.4
XRES/INT Selection Jumper (JP4)
Figure 4-6. XRES/INT Selection Jumper
Pin 3 of JP4 served as XRES signal or INT signal. JP4 selects which PSoC pin is connected to pin 3
of the ISSP/I2C header J3. Short pin 1 and pin 2 of JP4 to connect the PSoC XRES pin to pin 3 of
the ISSP/I2C header. Short pin 2 and pin 3 of JP4 to connect PSoC pin P1[5] (used as an interrupt)
to pin 3 of the ISSP/I2C header.
4.2.5
External 9-V Battery Power Connector (BH1)
The 9-V battery can be directly connected to this connector to power the board.
4.2.6
SPI/I2C Interface (J1)
Figure 4-7. SPI/I2C Interface
This interface is for debug via I2C/SPI. The components for enabling the interface are not populated
by default. To use this interface, populate the resistors of R29, R31, R35, and R38 (refer to Appendix
A.1 Schematics for schematic and resistor details). R51 to R54 are the pull-up resistors for the
signal. Populate these as necessary for your system’s requirement, depending on whether it is I2C
or SPI.
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Hardware Design
4.2.7
RS-232 Interface (J2)
Figure 4-8. RS-232 Interface
J2 connector is the RS-232 interface. If this interface is selected, resistors of R76 and R77 must be
populated. Configure P1[5] to the TX of UART and P1[7] to the RX of UART in the interconnection
window of PSoC Designer 5.2.
4.2.8
ISSP/I2CUSB Interface (J3)
Figure 4-9. ISSP/I2CUSB Interface
Connector J3 is the ISSP/I2CUSB interface. MiniProg can be connected to this connector for new
code programming.
Table 4-2. Signal Assignment
Pin Number
28
Signals
1
5V VCC
2
GND
3
XRES/INT
4
SCLK
5
SDATA
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Hardware Design
4.2.9
ICE Interface (J4)
Figure 4-10. ICE Interface
CY3280-22x45 Universal CapSense Controller Board has an interface for in-circuit debugging.
Connect the ICE-Cube to J4. Then the PSoC Designer debugger provides in-circuit emulation
support that allows you to test the project in a hardware environment when viewing and debugging
device activity in a software environment.
4.2.10
External Power Supply Interface (J5)
J5 connector is the power supply interface. DC power supply between 9~12V is acceptable. The
power on LED D1 lights up when power is applied.
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Hardware Design
4.2.11
CY3280-SLM Board Connector (J6)
Figure 4-11. CY3280-SLM Board Connector
J6 is the connector for this board connecting with CY3280-SLM Universal CapSense Linear Slider
Controller Module. The CY3280-SLM Universal CapSense Linear Slider Controller Module is used
for CapSense demonstration. R66, R67, and R7 are not populated as default. The following table
lists the pin use when these two boards are connected.
Table 4-3. Pin Usage
Pin
30
Port of PSoC
Description
1
P0[6]
Connect to Slider9 of CY3280-SLM Board
2
P0[4]
Connect to Slider8 of CY3280-SLM Board
3
P0[2]
Connect to Slider7 of CY3280-SLM Board
4
P0[0]
Connect to AnalogOut of CY3280-SLM Board
5
GND
Ground
6
GND
Ground
7
P2[6]
Connect to Slider6 of CY3280-SLM Board
8
P2[4]
Connect to Slider5 of CY3280-SLM Board
9
P2[2]
Connect to Slider4 of CY3280-SLM Board
10
P2[0]
Connect to Slider3 of CY3280-SLM Board
11
P3[2]
Connect to Slider2 of CY3280-SLM Board
12
P3[0]
Connect to Slider1 of CY3280-SLM Board
13
P3[1]
Connect to Button5 of CY3280-SLM Board
14
P1[4]
Connect to Slider10 of CY3280-SLM Board
15
GND
Ground
16
GND
Ground
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Hardware Design
Table 4-3. Pin Usage (continued)
Pin
Port of PSoC
Description
17
P1[2]
Connect to LED1 of CY3280-SLM Board
18
NC
N/A
19
NC
N/A
20
P1[3]
Connect to Button4 of CY3280-SLM Board
21
P1[5]
N/A
22
P1[7]
N/A
23
NC
N/A
24
P3[3]
Connect to Button3 of CY3280-SLM Board
25
GND
Ground
26
GND
Ground
27
P2[1]
Connect to Button2 of CY3280-SLM Board
28
P2[3]
Connect to Button1 of CY3280-SLM Board
29
P2[5]
Connect to LED5 of CY3280-SLM Board
30
P2[7]
Connect to LED4 of CY3280-SLM Board
31
P0[1]
Connect to LED3 of CY3280-SLM Board
32
P0[3]
Connect to LED2 of CY3280-SLM Board
33
NC
N/A
34
P1[6]
Connect to ShieldOut of CY3280-SLM Board
35
GND
Ground
36
GND
Ground
37
P1[1]
Connect to SDL of CY3280-SLM Board
38
P1[0]
Connect to SDA of CY3280-SLM Board
39
GND
Ground
40
GND
Ground
41
VCC
PSoC VCC power supply
42
Vadj
Variable power supply
43
Vin
External power supply
44
5V
Fixed 5 V power supply
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Hardware Design
4.2.12
CapSense Plus Module Connector (J7)
Figure 4-12. CapSense Plus Module Connector
The J7 connector can be used to connect the custom CapSense Plus module board such as a temperature sensor. The resistors R68 and R69 are not populated by default. The following table lists
the pin connection on the J7 connector to CY8C22045-24AXI chip.
Table 4-4. Pin Connection
Pin
32
PSoC Port
Description
1
P5[3]
GPIO
2
P5[2]
GPIO
3
P5[1]
GPIO
4
P5[0]
GPIO
5
P0[3]
GPIO
6
P0[2]
GPIO
7
P0[1]
GPIO
8
P0[0]
GPIO
9
GND
Ground
10
GND
Ground
11
P3[7]
GPIO
12
P3[6]
GPIO
13
P3[5]
GPIO
14
P3[4]
GPIO
15
P3[3]
GPIO
16
P3[2]
GPIO
17
P3[1]
GPIO
18
P3[0]
GPIO
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Hardware Design
Table 4-4. Pin Connection (continued)
Pin
4.3
PSoC Port
Description
19
GND
Ground
20
GND
Ground
21
P4[7]
GPIO
22
P4[6]
GPIO
23
P4[5]
GPIO
24
P4[4]
GPIO
25
P4[3]
GPIO
26
P4[2]
GPIO
27
P4[1]
GPIO
28
P4[0]
GPIO
29
GND
Ground
30
GND
Ground
31
NC
GPIO
32
NC
GPIO
33
P1[1]
GPIO
34
P1[0]
GPIO
35
GND
Ground
36
GND
Ground
37
VCC
PSoC VCC power supply
38
Vadj
Variable power supply
39
Vin
External power supply
40
5V
Fixed 5 V power supply
Test Point and Description
Table 4-5. Test Points
Board ID
Description
TP1
External Clock Input
TP2, TP7
Power Supply of Vin
TP3, TP8
Power Supply of 5 V
TP4, TP9
Power Supply of VCC
TP5, TP10
Power Supply of Vadj
TP6, TP11
Ground
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Hardware Design
Note: Intentionally left blank.
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5.
5.1
Code Examples
Create a CapSense Project Using PSoC Designer
This code example describes the steps to create a PSoC Designer project. At the end of the code
example, you can touch a button on the board and see the corresponding LED light up. For details
on basic CapSense working, refer to Getting Started with CapSense. The completed code example
is available in the following location:
<Installed directory>\CY3280-22X45\1.0\Firmware\CY3280_22X45_SLM.
The CY3280_22x45_SLM folder can be copied and placed in the user directory. Make certain to disable the "read/write" permissions for the entire folder.
5.1.1
Flowchart
Start
Set RAM buffer
and start I2C User
Module
Enable Global
Interrupts
Start I2C,CSD User Module,
Initialize Baseline and Set
finger threshold
Scan all buttons and update
baseline of each sensor
Is any capsense
button active
NO
LED
remains Off
YES
LED lights
up
5.1.2
Create New Project
1. Open PSoC Designer.
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Code Examples
2. Select File > New Project and name the project MyProject, as shown in Figure 5-1.
3. To save the project in a different location, click Browse and navigate to the desired directory.
Figure 5-1. New Project
4. In the Target Device option, choose CY8C22545-24AXI from the drop-down menu, as shown in
Figure 5-1.
5. In the Generate 'Main' file using: section, select C. Click OK.
6. By default, the project opens in Chip view, as shown in Figure 5-2.
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Code Examples
Figure 5-2. Default View
5.1.2.1
Add CSD2X, LED, and EzI2Cs User Module to Your Design
1. In the User Module window, expand the Cap Sensors folder.
Figure 5-3. Cap Sensors Folder
2. Double-click CSD2X or right-click CSD2X and select Place, as shown in Figure 5-4.
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Code Examples
Figure 5-4. User Modules Window-CSD Select
3. In the Choose a CSD2X Configuration dialog, select Dual-channel with IDAC Configuration.
4. Click OK; see Figure 5-5.
Figure 5-5. CSD2X Configuration Dialog
5. Expand the Digital Comm folder and place the EzI2Cs user module; to do this, double-click
EzI2Cs or right-click EzI2Cs and select Place, as shown Figure 5-6.
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Code Examples
Figure 5-6. User Module Window-EzI2Cs Select
6. Expand Misc Digital folder and place the LED user module; to do this, double-click LED or rightclick LED and select Place, as shown in Figure 5-7.
Figure 5-7. LED User Module
7. Repeat the previous step, until you see five LEDs in your Workspace Explorer window, as shown
in Figure 5-8.
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Code Examples
Figure 5-8. Workspace Explorer Window
8. All seven selected user modules are displayed in the Workspace Explorer window.
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Code Examples
5.1.2.2
Configure LED and EzI2Cs User Modules
1. Select the LED_1 user module in the Workspace Explorer window, as shown in Figure 5-9.
Figure 5-9. LED_1 Properties
2. In the Properties - LED_1 window, set Port as Port_2, Pin as Port_2_5, and Drive as Active
Low, as shown in Figure 5-10.
Figure 5-10. LED_1 Properties Window
3. Similarly, select the LED_2, LED_3, LED_4, and LED_5 user modules in the Workspace
Explorer window.
4. Set the Port, Pin, and Drive values, as shown in Table 5-1.
Table 5-1. User Module Configuration
User Module
Port
Pin
Drive
LED_1
Port_2
Port_2_5
Active Low
LED_2
Port_2
Port_2_7
Active Low
LED_3
Port_0
Port_0_1
Active Low
LED_4
Port_0
Port_0_3
Active Low
LED_5
Port_1
Port_1_2
Active Low
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Code Examples
5. Select the EzI2Cs_1 user module in the Workspace Explorer window. Set the following:
■
Slave Addr to ‘67’
■
Address_Type to ‘Static’
■
ROM_Registers to ‘Disable’
■
I2C Clock to ‘100K Standard’
■
I2C Pin to “P[1]0-P[1]1”
Figure 5-11. EzI2Cs_1 Properties Window
5.1.2.3
Configure Sensor CSD2X User Module
1. Right-click the CSD2X_1 user module and select CSD2X Wizard, as shown in Figure 5-12.
Figure 5-12. Selecting CSD2X Wizard
2. In the CapSense Wizard, set the following Global Settings parameters; see Figure 5-14
Buttons to ‘5’.
Sliders to ‘1’.
Left Shield Electrode Output to ‘GO0[6] to P1[6]’.
Right Shield Electrode Output to ‘disabled’.
3. In the CapSense wizard, click on any slider element on the right pane and set the following in the
Sensor settings parameters window (see Figure 5-15):
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Code Examples
Diplex to 'False'
Resolution to '50'
Sensor count to '10'
Figure 5-13. CapSense Wizard - Sensor Settings
Figure 5-14. CapSense Wizard
4. To assign the sensor on a particular pin, click and drag from the sensor block to the required pin
in the Pin Assignment window. For example, drag and drop SW0 to pin P3[1]. Sensor pin assign-
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Code Examples
ment can be done in Chip Pin Assignment View (Figure 5-15) or Table Pin Assignment View
(Figure 5-16).
Figure 5-15. Chip Pin Assignment View
Figure 5-16. Table Pin Assignment View
5. Assign the switches to the corresponding pin numbers listed in Table 5-2 and then click OK.
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Code Examples
Table 5-2. Button Assignment
Buttons
Pins
SW0
P3[1]
SW1
P1[3]
SW2
P3[3]
SW3
P2[1]
SW4
P2[3]
Table 5-3. Slider Segment
Slider Segments
Pins
S1(0)
P1[4]
S1(1)
P0[6]
S1(2)
P0[4]
S1(3)
P0[2]
S1(4)
P2[6]
S1(5)
P2[4]
S1(6)
P2[2]
S1(7)
P2[0]
S1(8)
P3[2]
S1(9)
P3[0]
6. Select CSD2X_1 from the Workspace Explorer window. In the Properties window of CSD2X_1,
set the values as in Figure 5-17, it shows all the parameters of CSD2X_1.
Figure 5-17. CSD2X_1 Properties Window
7. Configure the Global Resource window, as shown in Figure 5-18.
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Code Examples
Figure 5-18. Global Resources
8. Update the main.c content (Workspace Explorer > MyProject > Source Files > main.c) with
the contents of 'main.c' present in the example project (<Installed Directory>\CY328022x45\1.0\Firmware\CY3280_22x45_SLM) of this user guide and select Build Generate/
Build 'MyProject' Project.
9. Verify that the compile finishes with no errors in the Output Tab (View > Output).
5.1.3
Program CY3280-22x45 Board
1. Connect the CY3280-22x 45 board to the PC using a MiniProg1.
Figure 5-19. Connect MiniProg1 to Board
2. In PSoC Designer, select Program > Program Part. In the PSoC Programmer application, set
parameters as shown in Table 5-4.
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Code Examples
Table 5-4. Settings in Program Part Window
Parameter
Value
Acquire Mode
Power Cycle
Verification
On
Power settings
5.0 V
3. From the Port menu, select MiniProg1/<Identification Code> and click the Toggle Power button, to power the board from the MiniProg, as shown in Figure 5-20.
Figure 5-20. Program Part Dialog
Toggle Power
File Load
4. Click the File Load button. “Operation Succeeded...” appears in the Actions pane when programming is complete, as shown in Figure 5-21.
Figure 5-21. Program Part Dialog after Programming
Programming Succeeded
Board is not powered by MiniProg
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Code Examples
5.1.4
Test the Board
1. Click the Toggle Device Power button in the Program Part dialog.
2. Touch one or more buttons with your finger. The associated LEDs light up corresponding to the
buttons being pressed.
3. Click the Toggle Device Power button and close PSoC Programmer.
4. Return to PSoC Designer and select File > Save Project.
Refer to AN2397 - CapSense® Data Viewing Tools for debugging the device through I2C.
5.1.5
Reading CapSense Data over I2C
1. Connect your computer to the CY3280-22x45 Universal CapSense Controller board's ISSP connector J3 using I2C-USB bridge and a USB cable.
2. Go to Start > Cypress > Open Bridge Control Panel.
Note Bridge Control Panel is installed as part of the PSoC Programmer installation process.
3. Select the device from the Connected I2C/SPI-USB converters: window and click on the
Connect/Disconnect button.
4. Power the CY3280-22x45 CapSense Controller board at 5 V.
5. Select File > Open. Load the CY3280-22x45.iic file from <Installed directory>\CY328022X45\1.0\Firmware\CY3280_22X45_SLM.
Figure 5-22. I2C Commands
6. Select Chart > Variable Settings and enter the variable as shown in Figure 5-23.
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Code Examples
Figure 5-23. Variable Settings
7. Sample data read: Reading raw count of BTN0:
a. Send I2C write instruction W 43 00 00 once.
b. Press the Repeat button to send the following I2C read instruction continuously
R 43 @1RawCount @0RawCount
a. Go to the Chart tab to view raw count of BTN0.
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A.
Appendix
A.1
Schematics
VCC
Place test points next to connector P2.
Place test points near edge of board.
U1
CY8C22X45 OCD
Vin
While Using External Crystal,
Do Not Plug Mini Programmer.
Vin
1
2
R55
No Load
C2
0.01uF
RV2
10K
Place close to connector.
R24
R25
R26
R27
Vdd
44
13
45
12
46
11
P4[0]
P4[1]
P4[2]
P4[3]
P4[4]
P4[5]
R22
100ohm
41
XRES
14
15
42
43
OCDE
OCDO
HCLK
CCLK
47ohm
47ohm
47ohm
47ohm
NC10
NC9
NC8
NC7
NC6
NC5
NC4
NC3
NC2
NC1
NC0
47
25
36
35
30
29
22
21
16
10
1
R34
R36
R37
300ohm
0ohm
300ohm
P1[0]
R29
P1[1]
R31
P1[2]
P1[3]
P1[4]Select
P1[5]
R35
P1[6]
P1[7]
R38
R39
R40
R41
R42
R43
R44
R45
R46
560ohm
560ohm
560ohm
560ohm
560ohm
560ohm
560ohm
560ohm
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
R71
560ohm
P4[6]
R75
R74
560ohm
560ohm
P5[2]
P5[0]
R73
R72
560ohm
560ohm
P5[1]
P5[3]
R70
560ohm
P4[7]
0ohm
0ohm
P1[0]b
P1[1]b
R47
560ohm
P1[5]b
0ohm
P1[7]b
TP10
Testpoint
TP8 Testpoint
TP11
Testpoint
+5V
TP1
R48
TP6 Testpoint
VCC
0ohm
VCC
TP4 Testpoint
TP9 Testpoint
EXTCLK
P1[4] Selection Notes:
1. Keep resistors as close
together as possible and close
to PSoC to avoid long stubs.
2. Install only R47 for use in
CapSense applications.
3. Install only R48 for use as
external clock source.
DO NOT POPULATE - PROBE POINTS
VCC
VCC
VCC
VCC
DO NOT POPULATE
+5V
U2
LP3875ES-ADJ SOT223-5
2
Vss
1
SOT-223
VIN
nSD
VOUT
3
ADJ
4
Vadj
RegAdj
R58
J1
1
2
3
4
5
6
P1[0]b
P1[1]b
P1[5]b
P1[7]b
3.9K
C4
VCC
1uF
1
2
3
4
5
6
SPI/I2C
6 Pins Header
5
P0[7]
JP2
28
NOTE: Place all resistors close to PSoC
P1[4]
TP3 Testpoint
0ohm
Vadj
TP7 Testpoint
+5V
56K
560ohm
560ohm
560ohm
560ohm
560ohm
560ohm
37
20
38
19
39
18
40
17
100ohm
100ohm
560ohm
560ohm
R54
R16
R17
R18
R19
R20
R21
P3[0]
P3[1]
P3[2]
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
R28
R30
R32
R33
56K
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
P1[0]a
P1[1]a
R53
XRES
48
9
49
8
50
7
51
6
31
27
32
26
33
24
34
23
56K
P4[0]
P4[1]
P4[2]
P4[3]
P4[4]
P4[5]
560ohm
560ohm
560ohm
560ohm
560ohm
560ohm
560ohm
560ohm
P1[0]
P1[1]
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
P1[7]
56K
560ohm
R8
R9
R10
R11
R12
R13
R14
R15
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
R52
R6
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
52
5
53
4
54
3
55
2
R51
560ohm
560ohm
560ohm
560ohm
560ohm
CMOD
1
2
HDR 2X1
OCDE
OCDO
HCLK
CCLK
R1
R2
R3
R4
R5
TP5 Testpoint
Note: Default Use R47
R48 Do Not Populate
GND
JP1
P0[0]
P0[1]
P0[2]
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
Vadj
TP2 Testpoint
56
C1 0.1uF
HEADER
CMOD
1
2
1
2
C3
+ CT1
10uF 25V 10%
R56
0.01uF
Note: Default Do Not Populate
R29, R31,R35,R38,R66,
R67,R76,R68,R69.
+ CT2
10uF 25V 10%
No Load
R57
HDR 2X1
5.1K
RV3
+5V
VCC
Vadj
JP3
RV1
1
2
3
10K
10K
1
2
3
HDR 3X1
R23
C11
1.5K
0.1uF
C12
0.1uF
C13
0.1uF
VCC
NOTE: DEFAULT JUMPER PIN 2 TO 3
U4
J4
1
3
C1+
C1-
V+
V-
4
5
C2+
C2-
Vcc
GND
16
15
T1OUT
T2OUT
14
7
P1[5]
R76
0ohm
TX
11
10
P1[7]
R77
0ohm
RX
12
9
T1IN
T2IN
R1OUT
R2OUT
R1IN
R2IN
2
6
P1[0]a
0.1uF
P1[1]a
0.1uF
C10
G1
G2
C9
CCLK
R49
1
13
8
R50
C8
6
RX
2
TX
3
0ohm
OCDE
0ohm
0.1uF
NG2
RJ45 Right Angle
J3
R65
1K
1K
1K
1
2
3
R64
22pF
P1[1]
P1[0]
1
2
3
1K
C7
XRES
XRES/INT
P1[5]b
R63
32.768KHz
JP4
1
2
3
4
5
R62
5
C6
ICE
1
2
3
4
5
9
J2
CON_DB9F
NG1
330pF
1K
Y1
8
UART to PC
+5V
ISSP / I2C
7
4
MAX3232EEAE
OCDO
R61
C5
1
2
3
4
5
6
7
8
HCLK
XRES
VCC
HDR 3X1
5 Pins Header
22pF
NOTE: DEFAULT JUMPER PIN 1 TO 2
VCC
VCC
DO NOT POPULATE
DO NOT POPULATE
BH1
BAT 9V Holders
POS1 1
POS2 2
POS3 3
D3
2
SOD123
VCC
+5V
P1[0]
D4
1
R59
R60
1K
1K
SOD123
P0[1]
P2[5]
P2[1]
3
1
SOT-223
VIN
VOUT
2
+ CT4
10uF 25V 10%
1
D1
D2
P1[5]
LED Red
LED Red
P1[2]
0805
0805
+ CT3
10uF 25V 10%
2
SOD123
MBR0520L
2
2
GND
D5
1
3
2
POWER JACK P-5
1
J5
+5V
1
U3
LM1117MPX-5.0
R66
SDA
2
MBR0520L
Vin
6V-12V
Vin
J6
+5V
CY3280-CPM1 Board Connector
Vadj
VCC
Vin
J7
+5V
Vadj
VCC
4
5
6
NEG1
NEG2
NEG3
CapSense Plus Connector
CY3280-SLM Board Connector
1
MBR0520L
P3[1]
P3[2]
P2[2]
P2[6]
P0[2]
P0[6]
43
41
39
0ohm
37
35
NC 33
31
29
27
25
NC 23
21
NC 19
17
15
13
11
9
7
5
3
1
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
R67
0ohm
P1[1]
SCL
P1[6]
P0[3]
P2[7]
P2[3]
P3[3]
P1[7]
P1[3]
0ohm
NC
P3[1]
P3[3]
P3[5]
P3[7]
P1[4]
P3[0]
P2[0]
P2[4]
0ohm
P0[4]
R68
P4[1]
P4[3]
P4[5]
P4[7]
NC
R7
P1[0]
SDA
P0[1]
P0[3]
P5[1]
P5[3]
P0[0]
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
R69
0ohm
NC
P1[1]
SCL
P4[0]
P4[2]
P4[4]
P4[6]
P3[0]
P3[2]
P3[4]
P3[6]
P0[0]
P0[2]
P5[0]
P5[2]
20x2_RA_Recptacle
22x2_RA_Recptacle
CY3280-22x45 Universal CapSense® Controller Development Kit Guide, Doc. # 001-51921 Rev. *H
51
Appendix
A.2
52
Top Silk Screen
CY3280-22x45 Universal CapSense® Controller Development Kit Guide, Doc. # 001-51921 Rev. *H
Appendix
A.3
Bill of Materials (BOM)
Item Qty
Reference
Description
1
1 BH1
BAT 9V Holders
2
4 CT1,CT2,CT3,CT4 CAP TANTALUM 10UF 25V 10% SMD
C1,C5,C9,C10,C1
3
7
CAP CER 0.10UF 25V X7R 10% 0603
1,C12,C13
CAP CER 10000PF 25V C0G 5%
4
2 C2,C3
0603
5
1 C4
CAP CER 1.0UF 25V X7R 10% 0805
6
2 C6,C7
CAP CER 22PF 100V NP0 10% 0603
7
1
C8
CAP CER 330PF 50V X7R 10% 0603
8
2
D1,D2
9
3
D3,D4,D5
LED RED 635NM DIFF LENS 0805
DIODE SCHOTTKY 20V 0.5A
SOD123
10
2
JP1,JP2
11
2
JP3,JP4
12
1
J1
13
1
J2
14
1
J3
15
1
J4
16
1
J5
17
1
J6
18
1
J7
19
3
20
37
21
5
22
10
23
24
25
26
27
28
3
1
4
2
4
2
RV1,RV2,RV3
R1,R2,R3,R4,R5,R
6,R8,R9,R10,R11,
R12,R13,R14,R15,
R16,R17,R18,R19,
R20,R21,R32,R33,
R39,R40,R41,R42,
R43,R44,R45,R46,
R47,R70,R71,R72,
R73,R74,R75
R36,R49,R50,R76,
R77
R7,R29,R31,R35,
R38,R48,R66,R67,
R68,R69
R22,R28,R30
R23
R24,R25,R26,R27
R34,R37
R51,R52,R53,R54
R55,R56
Manufacturer
N/A
AVX Corporation
Mfr Part Number
N/A
TAJC106K025R
AVX Corporation
06033C104KAT2A
TDK Corporation
C1608C0G1E103J
TDK Corporation
AVX Corporation
Murata Electronics North
America
Sharp Microelectronics
C2012X7R1E105K
06031A220KAT2A
GRM188R71H331K
A01D
LT1D40A
ON Semiconductor
MBR0520LT1G
Molex Connector Corpora90120-0122
tion
Molex Connector CorporaCONN HEADER 3POS .100" STR TIN
90120-0123
tion
CONN HEADER 6POS .100" STR TIN N/A
N/A
CONN DSUB RCPT 9POS R/A PCB
FCI
D09S13A4GL00LF
SLD DB9F
CONN HEADER 5POS .100 VERT
Molex Connector Corpora22-23-2051
TIN
tion
RJ45 CONN MOD JACK 8-8 RT/A
Tyco Electronics
5557785-1
PCB 50AU
CONN JACK POWER 2.1MM PCB
CUI Inc
PJ-102A
CONN FEMALE 44POS DL .1" R/A
Sullins Connector SoluPPTC222LJBN-RC
TIN
tions
CONN FEMALE 40POS DL .1" R/A
Sullins Connector SoluPPTC202LJBN-RC
TIN
tions
POT 10K OHM 3/8" SQ CERM SL MT Bourns Inc.
3296W-1-103LF
CONN HEADER 2POS .100" STR TIN
RES 560 OHM 1/10W 5% 0603 SMD
Panasonic - ECG
ERJ-3GEYJ561V
RES ZERO OHM 1/10W 5% 0603
SMD
Panasonic - ECG
ERJ-3GEY0R00V
RES ZERO OHM 1/10W 5% 0603
SMD
Panasonic - ECG
ERJ-3GEY0R00V
RES 100 OHM 1/10W 5% 0603 SMD
RES 1.5K OHM 1/10W 5% 0603 SMD
RES 47 OHM 1/10W 5% 0603 SMD
RES 300 OHM 1/10W 5% 0603 SMD
RES 56K OHM 1/10W 5% 0603 SMD
N/A
Panasonic - ECG
Panasonic - ECG
Panasonic - ECG
Panasonic - ECG
Panasonic - ECG
N/A
ERJ-3GEYJ101V
ERJ-3GEYJ152V
ERJ-3GEYJ470V
ERJ-3GEYJ301V
ERJ-3GEYJ563V
N/A
CY3280-22x45 Universal CapSense® Controller Development Kit Guide, Doc. # 001-51921 Rev. *H
53
Appendix
Item Qty
Reference
29
1 R57
30
1 R58
R59,R60,R61,R62,
31
7
R63,R64,R65
TP1,TP2,TP3,TP4,
TP5,TP6,TP7,TP8,
32
11 TP9,
Description
Manufacturer
RES 5.1K OHM 1/10W 5% 0603 SMD Panasonic - ECG
RES 3.9K OHM 1/10W 5% 0603 SMD Panasonic - ECG
Mfr Part Number
ERJ-3GEYJ512V
ERJ-3GEYJ392V
RES 1.0K OHM 1/10W 5% 0603 SMD Panasonic - ECG
ERJ-3GEYJ102V
TEST POINT PC MINI .040"D BLACK Keystone Electronics
5001
TP10,TP11
33
1
U1
34
1
U2
35
1
U3
PSoC
36
1 U4
37
1 Y1
Special Installation
38
4
39
A.4
4
Cypress Semiconductor
Corp.
CY8C22045-24PVXI
LP3875EMP-ADJ/
NOPB
LM1117MPX-5.0/
IC REG LDO 800MA 5.0V SOT-223
National Semiconductor
NOPB
IC TXRX RS232 1MBPS LP 16-SSOP Maxim Integrated Products MAX3232EEAE+
CRYSTAL 32.768KHZ CYL
ECS Inc.
ECS-3X8
IC REG LDO 1.5A ADJ SOT223-5
National Semiconductor
BUMPER CLEAR .440X.20" DOME
JUMPER, CONN JUMPER SHORTING TIN
Richco Plastic Co
RBS-2
Sullins Electronics Corp
STC02SYAN
Regulatory Compliance Information
CY3280-22x45 has been tested and verified to comply with the following electromagnetic compatibility (EMC) regulations.
54
■
EN 55022:2006+A1:2007 (Class A)- Emissions
■
EN 55024:1998+A1: 2001+A2: 2003- Immunity
CY3280-22x45 Universal CapSense® Controller Development Kit Guide, Doc. # 001-51921 Rev. *H
Revision History
Document Revision History
Document Title: CY3280-22x45 Universal CapSense® Controller Development Kit Guide
Document Number: 001-51921
Revision
ECN#
Issue Date
Origin of
Change
Description of Change
**
2689499
3/23/09
JPLU /
AESA
New kit guide
*A
2697173
4/23/09
JPLU /
AESA
Changed board name
*B
3210194
3/30/11
JIAO
Updated BOM; other minor content updates
*C
3583105
04/13/12
PAVA
Reorganized content to include Kit Operation and Code Examples chapter. Extensive content
updates throughout the document.
*D
3670320
07/09/2012
MSUR /
SGUP
Major content updates and updated figures.
*E
3698958
08/08/2012
MSUR
*F
3947411
04/04/2013
RJVB /
MSUR
*G
4390824
05/27/2014
ZHAO
*H
4506883
09/19/2014
DIMA
Minor content updates based on OOB feedback.
Added Safety Information chapter on page 5 and A.4 Regulatory Compliance Information
Updated Kit Installation Code Example screenshots for PSoC Designer 5.3.
Updated in new template.
Completing Sunset Review.
Updated the kit code example to PSoC Designer 5.4
Updated the user guide with latest installer images and the PSoC Designer content.
Distribution: External
Posting: None
CY3280-22x45 Universal CapSense® Controller Development Kit Guide, Doc. # 001-51921 Rev. *H
55