INFINEON Q62702

Silicon N Channel MOSFET Triode
●
BF 999
For high-frequency stages up to 300 MHz,
preferably in FM applications
Type
Marking
Ordering Code
(tape and reel)
Pin Configuration
1
2
3
Package1)
BF 999
LB
Q62702-F1132
G
SOT-23
D
S
Maximum Ratings
Parameter
Symbol
Values
Unit
Drain-source voltage
VDS
20
V
Drain current
ID
30
mA
Gate-source peak current
±
10
Total power dissipation, TA ≤ 60 ˚C
Ptot
200
Storage temperature range
Tstg
– 55 … + 150 ˚C
Channel temperature
Tch
150
Rth JA
≤
IGSM
mW
Thermal Resistance
Junction - ambient 2)
1)
2)
450
K/W
For detailed information see chapter Package Outlines.
Package mounted on alumina 15 mm × 16.7 mm × 0.7 mm.
Semiconductor Group
1
07.94
BF 999
Electrical Characteristics
at TA = 25 ˚C, unless otherwise specified.
Parameter
Values
Symbol
Unit
min.
typ.
max.
DC Characteristics
Drain-source breakdown voltage
ID = 10 µA, – VGS = 4 V
V(BR) DS
20
–
–
V
Gate-source breakdown voltage
± IGS = 10 mA, VDS = 0
±
V(BR) GSS
6.5
–
12
Gate-source leakage current
VGS = 5 V, VDS = 0
±
IGSS
–
–
50
nA
Drain current
VDS = 10 V, VGS = 0
IDSS
5
–
18
mA
Gate-source pinch-off voltage
VDS = 10 V, ID = 20 µA
– VGS (p)
–
–
2.5
V
Forward transconductance
VDS = 10 V, ID = 10 mA, f = 1 kHz
gfs
14
16
–
mS
Gate input capacitance
VDS = 10 V, ID = 10 mA, f = 1 MHz
Cgss
–
2.5
–
pF
Reverse transfer capacitance
VDS = 10 V, ID = 10 mA, f = 1 MHz
Cdg
–
25
–
fF
Output capacitance
VDS = 10 V, ID = 10 mA, f = 1 MHz
Cdss
–
1
–
pF
Power gain
(test circuit)
VDS = 10 V, ID = 10 mA, f = 200 MHz,
GG = 2 mS, GL = 0.5 mS
Gp
–
25
–
dB
Noise figure (test circuit)
VDS = 10 V, ID = 10 mA, f = 200 MHz,
GG = 2 mS, GL = 0.5 mS
F
–
1
–
±
AC Characteristics
Semiconductor Group
2
BF 999
Total power dissipation Ptot = f (TA)
Output characteristics ID = f (VDS)
Gate transconductance gfs = f (VGS)
VDS = 10 V, IDSS = 10 mA, f = 1 kHz
Drain current ID = f (VGS)
VDS = 10 V
Semiconductor Group
3
BF 999
Gate input capacitance Cgss = f (VGS)
VDS = 10 V, IDSS = 10 mA, f = 1 MHz
Output capacitance Cdss = f (VDS)
VGS = 0, IDSS = 10 mA, f = 1 MHz
Reverse transfer capacitance
C dg = f (VDS)
IDSS = 10 mA, f = 1 MHz, VGS = 0
Gate input admittance y11s
VDS = 10 V, VGS = 0,
IDSS = 10 mA, (common-source)
Semiconductor Group
4
BF 999
Gate forward transfer admittance y21s
VDS = 10 V, VGS = 0,
IDSS = 10 mA, (common-source)
Output admittance y22s
VDS = 10 V, VGS = 0,
IDSS = 10 mA, (common-source)
Test circuit for power gain and noise figure
f = 200 MHz
Semiconductor Group
5