BF543 Silicon N-Channel MOSFET Triode 3 For high-frequency stages up to 300 MHz preferably in FM applications IDSS = 4mA, g fs = 12mS 2 1 VPS05161 ESD: Electrostatic discharge sensitive device, observe handling precaution! Type Marking BF543 LDs Pin Configuration 1=G 2=D Package 3=S SOT23 Maximum Ratings Parameter Symbol Drain-source voltage VDS 20 V Drain current ID 30 mA Gate-source peak current IGSM 10 Total power dissipation, TS 76 °C Ptot 200 Storage temperature Tstg -55 ... 150 Ambient temperature range TA -55 ... 150 Channel temperature Tch 150 Value Unit mW °C Thermal Resistance Channel - soldering point1) Rthchs 370 K/W 1For calculation of R thJA please refer to Application Note Thermal Resistance 1 Jun-28-2001 BF543 Electrical Characteristics at TA = 25 °C, unless otherwise specified. Parameter Symbol Values Unit min. typ. max. V(BR)DS 20 - - V(BR)GSS 7 - 12 IGSS - - 50 nA IDSS 2 4 6 mA - VGS (p) - 0.7 1.5 9.5 12 - mS Cgss - 2.7 - pF Cdg - 18 - fF Cdss - 0.9 - pF Gp - 22 - dB F - 1 - DC characteristics Drain-source breakdown voltage V ID = 10 µA, - VGS = 4 V Gate-source breakdown voltage IGS = 10 mA, VDS = 0 Gate-source leakage current VGS = 6 V, VDS = 0 Drain current VDS = 10 V, VGS = 0 Gate-source pinch-off voltage V VDS = 10 V, ID = 20 µA AC characteristics Forward tranconductance gfs VDS = 10 V, I D = 4 mA Gate input capacitance VDS = 10 V, I D = 4 mA, f = 1 MHz Reverse tranfer capacitance VDS = 10 V, I D = 4 mA, f = 1 MHz Output capacitance VDS = 10 V, I D = 4 mA, f = 1 MHz Power gain (test circuit) GG = 2mS, GL = 0,5 mS VDS = 10 V, I D = 4 mA, f = 200 MHz Noise figure (test circuit) GG = 2mS, GL = 0,5 mS VDS = 10 V, I D = 4 mA, f = 200 MHz 2 Jun-28-2001 BF543 Output characteristics ID = f (VDS) Total power dissipation Ptot = f(TS) 10 300 ΙD mW BF 543 EHT07026 VGS = 0.4 V mA P tot 8 0.2 V 200 6 150 0V 4 100 -0.2 V 2 50 -0.4 V 0 0 20 40 60 80 100 120 °C 0 150 0 10 V TS V DS Gate transconductance gfs = f (VGS) Drain current ID = f (VGS) VDS = 10, IDSS = 4mA, f = 1kHz VDS = 10V 15 g fs BF 543 20 EHT07027 10 BF 543 EHT07028 Ι D mA mS 8 10 6 4 5 2 0 -0.1 0 V 0 -0.1 0.1 VGS 0 V 0.1 VGS 3 Jun-28-2001 BF543 Gate input capacitance Cgss = f (VGS ) Output capacitance C dss = f (V DS) VDS = 10, IDSS = 4mA, f = 1MHz VGS = 0, IDSS = 4mA, f = 1MHz BF 543 5 EHT07029 BF 543 5 Cgss pF Cdss pF 4 4 3 3 2 2 1 1 0 -0.1 0 V 0 0.1 EHT07030 0 5 10 VGS Gate input admittance y 11s Cdg = f (VDS) VDS = 10, IDSS = 4mA, V GS = 0 VGS = 0, IDSS = 4mA, f = 1MHz (source circuit) Cdg BF 543 15 VDS Reverse transfer capacitance 50 V EHT07031 15 b 11s fF BF 543 EHT07032 mS f = 800 MHz 40 700 MHz 10 600 MHz 30 500 MHz 400 MHz 20 5 300 MHz 200 MHz 10 100 MHz 50 MHz 0 0 5 10 V 0 15 0 0.1 0.2 0.3 0.4 mS 0.5 g 11s VDS 4 Jun-28-2001 BF543 Gate forward transfer admittance y21s Output admittance y 22s VDS = 10V, IDSS = 4mA, VGS = 0 (source circuit) VDS = 10V, I DSS = 10mA, VGS = 0 0 BF 543 (source circuit) EHT07033 b 21s BF 543 EHT07034 b 22s mS 50 MHz mS 5 f = 800 MHz 4 100 MHz 700 MHz 600 MHz 3 500 MHz 200 MHz -5 400 MHz 2 300 MHz 300 MHz 400 MHz 1 200 MHz 500 MHz 100 MHz 600 MHz -10 700 MHz 0 50 MHz f = 800 MHz 5 10 0 mS 15 g 21s 5 0 0.1 0.2 0.3 0.4 mS 0.5 g 22s Jun-28-2001