ADAU1761 Evaluation Board EVAL-ADAU1761Z PACKAGE CONTENTS EVALUATION BOARD OVERVIEW ADAU1761 evaluation board USBi control interface board USB cable Software CD Evaluation board documentation/quick-start guide This document explains the design and setup of the ADAU1761 evaluation board. The EVAL-ADAU1761Z includes both single-ended and differential stereo line-level analog audio inputs as well as a digital audio interface. Single-ended and differential analog outputs are also provided, as well as a stereo capless headphone output. OTHER SUPPORTING DOCUMENTATION The USBi provides power and the I2C communications interface to the evaluation board. A switch allows the ADAU1761 to operate at either 3.3 V or 1.8 V. The SigmaStudio™ programming software is used for all register controls and SigmaDSP® core programming. ADAU1761 data sheet AN-1007 Application Note, Using the ADAU1761 in DSP Bypass Mode to Emulate an ADAU1361 AN-951 Application Note, Using Hardware Controls with SigmaDSP GPIO Pins SigmaStudio Help (included in software installation) A header is included for interfacing to stereo digital microphones. GPIO functions, such as push-buttons, LEDs, and switches, can be connected to the GPIO pins of the ADAU1761 for hardware control of the SigmaDSP. FUNCTIONAL BLOCK DIAGRAM I2C COMMUNICATIONS INTERFACE (USBi) POWER SUPPLY DIGITAL MIC INPUTS GPIO CONTROLS ANALOG AUDIO OUTPUTS ANALOG AUDIO INPUTS 08055-001 ADAU1761 Figure 1. Rev. 0 Evaluation boards are only intended for device evaluation and not for production purposes. Evaluation boards are supplied “as is” and without warranties of any kind, express, implied, or statutory including, but not limited to, any implied warranty of merchantability or fitness for a particular purpose. No license is granted by implication or otherwise under any patents or other intellectual property by application or use of evaluation boards. Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Analog Devices reserves the right to change devices or specifications at any time without notice. Trademarks and registered trademarks are the property of their respective owners. Evaluation boards are not authorized to be used in life support devices or systems. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. www.analog.com Tel: 781.329.4700 Fax: 781.461.3113 ©2009 Analog Devices, Inc. All rights reserved. EVAL-ADAU1761Z TABLE OF CONTENTS Package Contents .............................................................................. 1 Power...............................................................................................5 Other Supporting Documentation ................................................. 1 Analog Audio Input ......................................................................5 Evaluation Board Overview ............................................................ 1 Analog Audio Output ...................................................................5 Functional Block Diagram .............................................................. 1 Clocking the Evaluation Board ...................................................6 Revision History ............................................................................... 2 External Digital Audio Header ....................................................6 Setting Up the Evaluation Board—Quick Start ............................ 3 Digital Microphone and Jack Detection Input ..........................6 SigmaStudio Software Installation ............................................. 3 I2C Communications Header ......................................................6 Hardware Setup, USBi.................................................................. 3 GPIO Interface Circuit .................................................................7 Powering the Board ...................................................................... 3 Schematics and Artwork ..................................................................8 Connecting Audio Cables ........................................................... 3 Ordering Information .................................................................... 11 Switch and Jumper Settings......................................................... 3 Bill of Materials ........................................................................... 11 Your First SigmaStudio Project—EQ and Volume Control .... 4 Ordering Guide .......................................................................... 12 Using the Evaluation Board............................................................. 5 ESD Caution................................................................................ 12 ADAU1761 SigmaDSP................................................................. 5 REVISION HISTORY 5/09—Revision 0: Initial Version Rev. 0 | Page 2 of 12 EVAL-ADAU1761Z SETTING UP THE EVALUATION BOARD—QUICK START SigmaStudio SOFTWARE INSTALLATION SWITCH AND JUMPER SETTINGS To install the SigmaStudio software, follow these steps: To configure the board for stereo analog input and output, make sure that the switches and jumpers are set as follows (see Figure 2). 1. Open the provided .zip file and extract the files to your PC. Alternately, insert the SigmaStudio CD into the PC optical drive and locate the SigmaStudio folder on the CD. 2. If Microsoft® .NET Framework Version 2.0 is not already installed on the PC, install it by double-clicking dotnetfx.exe. 3. Install SigmaStudio by double-clicking setup.exe and following the prompts. A computer restart is not required. HARDWARE SETUP, USBi • • • • • • The ADAU1761 uses the on-board oscillator as a master clock source (S5 switched to OSC). Regulator output VDD is set for 3.3 V operation (S1 switched to 3.3 V). Power is supplied by USB (J5 is connected with a jumper). AVDD is connected to VDD (J17 connected). IOVDD and AVDD operate at VDD (J16 connected). I2C control mode is hardwired on board. To set up the USBi hardware, follow these steps: 1. Plug the USBi ribbon cable into Header J1. 2. Connect the USB cable to your computer and to the USBi. 3. When prompted for drivers, follow these steps: a) b) c) d) e) f) g) Choose Install from a list or a specific location. Choose Search for the best driver in these locations. Check the box for Include this location in the search. The USBi driver is located in C:\Program Files\ Analog Devices Inc\Sigma Studio\USB drivers. Click Next. If prompted to choose a driver, select CyUSB.sys. If the PC is running Windows® XP and you receive the message that the software has not passed Windows Logo testing, click Continue Anyway. POWERING THE BOARD The board can be powered either by the USBi or by an external power supply. For the board to run independently from the computer, disconnect Jumper J5 and connect the power supply at J2. The power indicator LED D1 should now be lit. 08055-002 CONNECTING AUDIO CABLES In this example, the board is set up for stereo analog inputs and stereo analog outputs, using 3.5 mm (1/8”) cables. 1. Connect the audio source to Input Jack J24. 2. Connect Output Jack J19 to your headphones. Figure 2. Evaluation Board Setup and Configuration Rev. 0 | Page 3 of 12 EVAL-ADAU1761Z YOUR FIRST SigmaStudio PROJECT—EQ AND VOLUME CONTROL 5. Click on the Schematic tab at the top of the screen. 6. In the Tree Toolbox, expand the IO > Input folder. Click and drag an Input cell to the work area. This section provides a sample first project using SigmaStudio. 7. 1. Create a new project. The Hardware Configuration tab will be open. 2. Drag an ADAU176x cell and a USBi cell into the blank work area. 3. Connect the USBi cell to the ADAU176x cell by clicking and dragging from the top blue output pin of the USBi cell to the green input pin of the ADAU176x cell. 08055-003 Your screen should now resemble Figure 3. Expand the Filters > Second Order > Double Precision > 2 Ch folder, then click and drag Medium Size Eq to the work area. 8. Right-click the General (2nd Order) cell labeled Gen Filter1, then click Grow Algorithm > 1. 2 Channel > Single Precision > 4. This creates a five-band EQ. The general filter settings for each band can be modified by clicking the blue boxes on the cell. 9. Expand Volume Controls > Adjustable Gain > Shared Slider > Clickless SW Slew, then click and drag Single slew. 10. Expand the IO > Output folder. Click and drag two Output cells. By default, these cells are set to DAC0 (left channel) and DAC1 (right channel). 11. Connect all the cells as depicted in Figure 5. In the IC1-ADAU1761 Register Controls tab, select the 3 and 4 in, Capless HP Out option from the Automatic Startup list and click Load Preset (see Figure 4). Figure 5. Schematic Tab, Full Design 12. Make sure that your board is powered and connected to the PC. Click Link-Compile-Download in SigmaStudio. 13. If the project compiles with no errors, you will be in ReadyDownload mode (indicated by a green bar across the bottom of the window). Your screen should now resemble Figure 5. 14. Start playing the audio source; you should hear audio on the outputs. You can now move the volume control and filter sliders and hear the effect on the output audio in real time. This locks the PLL and sets up the registers for proper routing of the record and playback paths. 08055-004 4. 08055-005 Figure 3. Hardware Configuration Tab Figure 4. Hardware Configuration Tab—Register Setup Rev. 0 | Page 4 of 12 EVAL-ADAU1761Z USING THE EVALUATION BOARD ADAU1761 SigmaDSP The ADAU1761 is a low power, stereo audio codec with integrated digital audio processing that supports stereo 48 kHz record and playback at 10 mW from a 1.8 V analog supply. The stereo audio ADCs and DACs support sample rates from 8 kHz to 96 kHz as well as a digital volume control. The SigmaDSP core features 28-bit processing (56-bit double precision). The processor allows system designers to compensate for the real-world limitations of microphones, speakers, amplifiers, and listening environments, resulting in a dramatic improvement in the perceived audio quality through equalization, multiband compression, limiting, and third-party branded algorithms. The SigmaStudio graphical development tool is used to program the ADAU1761. This software includes audio processing blocks such as filters, dynamics processors, mixers, and low level DSP functions for fast development of custom signal flows. The record path includes an integrated microphone bias circuit and six inputs. The inputs can be mixed and muxed before the ADC, or they can be configured to bypass the ADC. The ADAU1761 includes a stereo digital microphone input. The ADAU1761 includes five high power output drivers (two differential and three single-ended) that support stereo headphones, an earpiece, or other output transducers. AC-coupled or capless configurations are supported. Individual fine level controls are supported on all analog outputs. The output mixer stage allows for flexible routing of audio. When the ADP3336 is outputting a regulated voltage, LED D1 is illuminated red. VDD is connected to the AVDD pin of the ADAU1761 with Jumper J17. To connect the ADAU1761 IOVDD pin to the same supply, connect J16, also. These headers can also be used to separate the supplies of the ADAU1761 from the rest of the board and to connect an external supply to the ADAU1761. L1 and C24 are connected to the AVDD pin of the ADAU1761 and function as an L-C filter to reject high frequency power supply noise common in GSM mobile applications. This filter is tuned to approximately 1.5 GHz. ANALOG AUDIO INPUT The EVAL-ADAU1761Z has three ac-coupled 1/8” input jacks: two mono differential jacks and one stereo single-ended jack. The tips of the differential input jacks, J20 and J22 (labeled IN 1 and IN 2), are connected to the negative input of the ADAU1761, and the rings are connected to the positive input. The stereo single-ended input on J24 (labeled IN 3) is connected to the LAUX and RAUX inputs of the ADAU1761. IN 1 and IN 2 can also be configured to bias a microphone. This is enabled by connecting the MICBIAS pin of the ADAU1761 to the tip of the input connectors with Jumper J15 and Jumper J18. At VDD = 3.3 V, the full-scale analog input level of the EVAL-ADAU1761Z is 1.0 V rms (1.0 V rms on the single-ended inputs and 0.5 V rms on each of the two pins of the differential inputs). The full-scale input level scales with VDD. POWER ANALOG AUDIO OUTPUT The evaluation board uses the ADP3336 low dropout voltage regulator to generate either 3.3 V or 1.8 V for the board. The output voltage VDD of the ADP3336 is set with external resistors, which can be switched with S1 to select either 3.3 V or 1.8 V outputs (see Table 1). The EVAL-ADAU1761Z has four 1/8” output jacks: two mono differential, one stereo single-ended, and one stereo capless headphone output. The differential outputs on J21 and J25 (labeled DIFF OUT L and DIFF OUT R, respectively) are biased at AVDD/2 V. The tips of the differential output jacks are connected to the positive output of the ADAU1761, and the rings are connected to the negative outputs. J23 is a stereo, single-ended, ac-coupled output. Table 1. VDD Voltage Settings Voltage Regulator Output (V) 3.3 1.8 S1 Setting Up Down At VDD = 3.3 V, the full-scale analog output level of the EVAL-ADAU1761Z is 1.0 V rms (1.0 V rms on the single-ended outputs and 0.5 V rms on each of the two pins of the differential outputs). The differential line outputs of the ADAU1761 can each be boosted by 6 dB to 2.0 V rms. The full-scale output level scales with VDD. The maximum operating current draw from this board is approximately 75 mA. This maximum value is reached with VDD = 3.3 V, a large SigmaDSP program loaded, headphone outputs enabled, and all LEDs enabled. Typically, the regulator input comes from the USBi +5 V dc USB supply on Header J1. This supply is enabled with a jumper on J5. To use another +5 V dc supply source, remove the jumper on J5, and connect the other supply either on the J2 power jack (positive tip) or via soldering leads from a supply such as a battery to J3. On J3, Pin 1 (square pad) is ground, and Pin 2 (circle pad) is the power connection. Note that Jack J21 and Jack J25 tie the ring to the sleeve, resulting in a floating ground output. Be aware of this when connecting to these outputs. Rev. 0 | Page 5 of 12 EVAL-ADAU1761Z Jack J4 J6 J19 J20 J21 J22 J23 J24 J25 Function Stereo digital microphone input Serial data port input/output Capless headphone output Left differential input Left differential output Right differential input Stereo single-ended line output Stereo single-ended line input Right differential output CLOCKING THE EVALUATION BOARD J7 The EVAL-ADAU1761Z requires a master clock to operate. The source of this clock is set by Switch S5 (see Table 3). J8 08055-013 J7 and J8 set up the routing of signals to the JACKDET/MICIN pin of the ADAU1761. These jumper settings are shown in Figure 7, Figure 8, and Figure 9; they are also shown on the PCB silkscreen. Toggling the jack detection signal can be simulated by setting up the jack detect function on the ADAU1761 and then inserting and removing Jumper J8 with J7-B (lower connection) connected. Table 2. Analog and Digital Audio Connectors Figure 7. Jumper Settings (J7 and J8) for Stereo Digital Microphone Input Clock Source Do not use—function disabled on USBi MCLK from Header J6 On-board 12.288 MHz clock oscillator (U3) S5 Setting Up Middle Down J7 EXTERNAL DIGITAL AUDIO HEADER J8 08055-014 Table 3. Master Clock Source Settings Figure 8. Jumper Settings (J7 and J8) for Jack Detection (Low Signal Detected) In SigmaStudio, the digital input channels (Channel 0 to Channel 7) are accessed in the input cell in Position 2 to Position 9, as shown in Figure 6. Position 0 and Position 1 are inputs from the ADCs. J7 J8 08055-015 The LRCLK, BCLK, ADC_SDATA, and DAC_SDATA pins of the ADAU1761 can be connected to external devices with the 5 × 2 Header J6. The pins on the top row of J6 are connected to ground; the pins on the bottom row are the signals indicated on the silkscreen. Figure 9. Jumper Settings (J7 and J8) for Jack Detection (High Signal Detected) 08055-006 I2C COMMUNICATIONS HEADER The I2C communications header, J1, provides an interface to the ADAU1761 communications port. This header connects to the USBi board (EVAL-ADUSB2), which controls communication between the evaluation board and SigmaStudio on the PC. Additionally, a DSP reset line and USB bus power line are provided. The SigmaStudio hardware configuration for this setup is shown in Figure 10. Figure 6. Digital Audio Inputs 0 to 7 in SigmaStudio Input Cell DIGITAL MICROPHONE AND JACK DETECTION INPUT 08055-007 A pair of digital microphones can be connected to the evaluation board on Header J4. The pin connections for J4 are detailed on the evaluation board silkscreen. Figure 10. Using the EVAL-ADAU1761Z and the USBi with SigmaStudio Rev. 0 | Page 6 of 12 EVAL-ADAU1761Z GPIO INTERFACE CIRCUIT The ADAU1761 has four GPIO pins that can be used to interface to external digital controls. These dual-function pins can also be used as the serial data port; only one of these two functions can be used at one time. On the EVAL-ADAU1761Z, the GPIO pins are connected to buttons, switches, and LEDs through a bank of jumpers, J9 to J14. Jumpers should be attached to the headers to use the on-board GPIO functions; these jumpers are in place to decouple the GPIO circuits from the serial data port when the pins are used for the serial data port function. In SigmaStudio, the GPIO functions must be enabled and set to the appropriate function in the DSP Register tab, as shown in Figure 11. The GPIO input and output blocks must also be instantiated in the DSP schematic window (see Figure 12). Table 4 shows which ADAU1761 pins are connected to the different GPIO functions and the associated jumper for each. Note that GPIO0 and GPIO1 can each be connected to both a push-button and a DIP switch. Make sure to connect only one of these functions to a pin at a time. ADAU1761 Pin GPIO3 J10 Device Green LED D2 Settings Active high GPIO2 Yellow LED D3 Active high J11 GPIO0 J12 GPIO0 J13 GPIO1 J14 GPIO1 Pushbutton S3 DIP switch S2-B Pushbutton S4 DIP switch S2-A Push to ground Right low, left high Push to ground Right low, left high SigmaStudio Setting Output set by DSP core with pull-up Output set by DSP core with pull-up Input with debounce Input with debounce Input with debounce Input with debounce Figure 11. GPIO Settings in SigmaStudio for the ADAU1761 08055-009 Jumper J9 08055-008 Table 4. GPIO Setup Figure 12. GPIO Input and Output Blocks in SigmaStudio Rev. 0 | Page 7 of 12 J24 C2 1kΩ R27 1kΩ R24 0Ω R16 0Ω C12 0.10µF R20 0Ω R8 0.10µF 0Ω R11 C3 OPEN C25 OPEN C27 OPEN C13 OPEN C19 OPEN C6 OPEN 49.9kΩ RESISTORS ON INPUTS REFERENCE AC COUPLING CAPACITORS TO GROUND PREVENTING POPS WHEN 'HOT-PLUGGING' INPUTS. NOT NECESSARY FOR HARDWIRED DESIGN. 2kΩ R15 MIC_BIAS DIFFERENTIAL INPUT 2 STEREO SINGLE-ENDED INPUT J22 J20 2kΩ R7 MIC_BIAS J15 J18 R12 R9 DIFFERENTIAL INPUT 1 49.9kΩ 49.9kΩ 49.9kΩ 10µF C7 10µF C5 SCL SDA RINP RINN LINP LINN U1 ADAU1761 C16 RHP 19 LOUTN 17 LOUTP 18 16 ROUTN ROUTP 15 MONOOUT 21 LHP 20 0.10µF L1 C22 0.10µF 1 1.2nH VDD C14 10µF 7 2 12.288MHZ 4 VDD CM OE 1 3 49.9Ω OUTPUT U3 2 GND R47 EXT_MCLK 2 4 USB_CLK 1 MCLK ADDR0/CLATCH LRCLK/GPIO3 29 BCLK/GPIO2 28 3 2 3 32 SCL/CCLK JACKDET/MICIN 26 ADC_SDATA/GPIO1 ADDR1/CDATA 31 SDA/COUT DAC_SDATA/GPIO0 27 30 4 6 LAUX 14 RAUX 12 13 10 11 0.10µF C10 DVDD TP5 S5-A JACKDET/MICIN MIC_BIAS 0.10µF C31 10µF C8 10µF C11 MICBIAS 5 IOVDD 25 DGND 10µF C20 10µF C15 10µF C26 IOVDD 1 J17 AVDD 8 AGND 9 AGND 22 R21 R17 R25 49.9kΩ 49.9kΩ R28 Rev. 0 | Page 8 of 12 49.9kΩ Figure 13. Board Schematics, Page 1 10µF C28 24 DVDDOUT J16 23 AVDD TP3 C24 9.1PF 10kΩ R46 C39 0.10µF C18 0.10µF BCLK LRCLK 6 8 5 7 1 S5-B C21 10µF DAC_SDATA ADC_SDATA L2 2 C23 R14 OPEN 10µF C17 10µF R5 R3 OPEN R13 OPEN R29 OPEN R18 10kΩ 100Ω R19 R22 10kΩ 100Ω R23 R2 OPEN 0Ω IOVDD IOVDD VDD R26 OPEN C4 + 0Ω R10 OPEN OPEN 0Ω C1 R6 + R4 OPEN CAPLESS HEADPHONE OUTPUT BOARD IS SHIPPED IN CAPLESS MODE. TO CONVERT TO AC-COUPLED, REMOVE 0Ω RESISTORS FROM R5, R6, AND R10; ADD 220µF CAPACITORS TO C1 AND C4 AND 0Ω RESISTOR TO R4. MONO DIFFERENTIAL OUTPUT RIGHT J25 J23 STEREO SINGLE-ENDED OUTPUT J21 MONO DIFFERENTIAL OUTPUT LEFT J19 EVAL-ADAU1761Z SCHEMATICS AND ARTWORK 08055-010 Rev. 0 | Page 9 of 12 Figure 14. Board Schematics, Page 2 J2 2 3 1 RAPC722X LRCLK BCLK DAC_SDATA ADC_SDATA 100Ω R40 100Ω R41 R45 10kΩ OPEN K BRD_RESET A D4 +5V SUPPLY FROM USBi R43 10kΩ BATTERY INPUT +5V J9 J10 J12 J14 J11 J13 J3 J5 S2 S3 R44 10kΩ S4 4 3 C34 0.10µF R32 10kΩ GREEN DIFFUSED D2 YELLOW DIFFUSED D3 SPST_2SEC_SMD 1 2 R42 10kΩ C9 0.10µF C32 10µF TP2 C33 0.10µF 1 2 3 5 TP1 TP4 7 IN1 OUT1 8 IN2 OUT2 6 SD OUT3 GND FB 4 U2 ADP3336 J4 RIGHT DMIC LEFT DMIC 12 10 8 6 4 2 TP6 R33 147kΩ 10kΩ R37 169kΩ R34 140kΩ R35 C35 10nF M2 SPDT 3V3 C36 0.10µF C37 10µF VDD IOVDD RED DIFFUSED D1 100Ω C29 0.10µF SCL SDA C30 0.10µF C40 0.10µF 1 3 5 7 9 R31 10kΩ C41 0.10µF J6 2x5 9 7 5 3 1 SERIAL DATA INTERFACE 10 8 6 4 2 +5V J1 USB_CLK 2 4 6 8 10 BRD_RESET HEADER_10WAY_POL R30 10kΩ IOVDD CONTROL PORT INTERFACE LRCLK 49.9Ω BCLK DAC_SDATA ADC_SDATA R38 PLANE DECOUPLING EXT_MCLK BCLK JACKDET/MICIN R48 J8 POLARIZING PLUG 100Ω S1 1V8 DIGITAL MICROPHONE INPUT SOCKET_12WAY_UNSHROUD 10kΩ 11 9 7 5 3 1 DVDD = +1.8V (SHOWN) OR +3.3 V SUPPLY M1 POLARIZING PLUG R36 VDD JUMPER2SIP3 J7 A B 10kΩ R39 JACK DETECT SIGNAL R1 IOVDD C38 0.10µF EVAL-ADAU1761Z 08055-011 08055-012 EVAL-ADAU1761Z Figure 15. Board Silkscreen and Parts Placement Rev. 0 | Page 10 of 12 EVAL-ADAU1761Z ORDERING INFORMATION BILL OF MATERIALS Table 5. Qty 2 13 Description Capacitor (open) Capacitor, multilayer ceramic, 0.10 μF, 50 V, X7R, 0603 1 4 1 1 1 1 Designator C1, C4 C2, C9, C10, C12, C16, C18, C22, C31, C33, C34, C36, C38, C39 C3, C6, C13, C19, C25, C27 C5, C7, C8, C11, C14, C15, C17, C20, C21, C23, C26, C28, C32, C37 C24 C29, C30, C40, C41 C35 D1 D2 D3 1 1 1 1 1 D4 J1 J2 J3 J4 Schottky diode, 30 V, 0.5 A, SOD-123 Header, 10-way (2 × 5), shrouded, polarized Mini power jack, 0.08”, R/A T/H Open Header, 12-way (2 × 6), socket, unshrouded 12 J5, J8 to J18 1 J6 Header, 2-pin, unshrouded, 2-jumper, 0.10” (use Tyco shunt, 881545-2) Header, 10-way (2 × 5), unshrouded 1 J7 Header, 3-position, SIP 7 1 1 6 J19 to J25 L1 L2 R1, R19, R23, R40, R41, R48 R2 to R4, R13, R14, R26, R29 R5, R6, R8, R10, R11, R16, R20 R7, R15 R9, R12, R17, R21, R25, R28 R18, R22, R30 to R32, R36, R37, R39, R42 to R46 R24, R27 R33 R34 R35 R38, R47 Stereo mini jack, SMT Inductor, 1.2 nH Chip ferrite bead, 600 Ω @ 100 MHz Chip resistor, 100 Ω, 1%, 100 mW, thick film, 0603 6 14 7 7 2 6 13 2 1 1 1 2 Manufacturer Part Number Panasonic ECJ-1VB1H104K Capacitor, multilayer ceramic, 10 μF, 10 V, X7R, 0805 Murata GRM21BR71A106KE51L Capacitor, multilayer ceramic, 9.1 pF, 50 V, NP0, 0603 Capacitor, multilayer ceramic, 0.10 μF, 16 V, X7R, 0402 Capacitor, multilayer ceramic, 10 nF, 25 V, NP0, 0603 LED, red diffused, 6 millicandela, 635 nm, 1206 LED, green diffused, 10 millicandela, 565 nm, 1206 LED, yellow diffused, 4 millicandela, 585 nm, 1206 Murata Panasonic TDK Lumex Lumex CML Innovative Technologies ON Semiconductor 3M Switchcraft, Inc. GQM1885C1H9R1CB01D ECJ-0EX1C104K C1608C0G1E103J SML-LX1206IW-TR SML-LX1206GW-TR CMD15-21VYD/TR8 Sullins Connector Solutions Sullins Connector Solutions Sullins Connector Solutions Sullins Connector Solutions CUI Inc. Jaro Components, Inc. TDK Panasonic PPPC062LFBN-RC Capacitor (open) MBR0530T1G N2510-6002RB RAPC722X PBC02SAAN PBC05DAAN PBC03SAAN SJ-3523-SMT HFI-160808-1N2S MPZ1608S601A ERJ-3EKF1000V Resistor, open Chip resistor, 0 Ω, 5%, 100 mW, thick film, 0603 Panasonic ERJ-3GEY0R00V Chip resistor, 2 kΩ, 1%, 100 mW, thick film, 0603 Chip resistor, 49.9 kΩ, 1%, 100 mW, thick film, 0603 Panasonic Panasonic ERJ-3EKF2001V ERJ-3EKF4992V Chip resistor, 10 kΩ, 1%, 100 mW, thick film, 0603 Panasonic ERJ-3EKF1002V Chip resistor, 1 kΩ, 1%, 100 mW, thick film, 0603 Chip resistor, 147 kΩ, 1%, 100 mW, thick film, 0603 Chip resistor, 169 kΩ, 1%, 100 mW, thick film, 0603 Chip resistor, 140 kΩ, 1%, 100 mW, thick film, 0603 Chip resistor, 49.9 Ω, 1%, 100 mW, thick film, 0603 Panasonic Panasonic Panasonic Panasonic Panasonic ERJ-3EKF1001V ERJ-3EKF1473V ERJ-3EKF1693V ERJ-3EKF1403V ERJ-3EKF49R9V Rev. 0 | Page 11 of 12 EVAL-ADAU1761Z Qty 1 1 2 1 6 1 1 1 Designator S1 S2 S3, S4 S5 TP1 to TP6 U1 U2 U3 Description Slide switch, SPDT, PC mount, L = 2 mm SMD dip switch, 2-section SPST, raised actuator Tact switch, long stroke (normally open) Slide switch, DP3T, PC mount, L = 4 mm Mini test point, white, 0.1” OD SigmaDSP codec Adjustable low dropout voltage regulator SMD oscillator, 12.288 MHz, fixed, 1.8 VDC to 3.3 VDC 1 Part Number EG1271 219-2LPST B3M-6009 EG2305 5002 ADAU1761BCPZ ADP3336ARMZ AP3S-12.288MHz-F-J-B ESD CAUTION ORDERING GUIDE Model EVAL-ADAU1761Z1 Manufacturer E-Switch CTS Corporation Omron Electronics E-Switch Keystone Electronics Analog Devices Analog Devices Abracon Corporation Description Evaluation Board Z = RoHS Compliant Part. Purchase of licensed I2C components of Analog Devices or one of its sublicensed Associated Companies conveys a license for the purchaser under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. ©2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. EB08055-0-5/09(0) Rev. 0 | Page 12 of 12