AN-1006 APPLICATION NOTE One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com Using the EVAL-ADUSB2EBZ by Brett Gildersleeve The ribbon cable and 10-pin header form a bridge to the target board to connect the communications signals to the target IC. The ribbon cable also carries 5 V power from the USB hub, which can be used to power the target board if desired. INTRODUCTION The EVAL-ADUSB2EBZ features USB-to-I2C and SPI conversion. It is compatible with 1.8 V and 3.3 V target devices and allows for SigmaStudio™ integration for most SigmaDSP® processors. Its on-board power regulators are capable of supplying the target board, and it features a standard Aardvark-compatible programming header. The EVAL-UDSUB2EBZ provides SPI control of up to five slave devices with a low profile surfacemount USB miniature Type B connector, and it allows for plugand-play operation. The on-board regulators enable both 1.8 V and 3.3 V IOVDD operation, allowing for increased compatibility with target devices. Up to five slave devices can be controlled by the USBi simultaneously. To control multiple SPI devices, additional latch signals are provided, although they are not connected to the ribbon cable. The EVAL-ADUSB2EBZ is ideal for downloading code and register settings to SigmaDSP processors and codecs with SigmaStudio. It can also be used for real-time tuning of SigmaDSP production units with SigmaStudio. The USBi can be used to control SigmaDSP systems in real time via SigmaStudio, and is capable of programming an EEPROM in self-boot systems. It is an ideal solution for in-circuit programming and tuning of prototype systems. GENERAL DESCRIPTION The USBi only supports USB 2.0 interfaces; the USBi will not work with PCs that only support USB Version 1.0 and USB Version 1.1. The EVAL-ADUSB2EBZ, also known as the USBi, is a standalone communications interface and programmer for SigmaDSPsystems. It translates USB control commands from SigmaStudio to the I2C and SPI communications protocols. The USBi is powered over the USB cable; therefore, no external power supply is required. FUNCTIONAL BLOCK DIAGRAM EVAL-ADUSB2 (USBi) POWER REGULATOR 1.8V/3.3V SELECTOR SWITCH TARGET BOARD HOST PC USB CONNECTOR EEPROM PROGRAMMING HEADER CYPRESS USB INTERFACE PROGRAMMING HEADER SIGMA DSP EEPROM 08093-001 SigmaStudio Figure 1. Rev. A | Page 1 of 16 AN-1006 Application Note TABLE OF CONTENTS Introduction ...................................................................................... 1 USB Connector ..............................................................................7 General Description ......................................................................... 1 Power Regulator ............................................................................7 Functional Block Diagram .............................................................. 1 Cypress USB Interface ..................................................................8 Using the USB Interface with SigmaStudio................................... 3 Crystal Oscillator Schematic........................................................8 Installing the Drivers ................................................................... 3 LEDs ................................................................................................9 Adding the USBi to a SigmaStudio Project ............................... 4 EEPROM ........................................................................................9 Configuring the USBi to Communicate with an IC ................ 4 Target Board Power Switch ..........................................................9 Configuring the USBi to Communicate with Multiple ICs .... 4 Target Board Programming Header ...........................................9 Controlling the USBi.................................................................... 5 Evaluation Board Schematics and Artwork ................................ 10 Monitoring the USBi .................................................................... 6 Schematics ................................................................................... 10 Using the USBi to Program a Self-Boot EEPROM .................. 6 Board Layout ............................................................................... 12 Warning ......................................................................................... 6 Bill of Materials ............................................................................... 13 Circuit Schematics ............................................................................ 7 REVISION HISTORY 4/10—Rev. 0 to Rev. A Changes to General Description Section .......................................1 Added Warning Section................................................................... 6 5/09—Revision 0: Initial Version Rev. A | Page 2 of 16 Application Note AN-1006 USING THE USB INTERFACE WITH SIGMASTUDIO INSTALLING THE DRIVERS Click Search for the best driver in these locations, then select Include this location in the search. Click Browse to find the SigmaStudio 3.0\USB drivers directory. 08093-002 SigmaStudio must be installed to use the USBi. Once SigmaStudio has been properly installed, connect the USBi to an available USB port with the included USB cable. At this point, Windows® XP recognizes the device and prompts the user to install drivers. Figure 2. Found New Hardware Notification 08093-004 Select the Install from a list or specific location (Advanced) option and click Next >. Figure 4. Windows Found New Hardware Wizard—Search and Installation Options 08093-003 When the warning about Windows Logo testing appears on the screen, click Continue Anyway. 08093-005 Figure 3. Found New Hardware Wizard—Installation Figure 5. Windows Logo Testing Warning Rev. A | Page 3 of 16 AN-1006 Application Note ADDING THE USBi TO A SIGMASTUDIO PROJECT 08093-006 To use the USBi in conjunction with SigmaStudio, first select it in the Communication Channels subsection of the toolbox in the Hardware Configuration tab, and add it to the project space. Figure 9. Connecting the USBi to an IC To change the communication mode and channel, click the drop-down box and select the appropriate mode and channel from the list. 08093-010 08093-007 If SigmaStudio cannot detect the USBi on the USB port of the computer, then the background of the USB label will be red. This may happen when the USBi is not connected or when the drivers are incorrectly installed. 08093-009 Figure 6. Adding the USBi Communication Channel Figure 7. USBi Not Detected by SigmaStudio If SigmaStudio detects the USBi on the USB port of the computer, the background of the USB label changes to orange. Figure 10. Selecting the Communications Mode and Channel CONFIGURING THE USBi TO COMMUNICATE WITH MULTIPLE ICS The USBi can communicate with up to five ICs simultaneously. To communicate with more than one IC, add another IC to the project and connect it to the next available pin of the USBi. 08093-008 Multiple Address Operation with I2C Figure 8. USBi Detected by SigmaStudio CONFIGURING THE USBi TO COMMUNICATE WITH AN IC The USBi can support up to four identical devices on the same bus if the I2C address pins of the target devices are independently set to four different addresses, matching the addresses in the drop-down box in the Hardware Configuration tab of SigmaStudio. 08093-011 To use the USBi to communicate with the target IC, connect it by click-dragging a wire between the blue pin of the USBi and the green pin of the IC. The corresponding drop-down box of the USBi automatically fills with the default mode and channel for that IC. Figure 11. Multiple Address Operation with I2C Rev. A | Page 4 of 16 Application Note AN-1006 Multiple Address Operation with SPI The USBi can support up to two identical devices on the same SPI latch if the SPI address pins of the target devices are independently set to two different addresses, matching the addresses in the drop-down box in the Hardware Configuration tab of SigmaStudio. Combined Multiple Latch and Multiple Address Operation with SPI A combination of multiple latch and multiple address schemes can be used, but the total number of devices cannot exceed five. CONTROLLING THE USBi 08093-012 08093-015 The USBi has several functions for controlling the target hardware. The control options are accessed in SigmaStudio by right-clicking on the USB Interface in the Hardware Configuration tab. Figure 15. USBi Control Menu Figure 12. Multiple Address Operation with SPI Capture Output Data Multiple Latch Operation with SPI The USBi can support devices on five different SPI latches. When multiple latches are used, the additional SPI latch signals from the USBi that are not connected to the ribbon cable need to be manually wired to the target. This option accesses the Capture Window, which displays a log of all communication between the PC and the target IC (see Figure 17). Device Power On/Off This option switches the line that supplies power to the target board. By default, the device power is on. Device Enable/Disable For supported ICs, selecting this option switches the device to low power mode. Reset USB Interface 08093-013 This function performs a software reset of the USB driver, and causes the Cypress USB microcontroller to reload its firmware. Figure 13. Multiple Latch Operation with SPI The locations of extended SPI latch signals are shown in Figure 14. 0x01 0x02 0x04 0x03 0x05 R12 R11 08093-014 Q1 Figure 14. Extended SPI Latch Signal Pinout (Bottom View of Board) Rev. A | Page 5 of 16 AN-1006 Application Note MONITORING THE USBi WARNING Using the Capture Window, it is possible to view all outgoing communications transfers from the PC to the target IC. For each write, the write mode, time of write, cell name (if applicable), parameter name, address, value, data (in decimal and hexadecimal), and byte length are shown. The USBi has an EEPROM on the I2C bus at Address 0x51, which it uses to indicate its Vendor ID and Product ID to the PC, as well as boot its internal program. You should avoid having any other EEPROMs in your system design at this address. This EEPROM is not write-protected; therefore, if you attempt to write to Address 0x51, you will overwrite the USBi's onboard EEPROM, and the USBi will cease to function. The USBi cannot be reprogrammed without returning the board to Analog Devices. Most EEPROMs are set to Address 0x51 by setting its pins A0 = 1 and A1 = A2 = 0. For block writes where more than one memory location is written, only the first location is shown. The expand/collapse button in the leftmost column allows the user to view the full data write. USING THE USBi TO PROGRAM A SELF-BOOT EEPROM 08093-017 After compiling a project, the registers and RAM contents can be written to a target EEPROM for self-boot. To use this functionality, an EEPROM IC must be connected to the USBi in the Hardware Configuration window. After verifying that the EEPROM write protect pin is disabled on the target board, right-click the target IC (SigmaDSP), and select Write Latest Compilation to E2PROM. 08093-016 Figure 16. Writing to the Self-Boot EEPROM Figure 17. Output Capture Window Rev. A | Page 6 of 16 Application Note AN-1006 CIRCUIT SCHEMATICS USB CONNECTOR POWER REGULATOR The connection between the host PC and the Cypress USB interface device is via a standard USB cable that carries D+ and D− signals for data communications, a 5 V power supply, and ground. The D+ and D− lines are a one-wire communication interface carried by half-duplex differential signals on a twisted pair. The clock is embedded in the data using the nonreturn-tozero inverted (NRZI) line code. These signal lines connect directly to pins on the Cypress USB interface. The Cypress USB Interface I/O ports are capable of operating in both 1.8 V and 3.3 V modes, depending on the target device in the system. Two regulators, one for 5 V to 3.3 V regulation and the other for 5 V to 1.8 V regulation, run simultaneously when the board is powered. A switch (S1) is provided to easily switch the IOVDD supply between the two regulators. LED D4 provides visual feedback that the board is being supplied with 5 V power from the PC USB port. A surface-mounted USB miniature Type B jack was selected for its low profile and increasing ubiquity in consumer electronics. The position of switch S1 should not be changed when the board is connected to the USB bus. 5V0DD J3 DMINUS D+ 3 GND 4 DPLUS 08093-018 USB-MINI-B-SMD VCC 1 D– 2 Figure 18. USB Connector Schematic 5V0DD 3V3DD ADP1711AUJZ-3.3-R7 1 IN OUT 5 3 EN BYP 4 GND 2 U8 D4 C21 1.0uF C18 10nF C19 1.0uF + C14 10uF 1V8DD ADP1711AUJZ-1.8-R7 1 IN OUT 5 + C22 15uF C20 1.0uF EN BYP GND 2 U7 3 S1 2 1 4 SPDT C17 1.0uF + C13 10uF C16 10nF TP1 08093-019 3 R10 475R IOVDD 3V3DD 1V8DD Red Diffused Figure 19. Power Regulator Schematic Rev. A | Page 7 of 16 Application Note C11 22pF AN-1006 CYPRESS USB INTERFACE The Cypress USB interface is the core of the system, including all of the necessary functionality to convert USB commands into corresponding I2C or SPI read/write transfers, and acts as a FIFO to route data between the host PC and the target device. 08093-021 C27 22pF 24.000MHz Y1 CRYSTAL OSCILLATOR SCHEMATIC The Cypress USB interface is its own clock master, and the board includes a crystal oscillator circuit with a 24 MHz piezoelectric crystal resonator to provide stability to the oscillator circuit. The crystal resonator is driven in parallel by the XTALOUT and XTALIN pins of the Cypress USB interface. 3DD3V IOVDD Figure 20. Crystal Oscillator Schematic 1DD8V IOVDD Local to 68053 C9 0.10uF C10 0.10uF C12 0.10uF + C15 15uF C4 0.10uF C5 0.10uF 2E DPLUS 1E DMINUS DPLUS DMINUS 1A 1B RDY0/SLRD RDY1/SLWR C11 22pF R15 USB_CLK 49R9 1G 5C VCC_A VCC_D PB0/FD[0] PB1/FD[1] PB2/FD[2] PB3/FD[3] PB4/FD[4] PB5/FD[5] PB6/FD[6] PB7/FD[7] 7H 7G CTL0/FLAGA 8H CTL1/FLAGB CTL2/FLAGC 2B 2G CLKOUT IFCLK 10k0 R1 U3 PA0/INT0 PA1/INT1 PA2/SLOE PA3/WU2 PA4/FIFOADR0 PA5/FIFOADR1 PA6/PKTEND PA7/FLAGD/SLCS 3F 3G SCL SDA SCL SDA VCC_IO 7E VCC_IO 8E VCC_IO 5A VCC_IO 5B AVCC 2D AVCC 1D IOVDD 8G 6G 8F 7F 6F 8C 7C 6C 3H 4F 4H 4G 5H 5G 5F 6H CDATA COUT 10k0 R2 CLATCH1 CLATCH2 CLATCH3 CLATCH4 CLATCH5 CCLK R6 475R BRD_RESET USB_PWR_ON 3V3DD 8A PD0/FD[8] 7A PD1/FD[9] 6B PD2/FD[10] 6A PD3/FD[11] 3B PD4/FD[12] 3A 7B WAKEUP PD5/FD[13] 3C PD6/FD[14] 2A 8B PD7/FD[15] RESET CYPRESS_CY7C68053_56BAXI YELLOW DIFFUSED D3 BLUE CLEAR D2 1 475R R9 475R 3V3DD IOVDD 475R R8 YELLOW DIFFUSED D1 R7 GND GND GND 8D 4C VCCA GND 5 VCCY GND 2 4 Y 3 A IOVDD 3V3DD U4 FXLP34P5X 3V3DD C6 0.10uF C8 0.10uF VCCA 3 GND 5 VCCY 1 IOVDD 2 A 4 Y U5 FXLP34P5X 3V3DD 2 A VCCA GND 5 VCCY 1 IOVDD 4 Y 3 U6 FXLP34P5X Figure 21. Cypress USB Interface Schematic Rev. A | Page 8 of 16 08093-020 C1 1.0uF 7D R5 100k 4A GND 4B GND IOVDD 1H GND 2H GND C27 22pF 24.000MHz Y1 1F AGND 2F AGND 2C XTALOUT 1C XTALIN Application Note AN-1006 IOVDD C3 0.10uF LEDS The LEDs provide feedback to the user about the status of the Cypress USB microcontroller. 2 A VCCA 1 3 GND VCCY 5 IOVDD 2 A VCCA 1 3 GND VCCY 5 TO U3 WP 7 3 A2 SCL 6 SCL 4 GND SDA 5 SDA TARGET BOARD POWER SWITCH D4 The USBi is capable of supplying power to the target board after the Cypress USB microcontroller has finished its boot up process. The USB_PWR_ON signal connects to the base of Q2 and turns on both transistors when driven high. Y RED DIFFUSED R10 475R 4 Y This circuit also enables a software-controlled target reset from SigmaStudio. FXLP34P5X 3V3DD VCCA 1 3 GND VCCY 5 2 A 8 Figure 23. EEPROM Schematic U5 IOVDD VCC 08093-023 BLUE CLEAR D2 YELLOW CLEAR D3 5V0DD FXLP34P5X 3V3DD IOVDD 1 2 3 1 A0 2 A1 24AA256-I/ST 4 U4 J2 U1 475R R9 3V3DD 475R R8 475R R7 YELLOW CLEAR D1 3V3DD 10k0 10k0 R3 R4 4 Y FZT705TA B 1 R12 Figure 22. LEDs Schematic 2k00 R11 C3 R13 Functionality I2C mode is active GPIO LED, for firmware debug purposes SPI mode is active 5 V power being is supplied over the USB bus Q2 MMBT3904LT1G 1 B USB_PWR_ON 1k50 E 2 10k0 R14 08093-024 Color Yellow Blue Yellow Red 5V0DD_USB Q1 100k Table 1. LED Functions Reference Designator D1 D2 D3 D4 4 C2 08093-022 FXLP34P5X C 3E 5V0DD U6 EEPROM Figure 24. Target Power Switch Schematic The EEPROM is an important system element that identifies the board to the host PC and stores the firmware for the Cypress USB Interface. The EEPROM is programmed during manufacturing via the J2 connector. TARGET BOARD PROGRAMMING HEADER To properly boot the Cypress USB microcontroller from the EEPROM, it is necessary to remove all other devices from the I2C bus. The ADG721BRMZ analog switch remains open, isolating the I2C bus from the target, until the boot process has completed. 5V0DD_USB ADG721BRMZ ADG721BRMZ U2-A USB_PWR_ON S1 D1 CTRL SDA IN1 USB_PWR_ON J1 U2-B CLATCH2 S2 D2 CTRL COUT CCLK CLATCH1 CLATCH4 IN2 1 3 5 7 9 11 13 2 4 6 8 10 12 14 CLATCH3 USB_CLK BRD_RESET CDATA CLATCH5 2X5 CUSTOM RIBBON 3V3DD C2 0.10uF LOCAL FOR ADG721 Figure 25. Target Board Programming Header Schematic Rev. A | Page 9 of 16 08093-025 SCL Y1 24.000MHz C11 22pF C7 22pF IOVDD USB_CLK SCL SDA DPLUS DMINUS 100k R5 49R9 R15 C9 0.10uF RDY0/SLRD RDY1/SLWR SCL SDA DPLUS DMINUS C1 1.0uF 8B 7B 2C 1C RESET PD0/FD[8] PD1/FD[9] PD2/FD[10] PD3/FD[11] PD4/FD[12] PD5/FD[13] PD6/FD[14] PD7/FD[15] PB0/FD[0] PB1/FD[1] PB2/FD[2] PB3/FD[3] PB4/FD[4] PB5/FD[5] PB6/FD[6] PB7/FD[7] PA0/INT0 PA1/INT1 PA2/SLOE PA3/WU2 PA4/FIFOADR0 PA5/FIFOADR1 PA6/PKTEND PA7/FLAGD/SLCS CYPRESS_CY7C68053_56BAXI GND WAKEUP XTALOUT XTALIN 2B CLKOUT 2G IFCLK 7H 7G CTL0/FLAGA 8H CTL1/FLAGB CTL2/FLAGC 1A 1B 3F 3G 2E 1E 2D AGND 1F AGND 2F GND 1H AVCC 1D AVCC 5A VCC_IO 5B VCC_IO 7E VCC_IO GND 4A GND 2H 1G VCC_A 5C VCC_D 8E VCC_IO GND 4B GND 4C GND 7D GND 8D 8A 7A 6B 6A 3B 3A 3C 2A 3H 4F 4H 4G 5H 5G 5F 6H 8G 6G 8F 7F 6F 8C 7C 6C U3 USB_PWR_ON R6 475R C12 0.10uF CLATCH2 CLATCH3 CLATCH4 CLATCH5 CCLK CDATA COUT C10 0.10uF + 10k0 R1 C15 15uF C5 0.10uF CLATCH1 C4 0.10uF LOCAL TO 68053 10k0 R2 2 IOVDD 2 IOVDD 2 IOVDD IOVDD A 1 IOVDD A A Y U4 4 3V3DD 4 FXLP34P5X U6 Y FXLP34P5X U5 Y FXLP34P5X 3V3DD 4 3V3DD BRD_RESET GND 5 VCCY YELLOW CLEAR D1 475R 3V3DD IOVDD C8 0.10uF U1 10k0 R14 1k50 R13 5 6 7 8 3 100k R12 1 B FZT705TA SDA SCL WP VCC 24AA256-I/ST GND A2 A1 A0 C3 0.10uF LOCAL FOR FXLP34 C6 0.10uF 3V3DD USB_PWR_ON 5V0DD 4 3 2 1 E 2 C 3 1 IOVDD E 2k00 1DD8V R9 4 2 C Q2 MMBT3904LT1G Q1 C IOVDD 3 VCCA GND 5 VCCY VCCA 1 1 VCCA 3 GND 5 VCCY Figure 26. Board Schematics Page 1 3 BLUE CLEAR D2 475R Rev. A | Page 10 of 16 YELLOW CLEAR D3 475R B R11 3DD3V 10k0 R3 1 2 3 J2 SDA SCL 5V0DD_USB 10k0 R4 AN-1006 Application Note EVALUATION BOARD SCHEMATICS AND ARTWORK SCHEMATICS 08093-028 R8 R7 J3 USB-MINI-B-SMD Figure 27. Board Schematics Page 2 Rev. A | Page 11 of 16 475R R10 RED DIFFUSED D4 GND D+ D- VCC + 5V0DD C22 15uF C21 1.0uF C20 1.0uF EN GND 2 U8 BYP 3 1 EN IN GND 2 U7 BYP OUT ADP1711AUJZ-1.8-R7 3 4 5 4 ADP1711AUJZ-3.3-R7 1 5 IN OUT DPLUS 3 4 DMINUS 2 1 5V0DD C16 10nF C18 10nF C17 1.0uF C19 1.0uF + 1V8DD + C14 10uF C13 10uF 3V3DD TP1 1V8DD 3V3DD USB_PWR_ON SCL 1 3 SPDT S1 2 ADG721BRMZ U2-A IN1 S1 D1 CTRL IN2 IOVDD 3V3DD S2 D2 CTRL U2-B LOCAL FOR ADG721 USB_PWR_ON SDA ADG721BRMZ C2 0.10uF CO U T CCLK CLATCH1 CLATCH4 CLATCH2 J1 2 4 6 8 10 12 14 2X5 CUSTOM RIBBON 1 3 5 7 9 11 13 CLATCH5 BRD _ RES ET CDATA CLATCH3 USB_CLK 5V0DD_USB Application Note AN-1006 08093-029 AN-1006 Application Note 08093-026 BOARD LAYOUT 08093-027 Figure 28. Board Layout—Top View Figure 29. Board Layout—Bottom View Rev. A | Page 12 of 16 Application Note AN-1006 BILL OF MATERIALS Table 2. 2 2 2 2 2 1 1 1 Reference Designator C1, C17, C19 to C21 C2 to C6, C8 to C10, C12 C7, C11 C13, C14 C15, C22 C16, C18 D1, D3 D2 D4 J1 1 1 1 1 4 2 5 1 1 1 1 1 1 J2 J3 Q1 Q2 R1 to R4 R5, R12 R6 to R10 R11 R13 R14 R15 S1 TP1 1 1 U1 U2 22 pF, 5%, multilayer ceramic, 50 V, NP0 (0402) 10 μF, 20%, SMD tantalum capacitor, 0805, 6.3 V 15 μF, 20%, SMD tantalum capacitor 0805 6.3 V 10 nF, 5%, multilayer ceramic, 25 V, NP0 (0603) LED, yellow clear, 6.0 mcd, 585 nm, 1206 LED, blue clear, 25 mcd, 470 nm, 1206 LED, red diffused, 6.0 mcd, 635 nm, 1206 Header, 10-way, custom ribbon cable, install centered on 14-way footprint 3-way socket, 2 mm, single row, 1 × 3 USB, mini Type B receptacle SMD PNP Darlington transistor, SOT223 NPN general-purpose transistor 10.0 kΩ chip resistor, 1%, 63mW, thick film, 0402 100 kΩ chip resistor, 1%, 63 mW, thick film, 0402 475 Ω chip resistor, 1%, 63 mW, thick film, 0402 2.00 kΩ chip resistor, 1%, 63 mW, thick film, 0402 1.50 kΩ chip resistor, 1%, 63 mW, thick film, 0402 10.0 kΩ chip resistor, 1%, 63 mW, thick film, 0402 49.9 Ω chip resistor, 1%, 63 mW, thick film, 0402 SPDT slide switch SMD J hook Mini test point white 0.040 inch hole diameter, 0.10 inch × 0.020 inch 256 kb I2C, CMOS serial EEPROM CMOS, low voltage, 4 Ω dual SPST switch 1 U3 USB microcontroller, I2C (3) 8-bit ports CY7C68053-56BAXI 3 1 U4 to U6 U7 Translator, 1-bit, unidirect SC70-5 Adjustable, low dropout voltage regulator, 1.0% FXLP34P5X ADP1711AUJZ-1.8-R7 1 U8 Adjustable, low dropout voltage regulator, 1.0% ADP1711AUJZ-3.3-R7 1 Y1 Crystal, 24.000 MHz, SMT 18 pF, 3.2 mm × 2.5 mm ABM8-24.000MHZ-B2-T Qty 5 9 Description 1.0 μF, 10%, multilayer ceramic, 16 V, X7R (0603) Manufacturer Part Number EMK107B7105KA-T Vendor Digi-Key Vendor Order No. 587-1241-1-ND 0.10 μF, 10%, multilayer ceramic, 16 V, X7R (0402) ECJ-0EX1C104K Digi-Key PCC13490CT-ND GRM1555C1H220JZ01D TCP0J106M8R TCP0J156M8R C1608C0G1E103J SML-LX1206YC-TR SML-LX1206USBC-TR SML-LX1206IW-TR RCC-2184-ND Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key 490-1283-1-ND 511-1447-1-ND 511-1448-1-ND 445-2664-1-ND 67-1358-1-ND 67-1701-1-ND 67-1003-1-ND RCC-2184-ND 25630301RP2 54819-0572 FZT705TA MMBT3904LT1G MCR01MZPF1002 MCR01MZPF1003 CRCW0402475RFKED ERJ-2RKF2001X ERJ-2RKF1501X MCR01MZPF1002 MCR01MZPF49R9 CAS-120TA 5002 Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key Digi-Key 2563S-03-ND WM17116CT-ND FZT705CT-ND MMBT3904LT1GOSCT-ND RHM10.0KLCT-ND RHM100KLCT-ND 541-475LCT-ND P2.00KLCT-ND P1.50KLCT-ND RHM10.0KLCT-ND RHM49.9LCT-ND CAS120JCT-ND 5002K-ND 24AA256-I/ST ADG721BRMZ Digi-Key Analog Devices Arrow Electronics Digi-Key Analog Devices Analog Devices Digi-Key 24AA256-I/ST-ND ADG721BRMZ Rev. A | Page 13 of 16 CY7C68053-56BAXI FXLP34P5XCT-ND ADP1711AUJZ-1.8-R7 ADP1711AUJZ-3.3-R7 535-9138-1-ND AN-1006 Application Note NOTES Rev. A | Page 14 of 16 Application Note AN-1006 NOTES Rev. A | Page 15 of 16 AN-1006 Application Note NOTES I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors). ©2009–2010 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. AN08093-0-4/10(A) Rev. A | Page 16 of 16