Three-Phase All Wave Sensor-less Motor Driver for Notebook PC

Ordering number : ENA1878
SS30
Bi-CMOS IC
For Notebook PC
http://onsemi.com
Fan Motor Driver
Overview
The SS30 is a 3 phase all wave sensor-less motor driver for notebook PC fans.
Feature
• Direct PWM 3 phase all wave sensor-less motor driver
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Power supply voltage
Pre-drive voltage (gate voltage)
Output pin current
Symbol
Conditions
Ratings
Unit
VCC max
6.5
V
VG max
10
V
IOUT max
0.7
A
VCC
V
PWM input pin withstand voltage
VPWM max
FG output pin withstand voltage
VFG max
6.0
V
FG output current
IFG max
5.0
mA
1/2FG output pin withstand voltage
V1/2FG max
6.0
V
1/2FG output current
mA
I1/2FG max
5.0
RD output pin withstand voltage
VRD max
6.0
V
RD output current
IRD max
5.0
mA
Power dissipation 1
Pd max1
Independent IC
0.2
W
Power dissipation 2
Pd max2
Mounted on specified board *1
Operating temperature
Topr
Storage temperature
Tstg
*2
1.05
W
-30 to +95
°C
-55 to +150
°C
*1 : When mounted on 40.0mm×50.0mm×0.8mm glass epoxy 4 Layer 2S2P board
*2 : Tj max = 150°C. Use the IC in the range where the temperature of the chip does not exceed Tj = 150°C during operation.
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating
Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
Recommended Operating Conditions at Ta = 25°C
Parameter
Power supply voltage
Symbol
VCC
Semiconductor Components Industries, LLC, 2013
May, 2013
Conditions
Ratings
2.2 to 6.0
Unit
V
D0110 SY 20080710-S00004 No.A1878-1/7
SS30
Electrical Characteristics Ta = 25°C, VCC = 5V, unless specifically noted
Parameter
Symbol
Ratings
Conditions
min
Unit
typ
max
Power supply current 1
ICC1
PWM pin = VCC
1.8
2.5
mA
Power supply current 2
ICC2
PWM pin = 0V
20
50
μA
Charge pump output
Output voltage
VG
9.8
V
Output block
Source
Sink
Source + sink
Ron (H)
IO = 0.5A, VG = 9.5V
0.6
1.0
Ω
Ron (L)
IO = 0.5A, VCC = 5.0V
0.6
1.0
Ω
IO = 0.5A, VCC = 5V, VG = 9.5V
1.2
2
Ω
Ron (H+L)
Startup oscillation pin
OSC pin charge current
IOSC1
-2.5
μA
OSC pin discharge current
IOSC2
2.5
μA
PWM input pin
PWM pin high-level input voltage
VPWMH
VCC×0.8
VCC
V
PWM pin low-level input voltage
VPWML
0
VCC×0.2
V
-50
μA
25
50
kHz
0.1
0.2
V
0.25
0.275
V
1.0
s
PWM pin current
IPWM
PWM pin input frequency
fPWM
PWM pin = 0V
20
FG, 1/2FG, RD output pin
FG, 1/2FG, RD output pin
VFG
V1/2FG
VRD
low-level voltage
When IO = 0.5mA
Current limiter circuit
Limiter voltage
VRf
RF = 1Ω
0.225
Constraint protection circuit
Constraint protection detection time
RDT1
0.5
Constraint protection release time
RDT2
5
s
Thermal protection circuit
Thermal protection circuit operating
TSD
Design target *
150
180
°C
30
°C
temperature
Temperature hysteresis width
ΔTSD
Design target
* : Design target value and no measurement is made. The thermal protection circuit is incorporated to protect the IC from burnout or thermal destruction. Since
it operates outside the IC's guaranteed operating range, the customer's thermal design should be performed so that the thermal protection circuit will not be
activated when the fan is running under normal operating conditions.
Package Dimensions
unit : mm (typ)
3368
SIDE VIEW
(0.125)
(0.13)
3.0
0.4
3.0
(C0.17)
20
2
1
0.25
0.5
(0.5)
0.8
SIDE VIEW
(0.035)
Pd max - Ta
1.2
BOTTOM VIEW
Allowable power dissipation, Pd max - W
TOP VIEW
Specified circuit board : 40.0×50.0×0.8mm3
glass epoxy board 4 layer
1.05
1.0
0.8
0.6
0.46
0.4
0.2
0
-30
-20
0
20 25
40
60
80
95 100
Ambient temperature, Ta - C
SANYO : VCT20(3.0X3.0)
No.A1878-2/7
SS30
16
RF
VCC
17
WO
2
18
VO
VM
19
SUBGND
1
20
UO
Pin Assignment
CPC 15
CP 14
SS30
3 COM
VG 13
PWM 12
4 COMIN
SGND
FR
1/2FR
FG
RD 11
OSC
FIL
5
6
7
8
9
10
Top view
VCC
16
RF
2
17
WO
VM
18
VO
1
19
SUBGND
VCC
20
UO
Application Circuit Example
CPC 15
CP 14
SS30
3 COM
VG 13
PWM 12
4 COMIN
PWM
1000pF
FR
1/2FR
FG
RD 11
SGND
FIL
OSC
5
6
7
8
9
10
PWM Control Signal
f=20k to 50kHz
2200pF
No.A1878-3/7
SS30
Block Diagram
SGND
VCC
VG
VM
WO
VO
TSD
UO
VREF
RF
SUBGND
CURRENT
LIMITTER
COM
LOCK PROTECT
LOGIC
PRE DRIVE
SELECTOR
RD
1/2FG
COMIN
SENSORLESS
LOGIC
FIL
FG
PWM
OSC
OSC
FR
VG
CP
CPC
CHARGE
PUMP
MOSC
1/N
Pin Functions
Pin No.
Pin name
1
VM
Function
Equivalent circuit
Power supply for the IC and motor. It is
1
short-circuited and uses it with power supply small
signal pin VCC (pin 2). A capacitor must be
connected between this pin and ground.
20
UO
Output pins.
18
VO
Connect the motor coil.
17
WO
16
RF
20
18
17
16
Output current detection.
The drive current is detected by connecting a
resistor between this pin and ground.
2
VCC
Power supply for the IC and motor. A capacitor must
be connected between this pin and ground.
3
COM
4
COMIN
Motor middle point connection.
VG
UO VO WO
Motor position detection comparator filter pin.
It is short-circuited and uses it with motor power
supply pin VM (pin 1). A capacitor must be
connected between this pin and the FIL pin (pin 5).
5
FIL
3
Motor position detection comparator filter pin.
A capacitor must be connected between this pin and
the COMIN pin (pin 4).
4
5
Continued on next page.
No.A1878-4/7
SS30
Continued from preceding page.
Pin No.
Pin name
6
OSC
Function
Motor startup frequency setting. A capacitor must
be connected between this pin and ground. The
Equivalent circuit
VCC
VCC
startup frequency is adjusted by controlling the
charge/discharge current (±2.5μA) and the
capacitance of the capacitor.
6
7
SGND
Ground for IC. It is short-circuited and uses it with
pin SUBGND (pin 19).
8
F/R
Motor rotation direction switching. A high-level input
causes current to flow into the motor in the order of
VCC
Reverse signal
U, V, and W and a low-level input in the order of U,
W, and V. Changing the order of current application
turns the motor in the opposite direction.
Forward/reverse
switching signal
8
Forward signal
9
1/2FG
FG pulse output. This pin outputs 1/2 Hall sensor
9 10 11
system equivalent pulse signal.
10
FG
FG pulse output. This pin outputs a Hall sensor
system equivalent pulse signal.
11
RD
Motor lock detection output pin.
When the motor is locked, "H" is output.
12
PWM
PWM signal input. A high-level input turns on the
VCC
output transistors. A low-level input turns off the
output transistors and motor stops. The motor
speed is set by controlling the duty cycle of the input
PWM signal. The motor runs at full speed when this
pin is held open.
13
VG
12
Charge pump step-up output. A capacitor must be
14
connected between this pin and ground.
14
CP
15
Charge pump step-up pulse output pin. A capacitor
must be connected between this pin and the CPC
VCC
13
pin (pin 15).
15
CPC
Charge pump step-up pin. A capacitor must be
connected between this pin and the CP pin (pin 14).
19
SUBGND
SUBGND pin for IC. It is short-circuited and uses it
with pin SGND (pin 7).
No.A1878-5/7
SS30
SS30 Functional Description and Notes on External Components
Read the following notes before designing driver circuits using the SS30 to design a system with fully satisfactory
characteristics.
1. Output drive circuit and speed control methods
The SS30 adopts the synchronous commutation PWM drive method to minimize power loss in the output circuits.
Low on-resistance DMOS devices (total high and low side on-resistance of output block: 1.2Ω, typical) are used as the
output transistors.
The speed control of the driver is performed with an externally input PWM signal.
PWM controls the speed by performing switching in accordance with the duty cycle that is input to the PWM pin (pin
12). The output transistor is on when a high-level voltage is input to the PWM pin, and off when a low-level voltage is
input. When the motor is used with the PWM pin open, the built-in resistor causes the PWM pin to change to
high-level voltage and the motor speed rises to full speed. When the PWM pin is fixed at low-level voltage, the motor
decelerates, and after the motor stops it enters “Power Saving Mode.
2. Soft Switching Circuit
This IC adopts variable duty soft switching to minimize the motor drive noise.
3. Current limiter circuit
The current limiter circuit limits the output current peak value to a level determined by the equation I = VRF/RF (VRF
= 0.25V typical). The current limiter circuit detects the peak current of the output transistors at the RF pin (pin 16) and
turns off the transistor of the PWM phase.
4. OSC circuit
The OSC pin (pin 6) is an oscillation pin provided for sensor-less motor startup commutation. When a capacitor is
connected between the OSC pin and ground, the OSC pin starts self-oscillation, and this becomes the startup
frequency. The oscillator frequency can be adjusted by changing the value of the external capacitor (i.e. reducing the
value of the capacitor increases the startup frequency).
It is necessary to select a value of the capacitor that provides the optimal startup characteristics.
Please confirm the operation when starting without fail, and adjust the constant again when you change the
characteristic of the motor shape change and the motor (coil resistance, number of rolling lines, and magnetization,
etc.).
5. Position Detector Comparator Circuit for Rotor
The position detection comparator circuit for the rotor is a comparator for detecting rotor positional information with
the back EMF signal generated when the motor rotates. The IC determines the timing at which the output block applies
current to the motor based on the position information obtained here. Insert a capacitor (between 1,000 and 10,000pF:
Reference value) between the COMIN pin (pin 4) and FIL (pin 5) to prevent any motor startup miss-operation that is
caused by the comparator input noise.
Please confirm the operation when starting without fail, and adjust the constant again when you change the motor
shape change and the motor characteristic (coil resistance, number of rolling lines, and magnetization, etc.) as well as
the capacitor of the OSC pin.
6. FG, 1/2FG Output Circuit
The FG pin (pin 10) and the 1/2FG pin (pin9) is the FG output pin.
The FG pin outputs the pulse of one hall corresponding, and the 1/2FG pin outputs the pulse of 1/2 hall corresponding.
Please use the pull-up resistor putting it because the FG pin and the 1/2FG pin are the open drain output compositions.
Please connect the power supply where the pull-up resistor is connected with the power supply on the side where the
FG signal is input. I will recommend about 10kΩ as resistance of the pull-up resistor.
7. RD (Lock detection) Output Circuit
The RD pin and (pin 11) are the RD output pin. Please use the pull-up resistor putting it because the RD pin is an open
drain output composition. Please connect the power supply where the pull-up resistor is connected with the power
supply on the side where the RD signal is input. About 10kΩ is recommended as resistance of the pull-up resistor.
No.A1878-6/7
SS30
8. Charge Pump Circuit
The SS30 n-channel DMOS output structure allows it to provide a charge pump based voltage step-up circuit. A
voltage 2 times the VCC voltage can be acquired by inserting capacitors (recommended value: 0.1μF or larger)
between the CP pin (pin 14) and CPC pin (pin 15). Note that this circuit is designed so that the stepped-up voltage
(VG) is clamped at about 9.5VDC. A larger capacitor must be used between the VG pin (pin 12) and ground if the
ripple on the stepped-up voltage (VG) results in VG exceeding 10V (VG max).
Observe the following points if the VG voltage is supplied from external circuits.
(1) The VG voltage supplied from the external circuits must not exceed the absolute maximum rating VG max.
(2) The capacitors between the CP pin (pin 14) and CPC pin (pin 15) are not required.
(3) Observe the correct sequence when turning the power supply on. Apply the VG voltage after first turning the
VCC voltage on, and cancel the VG voltage application before turning the VCC off.
(4) There is an IC-internal diode between the VCC and VG pins. Therefore, supply voltages such that VCC > VG
must never be applied to this IC.
9. Notes on PCB Pattern Design
The SS30 is a system driver IC implemented using the Bi-CMOS process; the IC chip includes bipolar circuits, MOS
logic circuits, and MOS drive circuits. As a result, extreme care is required with respect to the pattern layout when
designing application circuits.
(1) SGND/SUBGND and VCC/VM wiring layout
Please connect the SGND pin and the SUBGND pin by the beeline. Please connect the VCC pin and the VM pin by
the beeline similarly.
Insert a capacitor (recommended value: 1μF or larger) as near as possible to the pin between the power pin VCC
(pin 1)/VM (pin 2) and SGND pin (pin 7).
(2) Positioning the external components
The external components that are connected to SGND (pin 7) must be connected with lines that are as short as
possible.
External components connected between IC pins must be placed as near to the pins as possible.
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PS No.A1878-7/7