Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver DESCRIPTION NE83Q92 PIN CONFIGURATION The NE83Q92 is a low power BiCMOS coaxial transceiver interface (CTI) for Ethernet (10base5) and Thin Ethernet (10base2) local area networks. The CTI is connected between the coaxial cable and the Data Terminal Equipment (DTE) and consists of a receiver, transmitter, receive-mode collision detector, heartbeat generator and jabber timer (see Block Diagram). The transmitter output connects directly to a doubly terminated 50Ω cable, while the receiver output, collision detector output and transmitter input are connected to the DTE through isolation transformers. Isolation between the CTI and the DTE is an IEEE 802.3 requirement that can be met on signal lines by using a set of pulse transformers. Power isolation for the CTI is achieved using DC-to-DC conversion through a power transformer (see Figure 1, Connection Diagram). D, N Packages The part is fully pin compatible with the industry standard 8392, but has substantially lower current consumption, is fully compliant with the IEEE802.3 standard, and has additional features such as optional pull-down resistors (Figure 1, Note 4), and automatic selection between AUI and coaxial connections. CD+ 1 16 CDS CD– 2 15 TXO RX+ 3 14 VEE 4 13 VEE VEE 5 12 RR– RX– 6 11 RR+ TX+ 7 10 GND TX– 8 The NE83Q92 is manufactured on an advanced BiCMOS process and is available with PLCC and SOL packages which make it ideally suited to lap-top personal computers or systems where low power consumption, limited board space and jumperless design is required. Refer to selection flow chart for optimal apllication. HBE TXO N/C 20 19 RX+ 4 18 RXI V EE V EE V EE 5 17 V EE 6 16 V EE 7 15 RR– RX– 8 14 RR+ 13 CD+ CDS 4 3 2 1 RXI RX+ conditions to minimize current consumption 12 CD– • High efficiency AUI drivers automatically power-down under idle 11 TX– TX+ 10 GND 9 reduces external part count by not requiring external pull-down resistors N/C • Optimal implementation can use 1 Watt DC-DC converter and • Automatically disables AUI drivers when no coaxial cable is CDS CD– 1 TXO industry standard 8392 sockets (N & A options) 2 HBE 10BASE-2, and ISO 8802/3 interface specifications 3 GND • Fully compliant with Ethernet II, IEEE 802.3 10BASE-5 and CD+ A Packages FEATURES 28 27 26 V EE 5 V EE 6 V EE 7 V EE 8 V EE 9 V EE 10 V EE 11 20 19 RX– • Full ESD protection • Power-on reset prevents glitches on coaxial cable RR– 14 15 16 17 18 RR+ 12 13 available for repeater and advanced system applications V EE V EE V EE V EE V EE 21 GND • Expanded version (NE83Q93) with 5 LED status drivers is VEE 24 22 GND PLCC packages 25 23 HBE • Smart squelch on data inputs eliminates false activations • Advanced BiCMOS process for extremely low power operation • Available in 16-pin DIP, 16-pin SOL and both 20- and 28-pin TX– connected, allowing hard-wiring of AUI connection and local/integrated CTI connection TX+ • 100% drop-in compatible with 9 RXI SD00302 ORDERING INFORMATION TEMPERATURE RANGE ORDER CODE DWG # 16-Pin Plastic Dual In-Line Package (DIP) DESCRIPTION 0 to +70°C NE83Q92N SOT28-4 16-Pin Plastic Small Outline Large (SOL) Package 0 to +70°C NE83Q92D SOT162-1 20-Pin Plastic Leaded Chip Carrier (PLCC) Package 0 to +70°C NE83Q92A20 SOT380-1 28-Pin Plastic Leaded Chip Carrier (PLCC) Package 0 to +70°C NE83Q92A SOT261-3 1995 May 1 1 853-1737 15180 Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver NE83Q92 PIN DESCRIPTIONS PIN NO. N PKG PIN NO. PLCC-20 PIN NO. PLCC-28 SYMBOL DESCRIPTION 1 2 2 3 2 3 CD+ CD– Collision Outputs. Balanced differential line driver outputs which send a 10MHz signal to the DTE in the event of a collision, jabber interrupt or heartbeat test. External pull-down resistors are optional. 3 6 4 8 4 12 RX+ RX– Receiver Outputs. Balanced differential line driver outputs which send the received signal to the DTE. External pull-down resistors are optional. 7 8 9 10 13 14 TX+ TX– Transmitter Inputs. Balanced differential line receiver inputs which accept the transmission signal from the DTE and apply it to the coaxial cable at TXO, if it meets Tx squelch threshold. 9 12 15 HBE Heartbeat Enable. The heartbeat function is disabled when this pin is connected to VEE and enabled when connected to GND or left floating. 11 12 14 15 18 19 RR+ RR– External Resistor. A 1kΩ (1%) resistor connected between these pins establishes the signaling current at TXO. 14 18 26 RXI Receiver Input. This pin is connected directly to the coaxial cable. Received signals are equalized, amplified, and sent to the DTE through the RX± pins, if it meets Rx squelch threshold. 15 19 28 TXO Transmitter Output. This pin is connected directly (Thin Ethernet) or through an external isolating diode (Ethernet) to the coaxial cable. 16 20 1 CDS Collision Detect Sense. Ground sense connection for the collision detection circuitry. This pin should be connected directly to the coaxial cable shield for standard Ethernet operation. 10 11 13 16 17 GND Positive Supply Pin. 4 5 13 5–7 16 – 17 5 to 11 20 to 25 1 VEE N/C Negative supply pins. Not used. NOTE: 1. The IEEE 802.3 name for CD is CI; for RX is DI; for TX is DO. 1995 May 1 2 Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver NE83Q92 DTE INTERFACE COAX CABLE RXI BUFFER LINE DRIVER RECEIVE PAIR (RX+, RX–) RECEIVER EQUALIZER 4–POLE BESSEL LOW PASS FILTER RECEIVER AC–DC SQUELCH TXO TRANSMIT PAIR (TX+, TX–) TRANSMITTER CDS SENSE BUFFER TRANSMITTER SQUELCH COLLISION COMPARATOR & HEARTBEAT GENERATOR HEARTBEAT ENABLE COLLISION PAIR (CD+, CD–) 10MHz OSC JABBER TIMER LINE DRIVER SD00274 ABSOLUTE MAXIMUM RATINGS SYMBOL VEE PARAMETER Supply voltage1 input1 VIN Voltage at any TSTG Storage temperature range TSOLD Lead soldering temperature (10sec.) temperature2 TJ Recommended max junction θJA Thermal impedance (N and A packages) NOTE: 1. 100% measured in production. 2. The junction temperature is calculated from the following expression: TJ = TA + θJA [(VEE x 0.015 x nIDL) + (VEE x 0.027 x nRX) + (VEE x 0.075 x nTX)] where TA = Ambient temperature in °C. θJA = Thermal resistance of package. VEE = Normal operating supply voltage in volts. nIDL = Percentage of duty cycle idle nRX = Percentage of duty cycle receiving nTX = Percentage of duty cycle transmitting 1995 May 1 3 RATING UNIT –12 V 0 to –12 V –65 to +150 °C +300 °C +150 °C 60 °C/W Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver NE83Q92 ELECTRICAL CHARACTERISTICS VEE = –9V ±6%; TA = 0°C to +70°C unless otherwise specified1,2. No external isolation LIMITS SYMBOL VUVL IEE PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Under voltage lockout. Transceiver disabled for |VEE| < |VUVL| –7.5 Supply current idle –15 –20 mA –80 –90 mA +25 µA +3 µA Supply current transmitting (without collision) Without external pull-down resistors IRXI Receive input bias current VRXI = 0V ICDS Cable sense input bias current VCDS = 0V VIH HBE input HIGH voltage VIL HBE input LOW voltage IIH HBE input HIGH current VHBE = 0V IIL HBE input LOW current VHBE = VEE –2 +1 V VEE +2.4 V VEE +1.6 V +10 µA µA –30 ITDC Transmit output DC current level3 –37 –45 mA ITAC Transmit output AC current level3 ±28 ±ITDC mA ITX10 Transmit current –250 +250 µA –3.7 V –1580 mV VTCOM VTXO = –10V Transmitter output voltage compliance4 Measured by applying DC voltage at RXI (CDS = 0V) VCD Collision threshold5 VDIS AUI disable voltage at RXI VOD Differential output voltage – non idle at RX+ and CD±6 VOB Differential output voltage imbalance – idle at RX± and CD±7 VOC Output common mode voltage at RX± and CD± VRS Receiver squelch threshold VTS Transmitter squelch threshold RRXI Shunt resistance at RXI non–transmitting –1450 Measured as DC voltage at RXI –1530 –3.5 ±600 V ±1100 mV ±40 mV RXI = 0V –4.0 –5.5 –7.0 V VRXI average DC (CDS = 0V) –150 –250 –350 mV (VTX+ – VTX–) peak –175 –225 –275 mV 100 RXI8 kΩ CRXI Input capacitance at RTXO Shunt resistance at TXO transmitting 10 kΩ RAUIZ Differential impedance at RX± and CD± with no coaxial cable connected 6 kΩ Differential impedance at TX± 20 kΩ RTX 1 7.5 2 pF NOTES: 1. Currents flowing into device pins are positive. All voltages are referenced to ground unless otherwise specified. For ease of interpretation, the parameter limit that appears in the MAX column is the largest value of the parameter, irrespective of sign. Similarly, the value in the MIN column is the smallest value of the parameter, irrespective of sign. 2. All typical values are for VEE = –9V and TA = 27°C. 3. ITDC is measured as (VMAX + VMIN)/(2 x 25) where VMAX and VMIN are the max and min voltages at TXO with a 25Ω load between TXO and GND. ITAC is measured as (VMAX – VMIN)/(2 x 25). 4. The TXO pin shall continue to sink at least ITDC min when the idle (no signal) voltage on this pin is –3.7V. 5. Collision threshold for an AC signal is within 5% of VCD. 6. Measured on secondary side of isolation transformer (see Connection Diagram, Figure NO TAG). The transformer has a 1:1 turns ratio with an inductance between 30 and 100µH at 5MHz. 7. Measured as the voltage difference between the RX pins or the CD pins with the transformer removed. 8. Not 100% tested in production. 1995 May 1 4 Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver NE83Q92 TIMING CHARACTERISTICS VEE = –9V +6%; TA = 0 to 70°C, unless otherwise specified1. No external isolation diode on TXO. LIMITS SYMBOL PARAMETER TEST CONDITIONS tRON Receiver start up delay RXI to RX± (Figure 3) First received bit on RX± MIN TYP MAX UNIT VRXI = –2V peak 3 5 bits tRON +2 bits VRXI = –2V peak 20 50 ns tRR Differential output rise time on RX± and CD±2,3 5 7 ns tRF Differential output fall time on RX± and CD±2,3 5 7 ns tOS Differential output settling time on RX± and CD± to VOB = 40mV2 (see Figure 4) 1 tRJ Receiver and cable total jitter tRHI Receiver high to idle time First validly timed bit on RX± tRD Receiver prop. delay RXI to RX± ±2 Measured to +210mV Rise and fall time matching on RX+ and tTST Transmitter start–up delay TX± to TXO (Fig. 5) First transmitted bit on TXO Transmitter prop delay TX± to TXO (see Figure 5) tTR tTF ns ns 0.1 ±2 ns VTX+ = –1V peak 1 2 bits tTST + 2 bits First validly timed bit tTD ±6 850 tRF – tRR CD+5 tRM 200 µs VTX+ = 1V peak 5 20 50 ns Transmitter rise time 10% to 90% (see Figure 5) 20 25 30 ns Transmitter fall time 10% to 90% (see Figure 5) 20 25 30 ns 0 ±2 ns 0 ±2 ns ns mismatch5 tTM tTF – tTR tTS Transmitter added skew4,5 tTON Transmitter turn on pulse width (see Figure 5) VTX± = 1V peak 10 35 tTOFF Transmitter turn off pulse width (see Figure 5) tCON Collision turn on delay (see Figure 6) 0V to –2V step at RXI VTX+ = 1V peak 125 200 ns 13 bits tCOFF Collision turn off delay (see Figure 6) –2V to 0V step at RXI tCHI Collision high to idle time (see Figure 6) Measured to +210mV fCD Collision frequency (see Figure 6) tCP 200 8.5 10 16 bits 850 ns 11.5 MHz Collision signal pulse width (see Figure 6) 35 70 ns tHON Heartbeat turn on delay (see Figure 7) 0.6 1.6 µs tHW Heartbeat test duration (see Figure 7) 0.5 1.5 µs tJA Jabber activation delay measured from TX± to CD± (see Figure 8) 20 60 ms tJR Jabber reset delay measured from TX± to CD± (see Figure 8) 250 650 ms NOTES: 1. All typical values are for VEE = –9V and TA = 27°C. 2. Measured on secondary side of isolation transformer (see Figures NO TAG and 1, Connection Diagram). The transformer has a 1:1 turn ratio with an inductance between 30 and 100µH at 5MHz. 3. The rise and fall times are measured as the time required for the differential voltage to change from –225mV to +225mV, or +225mV to –225mV, respectively. 4. Difference in propagation delay between rising and falling edges at TXO. 5. Not 100% tested in production. 1995 May 1 5 Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver NE83Q92 FUNCTIONAL DESCRIPTION Transmitter Functions The NE83Q92 is a low power BiCMOS coaxial Ethernet transceiver which complies with the IEEE 802.3 specification and offers the following features: The transmitter has differential inputs and an open collector current driver output. The differential input common mode voltage is established by the CTI and should not be altered by external circuitry. Controlled rise and fall times of 25ns (±5ns) minimize higher harmonic components in the transmitted spectrum, while matching of these rise and fall times to typically 2ns minimizes signal jitter. The drive current levels of the CTI are set by an on-chip bandgap voltage reference and an external 1% resistor. An on-chip isolation diode is provided to reduce the transmitter’s coaxial cable load capacitance. For Thin Ethernet applications, no further external isolation diode is required, since the NE83Q92 meets the capacitive loading specifications. For Ethernet applications a further external diode should be added to reduce loading capacitance. 1. Low current consumption of typically 15mA when idle and 80mA while transmitting (without collision) allows smaller DC-DC converter to be used for the isolated power supply, (no external pull-down resistors). 2. Automatic selection between AUI cable and coaxial connections by placing the AUI outputs in a high impedance state when the coaxial cable is disconnected. This eliminates the need for changing a jumper position on the Ethernet board when selecting either Thin Ethernet or remote transceiver connections. The transmitter squelch circuit ensures that the transmitter can only be enabled if the transmitted packet begins with a 01 bit sequence where the negative-going differential signals are typically greater than 225mV in magnitude and 25ns in duration. 3. High efficiency AUI drivers for the RX± and CD± ports automatically power down when idling and are powered-up when a receive signal is detected. This is very important/useful for power sensitive applications such as lap-top computers or PCMCIA cards. The transmitter will be disabled at the end of a packet if there are no negative going signals of greater than 225mV for more than typically 150ns. Figure 5 illustrates transmitter timing. 4. The NE83Q92 advanced AUI driver (RX± and CD±) design requires no external pull-down resistors (500Ω) to drive a terminated (78Ω) AUI cable and still meets the IEEE 802.3 specification. The drivers will also operate correctly if external resistors are present, so that they can be retro-fitted into existing 8392 designs. However, an extra current of 7mA/output (for 500Ω resistors) would be generated, by these resistors, regardless of whenther the transceiver is idle or responding to traffic. Collision Functions The collision detection scheme implemented in the NE83Q92 is receive mode detection, which detects a collision between any two stations on the network with certainty at all times, irrespective of whether or not the local DTE is producing one of the colliding signals. This is the only detection scheme allowed by the IEEE 802.3 standard for both repeater and non-repeater nodes. Receiver Functions The collision circuitry consists of the 4-pole Bessel low pass filter, a comparator, a precision voltage reference that sets up the collision threshold, a heartbeat generator, a 10MHz oscillator, and a differential line driver. The receiver consists of an input buffer, a cable equalizer, a 4-pole Bessel low pass filter, a squelch circuit and a differential line driver. The buffer provides high input resistance and low input capacitance to minimize loading and reflections on the coaxial cable. The collision comparator monitors the DC level at the output of the low pass filter and enables the line driver if it is more negative than the collision threshold. A collision condition is indicated to the DTE by a 10MHz oscillation signal at the CD outputs and typically occurs within 700ns of the onset of the collision. The collision signal begins with a negative-going pulse and ends with a continuous high-to-idle state longer than 170ns. Figure 6 illustrates collision timing. The equalizer is a high pass filter that compensates for the low pass effect of the coaxial cable and results in a flatband response over all signal frequencies to minimize signal distortion. The 4-pole Bessel low pass filter extracts the average DC voltage level on the coaxial cable for use by the receiver squelch and collision detection circuits. At the end of every transmission, the heartbeat generator creates a pseudo collision to ensure that the collision circuitry is properly functioning. This pseudo collision consists of a 1µs burst of 10MHz oscillation at the line driver outputs approximately 1µs after the end of the transmission. The heartbeat function can be disabled externally by connecting the HBE (heartbeat enable) to VEE. This allows the CTI to be used in repeater applications. Figure 7 illustrates heartbeat timing. The receiver squelch circuit prevents noise on the coaxial cable from falsely triggering the receiver in the absence of a true signal. At the beginning of a packet, the receiver turns on when the DC level from the low pass filter exceeds the DC squelch threshold and the received packet has started with a 01 bit sequence with acceptable timing parameters. For normal signal levels this will take less than 500ns, or 5 bits. However, at the end of a packet, a fast receiver turn off is needed to reject both dribble bits on the coaxial cable and spurious responses due to settling of the on-chip bandpass filter. This is accomplished by an AC timing circuit that disables the receiver if the signal level on the coaxial cable remains high for typically 250ns and only enables the receiver again after approximately .5µs. Figures 3 and 4 illustrate receiver timing. Jabber Functions The jabber timer monitors the transmitter and inhibits transmission if it is active for longer than typically 30ms. The jabber circuit then enables the collision outputs for the remainder of the data packet and for typically 450ns (unjab time) after it has ended. At this point the transmitter becomes uninhibited. Figure 8 illustrates jabber timing. The differential line drivers provide typically +900mV signals to the DTE with less than 7ns rise and fall times. When in idle state (no received signal) their outputs provide <20mV differential voltage offset to minimize DC standing current in the isolation transformer. 1995 May 1 6 Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver Power-On Reset/Under Voltage Lockout/AUI Selection NE83Q92 Detection of Coaxial Cable Faults In the NE83Q92 there is no internal loopback path from the TX inputs to the RX outputs. This means that, when the local DTE is transmitting, the signal will only be present at the receiver outputs RX+ and RX– if it appears on the coaxial cable and is larger than the receiver squelch threshold VRS. If a short circuit fault condition occurs at the cable connector to the CTI, then no signal will appear at the receiver outputs. The transmit and receive squelch circuits of the NE83Q92 remain active if the absolute value of VEE is less than the threshold for under voltage lockout, VUVL. This prevents glitches from appearing on either the AUI or coaxial cable during power up and power down. There is no collision announcement during power up and the transceiver waits for 400ms before becoming enabled. In the case of an open circuit at the coaxial cable connector there will also be no signal at the receiver outputs due to the AUI disabling mode of the NE83Q92. However, a heartbeat signal will be present following a transmission attempt for the short circuit condition, but not for the open circuit. If RXI is disconnected from the coaxial cable after power up, its voltage will fall towards VEE. If the absolute value of this voltage exceeds the AUI disable voltage, VDIS, for longer than 800ms, the transmit and receive squelch circuits remain active and, in addition, the AUI drivers become high impedance. This permits AUI connections to be hard wired together, e.g., the coaxial transceiver and a 10BASE-T transceiver, with the signal path determined by which transceiver is connected to its external cable. A coaxial cable with only a single 50Ω termination will generate a collision not only at every transmission attempt, but also for every reception attempt due to the receive mode collision detection of the NE83Q92. There is a 400ms collision announcement on disconnecting RXI, but there is no announcement on re-connection. This feature can be disabled by pulling RXI up with a 200kΩ to ground. AUI CABLE 12 TO 15V DC + DC TO DC CONVERTER <200mA 9V (ISOLATED) – 500Ω 1 COLLISION PAIR 500Ω 500Ω 78Ω 2 DTE 16 (NOTE 4) 500Ω 15 T1 (NOTE 1) (NOTE 3) COAX 4 13 CD+ RECEIVE PAIR 78Ω 1 16 2 15 CD– 5 12 RX+ 3 VEE VEE 7 10 NE83C92 14 4 13 5 12 CTI 6 11 7 10 8 9 TX+ 8 9 78Ω TXO VEE GND TX– HBE Figure 1. Connection Diagram for Standard 8392 Applications 7 200kΩ RR+ 1kΩ 1% NOTES: 1. T1 is a 1:1 pulse transformer, with an inductance of 30 to 100µH. 2. IN916 or equivalent for Ethernet, not required for Thin Ethernet. 3. 78Ω resistors not required if AUI cable not present. 4. Not required for optimal integrated/local MAU application (No AUI cable, see Note 3), minimum current consumption. 5. Install 200kΩ to disable the 400ms collision announcement when disconnecting cable. 1995 May 1 (NOTE 2) RXI RR– RX– TRANSMIT PAIR CDS (NOTE 5) SD00309 Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver NE83Q92 MAU COAX I S O L A T I O N NE83Q92 COAX TRANSCEIVER INTERFACE SERIAL NETWORK INTERFACE (OPTIONAL) (AUI CABLE) NETWORK INTERFACE CONTROLLER B U S DTE MAU = Medium Attachment Unit AUI Cable = Attachment Unit Interface Cable (not used in Thin Ethernet applications) SD00307 Figure 2. Interface Diagram for Ethernet/Thin Ethernet Local Area Network RXI 1 2 3 4 PHASE VIOLATION ALLOWED 5 6 VALID TIMING 7 8 9 10 11 tRD 90% RX+ 10% 5 6 7 8 9 tRON+2 tTR tRON 10 tTF 11 tRF tRR SD00306 Figure 3. Receiver Timing RXI tOS tRHI RX+ SD00279 Figure 4. Receiver End–of–Packet Timing tTST+2 100ns tTST tTOFF TX+ 1 2 3 4 5 6 7 tTON tTD 8 9 10 TXO 11 90% 10% 1 2 3 4 5 6 7 8 9 tTR Figure 5. Transmitter Timing 1995 May 1 8 tTF tRR 10 11 tRF SD00305 Philips Semiconductors Product specification Low-power coaxial Ethernet transceiver RXI NE83Q92 0V –2V tCON tCOFF tCHI CD+ 1/FCD tCP SD00280 Figure 6. Collision Timing TX+ tHON tHW CD+ SD00281 Figure 7. Heartbeat Timing TX+ tJA tJR TXO CD+ SD00282 Figure 8. Jabber Timing 1995 May 1 9