INTEGRATED CIRCUITS PCA9536 4-bit I2C and SMBus I/O port Objective data sheet Philips Semiconductors 2004 Aug 20 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 DESCRIPTION The PCA9536 is 8-pin CMOS devices that provides 4 bits of General Purpose parallel Input/Output (GPIO) expansion for I2C/SMBus applications and were developed to enhance the Philips family of I@C I/O expanders. I/O expanders provides a simple solution when additional I/O is needed for ACPI power switches, sensors, pushbuttons, LEDs, fans, etc. The PCA9536 consists of a 4-bit Configuration register (Input or Output selection); 4-bit Input register, 4-bit Output register and an 4-bit Polarity inversion register (Active-HIGH or Active-LOW operation). The system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for each Input or Output is kept in the corresponding Input or Output register. The polarity of the read register can be inverted with the Polarity Inversion Register. All registers can be read by the system master. FEATURES • 4-bit I2C GPIO • Operating power supply voltage range of 2.3 to 5.5 V • 5 V tolerant I/Os • Polarity inversion register • Active low interrupt output • Low stand-by current • Noise filter on SCL/SDA inputs • No glitch on power-up • Internal power-on reset • 4 I/O pins which default to 4 inputs with 100 kΩ internal pull-up The power-on reset sets the registers to their default values and initializes the device state machine. The I2C address is fixed and allows only one device on the same I2C/SMBus. resistor • 0 to 400 kHz clock frequency • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 1000 V CDM per JESD22-C101 • Latch-up testing is done to JESDEC Standard JESD78 which exceeds 100 mA • Two packages offered: SO8 and TSSOP8 ORDERING INFORMATION PACKAGES TEMPERATURE RANGE ORDER CODE TOPSIDE MARK DRAWING NUMBER 8-Pin Plastic SO (wide) –40 °C to +85 °C PCA9536D PCA9536 SOT96-1 8-Pin Plastic TSSOP –40 °C to +85 °C PCA9536DP 9536 SOT505-1 Standard packing quantities and other packaging data are available at www.philipslogic.com/packaging. I2C is a trademark of Philips Semiconductors Corporation. SMBus as specified by the Smart Battery System Implementers Forum is a derivative of the Philips I2C patent. 2004 Aug 20 2 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 PIN CONFIGURATION I/O0 1 8 VDD I/O1 2 7 SDA I/O2 3 6 SCL GND 4 5 I/O3 SW02190 Figure 1. Pin configuration PIN DESCRIPTION PIN NUMBER SYMBOL 1, 2, 3, 5 I/O0–3 FUNCTION I/O0 to I/O3 4 VSS Supply ground 6 SCL Serial clock line 7 SDA Serial data line 8 VDD Supply voltage BLOCK DIAGRAM PCA9536 I/O0 SCL SDA INPUT FILTER I/O1 4-BIT I2C/SMBUS CONTROL INPUT/ OUTPUT PORTS I/O2 WRITE pulse READ pulse I/O3 VDD POWER-ON RESET VSS NOTE: ALL I/Os ARE SET TO INPUTS AT RESET SW02191 Figure 2. Block diagram 2004 Aug 20 3 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 REGISTERS Command Byte Command Register 2 – Polarity Inversion Register Protocol Function 0 Read byte Input port register 1 Read/write byte Output port register 2 Read/write byte Polarity inversion register 3 Read/write byte Configuration register X X X X N3 N2 N1 N0 default 0 0 0 0 0 0 0 0 This register allows the user to invert the polarity of the Input Port Register data. If a bit in this register is set (written with ‘1’), the corresponding Input Port data is inverted. If a bit in this register is cleared (written with a ‘0’), the Input Port data polarity is retained. The command byte is the first byte to follow the address byte during a write transmission. It is used as a pointer to determine which of the following registers will be written or read. “X” are “don’t care” bits and can be programmed with either “0” or “1”. Register 3 – Configuration Register Register 0 – Input Port Register bit X X X X I3 I2 I1 I0 default 1 1 1 1 1 1 1 1 bit X X X X C3 C2 C1 C0 default 1 1 1 1 1 1 1 1 This register configures the directions of the I/O pins. If a bit in this register is set, the corresponding port pin is enabled as an input with high impedance output driver. If a bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs with a weak pull-up to VDD. This register is a read only port. It reflects the incoming logic levels of the pins, regardless of whether the pin is defined as an input or an output by Register 3. Writes to this register have no effect. “X” are “don’t care” bits and can be programmed with either “0” or “1”. “X” are “don’t care” bits and can be programmed with either “0” or “1”. Register 1 – Output Port Register bit X X X X O3 O2 O1 O0 default 1 1 1 1 1 1 1 1 Power-on Reset When power is applied to VDD, an internal power-on reset holds the PCA9536 in a reset condition until VDD has reached VPOR. At that point, the reset condition is released and the PCA9536 registers and state machine will initialize to their default states. Thereafter, VDD must be lowered below 0.2 V to reset the device. This register reflects the outgoing logic levels of the pins defined as outputs by Register 3. Bit values in this register have no effect on pins defined as inputs. Reads from this register return the value that is in the flip-flop controlling the output selection, NOT the actual pin value. For a power reset cycle, VDD must be lowered below 0.2 V and then restored to the operating voltage. “X” are “don’t care” bits and can be programmed with either “0” or “1”. 2004 Aug 20 bit 4 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 SIMPLIFIED SCHEMATIC OF I/O0 TO I/O3 DATA FROM SHIFT REGISTER OUTPUT PORT REGISTER DATA CONFIGURATION REGISTER DATA FROM SHIFT REGISTER VDD Q D Q1 FF WRITE CONFIGURATION PULSE CK 100 kΩ Q D ESD PROTECTION DIODE Q FF I/O0 TO I/O3 WRITE PULSE CK Q Q2 OUTPUT PORT REGISTER INPUT PORT REGISTER D Q FF READ PULSE CK DATA FROM SHIFT REGISTER D ESD PROTECTION DIODE VSS INPUT PORT REGISTER DATA Q Q POLARITY REGISTER DATA FF WRITE POLARITY PULSE CK Q POLARITY INVERSION REGISTER SW02192 NOTE: At Power-on Reset, all registers return to default values. Figure 3. Simplified schematic of I/O0 to I/O3 I/O port When an I/O is configured as an input, FETs Q1 and Q2 are off, creating a high impedance input with a weak pull-up (100 kΩ typ.) to VDD. The input voltage may be raised above VDD to a maximum of 5.5 V. If the I/O is configured as an output, then either Q1 or Q2 is enabled, depending on the state of the output port register. Care should be exercised if an external voltage is applied to an I/O configured as an output because of the low impedance paths that exist between the pin and either VDD or VSS. 2004 Aug 20 5 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 Device address SLAVE ADDRESS 1 0 0 0 0 0 R/W 1 FIXED SW02193 Figure 4. PCA9536 address Bus transactions Data is transmitted to the PCA9536 registers using the write mode as shown in Figures 5 and 6. Data is read from the PCA9536 registers using the read mode as shown in Figures 7 and 8. These devices do not implement an auto-increment function so once a command byte has been sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent. 1 SCL 2 3 4 5 6 7 8 9 command byte slave address SDA S 1 0 0 0 0 0 1 start condition 0 A R/W 0 0 0 0 0 data to port 0 0 1 acknowledge from slave DATA 1 A A acknowledge from slave P acknowledge from slave WRITE TO PORT DATA OUT FROM PORT DATA 1 VALID tpv SW02194 Figure 5. WRITE to output port register 1 SCL 2 3 4 5 6 7 8 9 command byte slave address SDA S 1 0 start condition 0 0 0 0 1 0 R/W A 0 0 0 0 0 acknowledge from slave data to register 0 1 1/0 A DATA acknowledge from slave A P acknowledge from slave DATA TO REGISTER SW02195 Figure 6. WRITE to configuration or polarity inversion registers 2004 Aug 20 6 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port acknowledge from slave slave address S 1 0 0 0 0 PCA9536 0 1 0 acknowledge from slave COMMAND BYTE A A S acknowledge from slave slave address 1 0 0 0 0 0 R/W 1 1 acknowledge from master data from register DATA A A first byte R/W at this moment master-transmitter becomes master-receiver and slave-receiver becomes slave-transmitter data from register no acknowledge from master NA DATA P last byte SW02196 Figure 7. READ from register 1 SCL 2 3 4 5 6 7 8 9 slave address SDA S 1 0 start condition 0 0 0 data from port 0 1 1 R/W data from port DATA 1 A A acknowledge from slave DATA 4 acknowledge from master NA no acknowledge from master P stop condition READ FROM PORT DATA INTO PORT DATA 2 DATA 3 tph DATA 4 tps SW02197 NOTES: 1. This figure assumes the command byte has previously been programmed with 00h. 2. Transfer of data can be stopped at any moment by a stop condition. Figure 8. READ input port register 2004 Aug 20 7 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 TYPICAL APPLICATION VDD 2 kΩ VDD 1.8 kΩ 1.8 kΩ VDD MASTER CONTROLLER SCL SCL SDA SDA SUBSYSTEM 1 (e.g. temp sensor) I/O0 INT I/O1 GND I/O2 RESET I/O3 SUBSYSTEM 2 (e.g. counter) PCA9536 VSS A Controlled Switch (e.g. CBT device) ENABLE B NOTE: Device address is 1000001 I/O0, I/O2, I/O3, configured as outputs I/O1, configured as input SW02198 Figure 9. Typical application 2004 Aug 20 8 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 ABSOLUTE MAXIMUM RATINGS In accordance with the Absolute Maximum Rating System (IEC 134) PARAMETER SYMBOL VDD II CONDITIONS Supply voltage DC input current VI/O DC voltage on an I/O MIN MAX UNIT –0.5 6.0 V — ±20 mA VSS – 0.5 5.5 V II/O DC output current on an I/O — ±50 mA IDD Supply current — 85 mA ISS Supply current — 100 mA Ptot Total power dissipation — 200 mW Tstg Storage temperature range –65 +150 °C Tamb Operating ambient temperature –40 +85 °C TJ(MAX) Maximum junction temperature — +125 °C 2004 Aug 20 9 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 HANDLING Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC24 under ”Handling MOS devices”. DC CHARACTERISTICS VDD = 2.3 to 5.5 V; VSS = 0 V; Tamb = –40 °C to +85 °C; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNIT 2.3 — 5.5 V Supplies VDD Supply voltage IDD Supply current Operating mode; VDD = 5.5 V; no load; fSCL = 100 kHz — 104 175 µA Istbl Standby current Standby mode; VDD = 5.5 V; no load; VI = VSS; fSCL = 0 kHz; I/O = inputs — 225 350 µA Istbh Standby current Standby mode; VDD = 5.5 V; no load; VI = VDD; fSCL = 0 kHz; I/O = inputs — 0.25 1 µA Power-on reset voltage (Note 1) No load; VI = VDD or VSS — 1.5 1.65 V VPOR input SCL; input/output SDA VIL LOW-level input voltage –0.5 — 0.3 VDD V VIH HIGH-level input voltage 0.7 VDD — 5.5 V IOL LOW-level output current VOL = 0.4 V 3 tbd — mA IL Leakage current VI = VDD = VSS –1 — +1 µA CI Input capacitance VI = VSS — 6 10 pF VIL LOW-level input voltage –0.5 — 0.8 V VIH HIGH-level input voltage I/Os IOL O VOH O LOW level output current LOW-level HIGH level output voltage HIGH-level 2.0 — 5.5 V VOL = 0.5 V; VDD = 2.3 V; Note 2 8 10 — mA VOL = 0.7 V; VDD = 2.3 V; Note 2 10 13 — mA VOL = 0.5 V; VDD = 4.5 V; Note 2 8 17 — mA VOL = 0.7 V; VDD = 4.5 V; Note 2 10 24 — mA VOL = 0.5 V; VDD = 3.0 V; Note 2 8 14 — mA VOL = 0.7 V; VDD = 3.0 V; Note 2 10 19 — mA IOH = –8 mA; VDD = 2.3 V; Note 3 1.8 — — V IOH = –10 mA; VDD = 2.3 V; Note 3 1.7 — — V IOH = –8 mA; VDD = 3.0 V; Note 3 2.6 — — V IOH = –10 mA; VDD = 3.0 V; Note 3 2.5 — — V IOH = –8 mA; VDD = 4.75 V; Note 3 4.1 — — V IOH = –10 mA; VDD = 4.75 V; Note 3 4.0 — — V IIH Input leakage current VDD = 3.6 V; VI = VDD — — 1 µA IIL Input leakage current VDD = 5.5 V; VI = VSS — — –100 µA CI Input capacitance — 3.7 5 pF CO Output capacitance — 3.7 5 pF NOTES: 1. VDD must be lowered to 0.2 V in order to reset part. 2. The total current sunk by all I/Os must be limited to 100 mA. 3. The total current sourced by all I/Os must be limited to 85 mA. 2004 Aug 20 10 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 AC SPECIFICATIONS SYMBOL STANDARD MODE I2C-bus PARAMETER fSCL Operating frequency tBUF FAST MODE I2C-bus UNITS MIN MAX MIN MAX 0 100 0 400 kHz Bus free time between STOP and START conditions 4.7 — 1.3 — µs tHD;STA Hold time after (repeated) START condition 4.0 — 0.6 — µs tSU;STA Repeated START condition setup time 4.7 — 0.6 — µs tSU;STO Setup time for STOP condition 4.0 — 0.6 — µs tHD;DAT Data in hold time 0 — 0 — ns tVD;ACK Valid time for ACK 0.3 3.45 0.1 0.9 µs tVD;DAT Data out valid time3 300 — 50 — ns tSU;DAT Data setup time 250 — 100 — ns condition2 tLOW Clock LOW period 4.7 — 1.3 — µs tHIGH Clock HIGH period 4.0 — 0.6 — µs tF Clock/Data fall time — 300 20 + 0.1 Cb1 300 ns 1 tR Clock/Data rise time — 1000 20 + 0.1 Cb 300 ns tSP Pulse width of spikes that must be suppressed by the input filters — 50 — 50 ns tPV Output data valid — 200 — 200 ns tPS Input data setup time 100 — 100 — ns tPH Input data hold time 1 — 1 — µs Port Timing NOTES: 1. Cb = total capacitance of one bus line in pF. 2. tVD;ACK = time for Acknowledgement signal from SCL LOW to SDA (out) LOW. 3. tVD;DAT = minimum time for SDA data out to be valid following SCL LOW. SDA tLOW tF tR tSU;DAT tF tHD;STA tSP tR tBUF SCL S tHD;STA tHD;DAT tHIGH tSU;STA SR tSU;STD P S SU01469 Figure 10. Definition of timing 2004 Aug 20 11 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port BIT 7 MSB (A7) START CONDITION (S) PROTOCOL t t SU;STA PCA9536 BIT 6 (A6) t HIGH LOW BIT 0 (R/W) STOP CONDITION (S) ACKNOWLEDGE (A) 1 / f SCL SCL t t f tr BUF SDA t t HD;STA t SU;DAT t HD;DAT tSU;STO VD;DAT t VD;ACK Figure 11. I2C-bus timing diagram; rise and fall times refer to VIL and VIH VDD VDD Open RL = 500 Ω VO VI PULSE GENERATOR D.U.T. RT CL 50 pF DEFINITIONS RL = Load resistor. CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to the output impedance ZO of the pulse generators. SW02181 Figure 12. Test circuitry for switching times 2VDD 500 Ω From Output Under Test S1 Open GND 500 Ω CL = 50 pF Load Circuit TEST S1 tpv 2 VDD SA00652 Figure 13. Test circuit 2004 Aug 20 12 SW02210 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 SO8: plastic small outline package; 8 leads; body width 3.9 mm 2004 Aug 20 13 SOT96-1 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm 2004 Aug 20 14 SOT505-1 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 REVISION HISTORY Rev Date Description _1 20040820 Objective data sheet (9397 750 12895). 2004 Aug 20 15 Philips Semiconductors Objective data sheet 4-bit I2C and SMBus I/O port PCA9536 Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the components in the I2C system provided the system conforms to the I2C specifications defined by Philips. This specification can be ordered using the code 9398 393 40011. Data sheet status Level Data sheet status [1] Product status [2] [3] Definitions I Objective data sheet Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data sheet Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data sheet Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. Definitions Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes — Philips Semiconductors reserves the right to make changes in the products—including circuits, standard cells, and/or software—described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Koninklijke Philips Electronics N.V. 2004 All rights reserved. Printed in U.S.A. Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 Date of release: 08-04 For sales offices addresses send e-mail to: [email protected]. Document order number: Philips Semiconductors 2004 Aug 20 16 9397 750 12895