BSO052N03S OptiMOS™2 Power-Transistor Product Summary Features V DS 30 V • Fast switching MOSFET for SMPS R DS(on),max 5.2 mΩ • Optimized technology for notebook DC/DC converters ID 17 A • Qualified according to JEDEC1) for target applications PG-DSO-8 • N-channel • Logic level • Excellent gate charge x R DS(on) product (FOM) • Very low on-resistance R DS(on) • Superior thermal resistance • Avalanche rated • Pb-free plating; RoHS compliant • Halogen-free according to IEC61249-2-21 Type Package Marking BSO052N03S PG-DSO-8 052N3S Maximum ratings, at T j=25 °C, unless otherwise specified Parameter Continuous drain current Value Symbol Conditions ID 10 secs steady state T A=25 °C2) 17 14 T A=70 °C2) 14 11 Pulsed drain current I D,pulse T A=25 °C3) 68 Avalanche energy, single pulse E AS I D=17 A, R GS=25 Ω 380 Reverse diode dv /dt dv /dt I D=17 A, V DS=20 V, di /dt =200 A/µs, T j,max=150 °C 6 Gate source voltage V GS Power dissipation P tot Operating and storage temperature T j , T stg T A=25 °C2) 2.5 A mJ kV/µs ±20 V 1.56 -55 ... 150 W °C 55/150/56 IEC climatic category, DIN IEC 68-1 Rev. 2.0 Unit page 1 2009-11-04 BSO052N03S Parameter Values Symbol Conditions Unit min. typ. max. - - 30 minimal footprint, t p≤10 s - - 110 minimal footprint, steady state - - 150 6 cm2 cooling area2), t p≤10 s - - 50 6 cm2 cooling area2), steady state - - 80 30 - - Thermal characteristics Thermal resistance, junction - soldering point R thJS Thermal resistance, junction - ambient R thJA K/W Electrical characteristics, at T j=25 °C, unless otherwise specified Static characteristics Drain-source breakdown voltage V (BR)DSS V GS=0 V, I D=1 mA Gate threshold voltage V GS(th) V DS=V GS, I D=70 µA 1.2 1.6 2 Zero gate voltage drain current I DSS V DS=30 V, V GS=0 V, T j=25 °C - 0.1 1 V DS=30 V, V GS=0 V, T j=125 °C - 10 100 V µA Gate-source leakage current I GSS V GS=20 V, V DS=0 V - 10 100 nA Drain-source on-state resistance R DS(on) V GS=4.5 V, I D=16 A - 5.4 6.7 mΩ V GS=10 V, I D=17 A - 4.3 5.2 - 1.2 - Ω 32 63 - S Gate resistance RG Transconductance g fs 1) |V DS|>2|I D|R DS(on)max, I D=17 A J-STD20 and JESD22 2) Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain connection. PCB is vertical in still air. 3) Rev. 2.0 see figure 3 page 2 2009-11-04 BSO052N03S Parameter Values Symbol Conditions Unit min. typ. max. - 4160 5530 - 1480 1970 Dynamic characteristics Input capacitance C iss Output capacitance C oss Reverse transfer capacitance C rss - 190 280 Turn-on delay time t d(on) - 9.7 15 Rise time tr - 7.4 11 Turn-off delay time t d(off) - 40 60 Fall time tf - 6.2 9.3 Gate to source charge Q gs - 11 15 Gate charge at threshold Q g(th) - 6.6 8.8 Gate to drain charge Q gd - 7.5 11 Switching charge Q sw - 12 17 Gate charge total Qg - 32 43 Gate plateau voltage V plateau - 2.7 - Gate charge total, sync. FET Q g(sync) V DS=0.1 V, V GS=0 to 5 V - 28 37 Output charge Q oss V DD=15 V, V GS=0 V - 35 47 - - 2.5 - - 68 V GS=0 V, V DS=15 V, f =1 MHz V DD=15 V, V GS=10 V, I D=8.5 A, R G=2.7 Ω pF ns Gate Charge Characteristics 4) V DD=15 V, I D=8.5 A, V GS=0 to 5 V nC V nC Reverse Diode Diode continous forward current IS Diode pulse current I S,pulse Diode forward voltage V SD V GS=0 V, I F=2.5 A, T j=25 °C - 0.72 1 Reverse recovery charge Qrr V R=15 V, I F=I S, di F/dt =400 A/µs - - 15 4) Rev. 2.0 T A=25 °C A See figure 16 for gate charge parameter definition page 3 2009-11-04 BSO052N03S 1 Power dissipation 2 Drain current P tot=f(T A); t p≤10 s I D=f(T A); V GS≥10 V; t p≤10 s 3 20 2.5 15 I D [A] P tot [W] 2 1.5 10 1 5 0.5 0 0 0 40 80 120 160 0 40 80 T A [°C] 120 3 Safe operating area 4 Max. transient thermal impedance I D=f(V DS); T A=25 °C1); D =0 Z thJS=f(t p) parameter: t p parameter: D =t p/T 102 160 T A [°C] 102 100 100 33 µs 100 µs 0.5 10 1 limited by on-state resistance 10 1 ms 10 1 10 0.2 Z thJS [K/W] I D [A] 0.1 10 ms 10 0 1 0.05 10 0 1 0.02 10 s 10-1 0.01 10-1 0.1 0.1 DC single pulse 10-2 0.1 10 Rev. 2.0 10-2 0.01 1 -1 10 10 0 V DS [V] 10 100 1 10 2 page 4 0.01 0.00001 0.0001 0.001 0.01 0.1 1 10-5 10-4 10-3 10-2 10-1 100 t p [s] 10 101 2009-11-04 BSO052N03S 5 Typ. output characteristics 6 Typ. drain-source on resistance I D=f(V DS); T j=25 °C R DS(on)=f(I D); T j=25 °C parameter: V GS parameter: V GS 60 10 10 V 4.5 V 50 3.3 V 40 3.2 V 3.4 V 8 3.8 V R DS(on) [mΩ] I D [A] 3.6 V 3.1 V 30 3V 4V 6 4.2 V 4.5 V 5V 10 V 4 20 2 2.8 V 10 2.6 V 0 0 0 1 2 3 0 10 20 V DS [V] 30 40 I D [A] 7 Typ. transfer characteristics 8 Typ. forward transconductance I D=f(V GS); |V DS|>2|I D|R DS(on)max g fs=f(I D); T j=25 °C parameter: T j 60 100 50 80 40 g fs [S] I D [A] 60 30 40 20 20 10 125 °C 25 °C 0 0 0 1 2 3 4 Rev. 2.0 0 10 20 30 I D [A] V GS [V] page 5 2009-11-04 BSO052N03S 9 Drain-source on-state resistance 10 Typ. gate threshold voltage R DS(on)=f(T j); I D=17 A; V GS=10 V V GS(th)=f(T j); V GS=V DS parameter: I D 10 2.5 9 8 2 7 700 µA 98 % V GS(th) [V] R DS(on) [mΩ] 6 5 typ 4 1.5 70 µA 1 3 2 0.5 1 0 0 -60 -20 20 60 100 140 180 -60 -20 20 60 100 140 180 T j [°C] T j [°C] 11 Typ. capacitances 12 Forward characteristics of reverse diode C =f(V DS); V GS=0 V; f =1 MHz I F=f(V SD) parameter: T j 104 100 10000 150 °C 25 °C Ciss 150 °C, 98 % 10 103 I F [A] C [pF] Coss 1000 1 25 °C, 98% Crss 102 0.1 100 0 5 10 15 20 25 30 Rev. 2.0 0.0 0.2 0.4 0.6 0.8 1.0 1.2 V SD [V] V DS [V] page 6 2009-11-04 BSO052N03S 13 Avalanche characteristics 14 Typ. gate charge I AS=f(t AV); R GS=25 Ω V GS=f(Q gate); I D=8.5 A pulsed parameter: T j(start) parameter: V DD 100 12 15 V 10 6V V GS [V] I AV [A] 100 °C 10 24 V 8 25 °C 125 °C 6 4 2 1 0 1 10 100 1000 0 20 t AV [µs] 40 60 80 Q gate [nC] 15 Drain-source breakdown voltage 16 Gate charge waveforms V BR(DSS)=f(T j); I D=1 mA 36 V GS 34 Qg 32 V BR(DSS) [V] 30 28 V g s(th) 26 24 Q g(th) 22 Q sw Q gs 20 -60 -20 20 60 100 140 Q g ate Q gd 180 T j [°C] Rev. 2.0 page 7 2009-11-04 BSO052N03S Package Outline Rev. 2.0 PG-DSO-8 page 8 2009-11-04 BSO052N03S Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. 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Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Rev. 2.0 page 9 2009-11-04