ROHM BD50C0AWFP

Standard LDO Regulators
Standard Fixed Output
LDO Regulators with Shutdown Switch
BD33C0AWFP, BD50C0AWFP
No.11022EAT01
●Description
The BDXXC0AWFP Series is low-saturation regulator.
This IC has a built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits and a
thermal shutdown circuit that protects the IC from thermal damage due to overloading.
●Features
1) Output Current: 1A
2) Output Voltage: 3.3V/5.0V
2) High Output Voltage Precision : ±1%
3) Low saturation with PDMOS output
4) Built-in over-current protection circuit that prevents the destruction of the IC due to output short circuits
5) Built-in thermal shutdown circuit for protecting the IC from thermal damage due to overloading
6) Low ESR Capacitor
7) TO252-5 packaging
●Applications
Audiovisual equipments, FPDs, televisions, personal computers or any other consumer device
●Absolute maximum ratings (Ta=25℃)
Parameter
Symbol
Ratings
Unit
Vcc
-0.3 ~ +35.0
V
VCTL
-0.3 ~ +35.0
V
Pd
1.3
W
Operating Temperature Range
Topr
-40 ~ +105
℃
Storage Temperature Range
Tstg
-55 ~ +150
℃
Tjmax
+150
℃
Supply Voltage
*1
Output Control Voltage
Power Dissipation (TO252-5)
Maximum Junction Temperature
*2
*1 Not to exceed Pd.
*2 TO252-5:Reduced by 10.4mW / ℃ over Ta = 25℃, when mounted on glass epoxy board: 70mm×70mm×1.6mm.
NOTE : This product is not designed for protection against radioactive rays.
●Operating conditions (Ta=25℃)
Parameter
Symbol
Min.
Max.
Unit
Supply Voltage
Vcc
Vo+1V
25.0
V
Output Control Voltage
VCTL
0
25.0
V
Io
0
1.0
A
Output Current
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1/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Electrical characteristics
■BD33C0AWFP(Unless otherwise specified, Ta=25℃, Vcc=8.3V,VCTL=5V,Io=0mA)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Shut Down Current
Isd
-
0
10
µA
Bias Current
Ib
-
0.5
1.0
mA
Output Voltage
Vo
3.267
3.300
3.333
V
Io=200mA
Dropout Voltage
ΔVd
-
0.4
0.7
V
Vcc=Vo×0.95, Io=500mA
Ripple Rejection
R.R.
45
55
-
dB
*1
f=120Hz,ein =1Vrms,
Io=100mA
Line Regulation
Reg.I
-
20
60
mV
Vo+1V→25V
Load Regulation
Reg.L
-
V
Io=5mA→1A
Tcvo.1
-
+0.04
-
%/℃
Io=5mA,Tj=-40~-20℃
Tcvo.2
-
±0.005
-
%/℃
Io=5mA,Tj=-20~+105℃
CTL ON Mode Voltage
VthH
2.0
-
-
V
ACTIVE MODE
CTL OFF Mode Voltage
VthL
-
-
0.8
V
OFF MODE
CTL Bias Current
ICTL
-
25
50
µA
Temperature Coefficient of
Output Voltage
*1
Vo×0.010 Vo×0.020
Conditions
VCTL=0V
ein : Input Voltage Ripple
■BD50C0AWFP(Unless otherwise specified, Ta=25℃, Vcc=10V,VCTL=5V,Io=0mA)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Shut Down Current
Isd
-
0
10
µA
Bias Current
Ib
-
0.5
1.0
mA
Output Voltage
Vo
4.950
5.000
5.050
V
Io=200mA
Dropout Voltage
ΔVd
-
0.3
0.5
V
Vcc=Vo×0.95, Io=500mA
Ripple Rejection
R.R.
45
55
-
dB
*1
f=120Hz,ein =1Vrms,
Io=100mA
Line Regulation
Reg.I
-
20
60
mV
Vo+1V→25V
Load Regulation
Reg.L
-
V
Io=5mA→1A
Tcvo.1
-
+0.04
-
%/℃
Io=5mA,Tj=-40~-20℃
Tcvo.2
-
±0.005
-
%/℃
Io=5mA,Tj=-20~+105℃
CTL ON Mode Voltage
VthH
2.0
-
-
V
ACTIVE MODE
CTL OFF Mode Voltage
VthL
-
-
0.8
V
OFF MODE
CTL Bias Current
ICTL
-
25
50
µA
Temperature Coefficient of
Output Voltage
*1
Vo×0.010 Vo×0.020
Conditions
VCTL=0V
ein : Input Voltage Ripple
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2/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Electrical characteristic curves (Reference data)
■BD33C0AWFP(Unless otherwise specified, Ta=25℃, Vcc=8.3V,VCTL=5V,Io=0mA)
6
0.8
15
5
OUTPUT VOLTAGE : Vo [V]
18
STANBY CURRENT: Isd [µA]
CIRCUIT CURRENT: Ib+IFEEDBACK_R
1.0
12
[mA]
0.6
0.4
0.2
0.0
9
6
3
0
5
4
3
2
1
Fig.3 Line Regulation
(Io=0mA)
800
700
600
4
500
3
400
300
2
200
1
100
0
0
0
0
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
400
800
1200
1600
2000
Fig.5 Load Regulation
60
50
40
30
20
CIRCUIT CURRENT: Ib+IFEEDBACK_R [mA]
OUTPUT VOLTAGE : Vo [V]
70
5
4
3
2
1
10
0
1000000
0
-40
FREQUENCY: f [Hz]
0
20
40
60
80
1000
100
1.0
0.8
0.6
0.4
0.2
0.0
0
AMBIENT TEMPERATURE: Ta[℃]
200
400
600
800
1000
OUTPUT CURRENT: Io [mA]
Fig.9 Circuit Current
(lo=0mA→1000 mA)
Fig.8 Output Voltage
Temperature Characteristics
Fig.7 Ripple Rejection
(lo=100mA)
100
-20
200
400
600
800
OUTPUT CURRENT: IO [mA]
Fig.6 Dropout Voltage
(Vcc=Vo×0.95V)
(lo=0mA→1000mA)
6
80
100000
0
OUTPUT CURRENT: IO[mA]
Fig.4 Line Regulation
(Io=500mA)
RIPPLE REJECTION: R.R. [dB]
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
DROPOUT VOLTAGE : ΔVd [mV]
5
OUTPUT VOLTAGE : Vo [V]
OUTPUT VOLTAGE : Vo [V]
6
10000
1
Fig.2 Shut Down Current
6
1000
2
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
Fig.1 Circuit Current
100
3
0
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
10
4
6
6
5
5
80
70
OUTPUT VOLTAGE : Vo [V]
OUTPUT VOLTAGE : Vo [V]
CIRCUIT CURRENT: I CTL[µA]
90
4
60
50
4
3
40
3
2
30
20
2
1
1
10
0
0
0 2 4 6 8 10 12 14 16 18 20 22 24
CONTROL VOLTAGE: VCTL[V]
Fig.10 CTL Voltage vs CTL Current
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0 2 4 6 8 10 12 14 16 18 20 22 24
CONTROL VOLTAGE: VCTL[V]
Fig.11 CTL Voltage vs Output Voltage
3/12
0
130
140
150
160
170
180
190
AMBIENT TEMPERATURE: Ta [℃]
Fig.12 Thermal Shutdown
Circuit Characteristics
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Electrical characteristic curves (Reference data)
■BD50C0AWFP (Unless otherwise specified, Ta=25℃, Vcc=10V,VCTL=5V,Io=0mA)
6
0.8
15
5
OUTPUT VOLTAGE : Vo [V]
18
STANBY CURRENT: Isd [µA]
CIRCUIT CURRENT: Ib+IFEEDBACK_R [mA]
1.0
12
0.6
0.4
0.2
9
6
3
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
5
4
3
2
1
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
Fig.14 Shut Down Current
Fig.15 Line Regulation
(Io=0mA)
600
500
400
4
300
3
200
2
100
1
0
0
0
0
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
400
800
1200
1600
OUTPUT CURRENT: IO[mA]
60
50
40
30
20
5
4
3
2
1
10
0
-40
0
100000
1000000
FREQUENCY: f [Hz]
OUTPUT VOLTAGE : Vo [V]
CIRCUIT CURRENT: I CTL[µA]
90
60
50
40
30
20
20
40
60
80
1000
100
0.6
0.4
0.2
0.0
0
200
6
5
5
3
2
1
600
800
1000
Fig.21 Circuit Current
(lo=0mA→1000 mA)
6
4
400
OUTPUT CURRENT: Io [mA]
Fig.20 Output Voltage
Temperature Characteristics
100
70
0
800
0.8
AMBIENT TEMPERATURE: Ta[℃]
Fig.19 Ripple Rejection
(lo=100mA)
80
-20
600
1.0
OUTPUT VOLTAGE : Vo [V]
10000
400
Fig.18 Dropout Voltage
(Vcc=Vo×0.95V)
(lo=0mA→1000mA)
CIRCUIT CURRENT: Ib+IFEEDBACK_R [mA]
OUTPUT VOLTAGE : Vo [V]
RIPPLE REJECTION: R.R. [dB]
70
1000
200
OUTPUT CURRENT: IO [mA]
6
80
100
0
2000
Fig.17 Load Regulation
Fig.16 Line Regulation
(Io=500mA)
10
1
DROPOUT VOLTAGE : ?Vd [mV]
5
OUTPUT VOLTAGE : Vo [V]
OUTPUT VOLTAGE : Vo [V]
6
2
0 2 4 6 8 10 12 14 16 18 20 22 24
SUPPLY VOLTAGE: Vcc [V]
Fig.13 Circuit Current
6
3
0
0
0.0
4
4
3
2
1
10
0
0
0 2 4 6 8 10 12 14 16 18 20 22 24
CONTROL VOLTAGE: VCTL[V]
Fig.22 CTL Voltage vs CTL Current
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0 2 4 6 8 10 12 14 16 18 20 22 24
CONTROL VOLTAGE: VCTL[V]
Fig.23 CTL Voltage vs Output Voltage
4/12
0
130
140
150
160
170
180
190
AMBIENT TEMPERATURE: Ta [℃]
Fig.24 Thermal Shutdown
Circuit Characteristics
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Measurement circuit for reference data Measurement circuit for reference data
■BDXXC0AWFP (
):Vo=5.0V
A
Vcc
(1.0μF)
2.2μF
CTL
Vo
Vo
Vcc
1μF
N.C.
(1.0μF)
2.2μF
GND
CTL
5V
N.C.
1μF
1μF
(1.0μF)
2.2μF
GND
CTL
GND
N.C.
V
5V
A
Measurement Circuit of Fig.2 and Fig.14
Measurement Circuit of Fig.1 and Fig.13
Vo
Vcc
Measurement Circuit of Fig.3 and Fig.15
V V
Vo
Vcc
(1.0μF)
2.2μF
1μF
CTL
N.C.
GND
Vo
Vcc
(1.0μF)
2.2μF
V
CTL
GND
N.C.
1μF
(1.0μF)
2.2μF
A
10V
5V
GND
N.C.
1μF
A
5V
Measurement Circuit of Fig.5 and Fig.17
Vo
Vcc
CTL
4.75V
500mA
5V
Measurement Circuit of Fig.4 and Fig.16
Vo
Vcc
Measurement Circuit of Fig.6 and Fig.18
Vo
Vcc
Vo
Vcc
1Vrms
(1.0μF)
2.2μF
~
CTL
GND
N.C.
(1.0μF)
2.2μF
1μF
CTL
GND
N.C.
(1.0μF)
2.2μF
1μF
V
10V
CTL
GND
N.C.
1μF
10V
100mA
10V
5V
5V
5V
A
Measurement Circuit of Fig.7 and Fig.19
Vo
Vcc
(1.0μF)
2.2μF
A
Measurement Circuit of Fig.8 and Fig.20
GND
Vo
Vcc
1μF
CTL
(1.0μF)
2.2μF
N.C.
10V
CTL
Measurement Circuit of Fig.9 and Fig.21
GND
N.C.
Vo
Vcc
1μF
(1.0μF)
2.2μF
V
CTL
GND
N.C.
1μF
V
10V
10V
5V
Measurement Circuit of Fig.10 and Fig.22
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Measurement Circuit of Fig.11 and Fig.23 Measurement Circuit of Fig.12 and Fig.24
5/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Block Diagrams
GND
FIN
VREF:Bandgap Reference
OCP:Over Current Protection Circuit
VREF
TSD:Thermal Shut Down Circuit
Driver
Driver:Power Transistor Driver
R1,R2:Feed back Resister
R2
OCP
R1
TSD
1
2
CTL
Vcc
3
3
4
N.C.
Vo
5
N.C.
Fig.25
Pin No.
Pin Name
Function
1
CTL
Output Control Pin
2
Vcc
Power Supply Pin
3
N.C.
N.C. Pin
4
Vo
5
N.C.
N.C. Pin
Output Pin
Fin
GND
GND
●TOP VIEW〈Package dimension〉
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6/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Input / Output Equivalent Circuit Diagrams
CTL Pin
Vcc Pin
200kΩ
Vcc
1kΩ
CTL
IC
200kΩ
Vo Pin
Vcc
15 kΩ
34kΩ(BD33C0AWFP)
56.6kΩ(BD50C0AWFP)
Vo
10kΩ
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7/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Thermal Design
5
Mounted on a Rohm standard board
Board size : 70 ㎜×70 ㎜×1.6 ㎜
Copper foil area :7 ㎜×7 ㎜
③4.80
4
POWER DISSIPATON:Pd[W]
4
POWER DISSIPATON:Pd[W]
5
Mounted on a Rohm standard board
Board size : 70 ㎜×70 ㎜×1.6 ㎜
Copper foil area :7 ㎜×7 ㎜
TO252-5θja=96.2(℃/W)
3
2
1.30
1
0
①2-layer board
(back surface copper foil area :15 ㎜×15 ㎜)
②2-layer board
(back surface copper foil area :70 ㎜×70 ㎜)
③4-layer board
(back surface copper foil area :70 ㎜×70 ㎜)
②3.50
3
①:θja=67.6℃/W
②:θja=35.7℃/W
③:θja=26.0℃/W
①1.85
2
1
0
0
25
50
75
100
125
150
0
25
AMBIENT T EMPERAT URE:Ta[℃]
50
75
100
125
150
AMBIENT T EMPERAT URE:Ta[℃]
Fig.26
Fig.27(Reference data)
When using at temperatures over Ta=25℃, please refer to the heat reducing characteristics shown in Fig.26 and Fig.27.
The IC characteristics are closely related to the temperature at which the IC is used, so it is necessary to operate the IC
at temperatures less than the maximum junction temperature Tjmax.
Fig.26 and Fig.27 shows the acceptable loss and heat reducing characteristics of the TO252-5 package. Even when the
ambient temperature Ta is a normal temperature (25℃), the chip (junction) temperature Tj may be quite high so please
operate the IC at temperatures less than the acceptable loss Pd.
The calculation method for power consumption Pc(W) is as follows :(Fig.27③)
Pc=(Vcc-Vo)×Io+Vcc×Ib
Acceptable loss Pd≧Pc
Solving this for load current Io in order to operate within the acceptable loss,
Io≦
Pd-Vcc×Ib
(Please refer to Fig.9,21 for Ib.)
Vcc:
Vo:
Io:
Ib:
Ishort:
Input voltage
Output voltage
Load current
Circuit current
Short current
Vcc-Vo
It is then possible to find the maximum load current IoMax with respect to the applied voltage Vcc at the time of thermal
design.
Calculation Example)
Io≦
When Ta=85℃
BD33C0AWFP:Vcc=8.3V,Vo=3.3V
BD50C0AWFP:Vcc=10V,Vo=5.0V
2.496-10×Ib
5
Io≦498.2mA
(Ib:0.5mA)
Fig.27③:θja=26.0℃/W → -38.4mW/℃
25℃=4.80W → 85℃=2.496W
Please refer to the above information and keep thermal designs within the scope of acceptable loss for all operating
temperature ranges. The power consumption Pc of the IC when there is a short circuit (short between Vo and GND) is :
Pc=Vcc×(Ib+Ishort)
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(Please refer to Fig.5,17 for Ishort.)
8/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Notes for use
1.
Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings (such as the input voltage or operating temperature range) may
result in damage to the IC. Assumptions should not be made regarding the state of the IC (e.g., short mode or open
mode) when such damage is suffered. If operational values are expected to exceed the maximum ratings for the device,
consider adding protective circuitry (such as fuses) to eliminate the risk of damaging the IC.
2.
Electrical characteristics described in these specifications may vary, depending on temperature, supply voltage, external
circuits and other conditions. Therefore, be sure to check all relevant factors, including transient characteristics.
3.
GND potential
The potential of the GND pin must be the minimum potential in the system in all operating conditions.
Ensure that no pins are at a voltage below the GND at any time, regardless of transient characteristics.
4.
Ground wiring pattern
When using both small-signal and large-current GND traces, the two ground traces should be routed separately but
connected to a single ground potential within the application in order to avoid variations in the small-signal ground
caused by large currents. Also ensure that the GND traces of external components do not cause variations on GND
voltage. The power supply and ground lines must be as short and thick as possible to reduce line impedance.
5.
Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result
in damage to the IC. Shorts between output pins or between output pins and the power supply or GND pins (caused by
poor soldering or foreign objects) may result in damage to the IC.
6.
Operation in strong electromagnetic fields
Using this product in strong electromagnetic fields may cause IC malfunction. Caution should be exercised in
applications where strong electromagnetic fields may be present.
7.
Testing on application boards
When testing the IC on an application board, connecting a capacitor directly to a low-impedance pin may subject the IC
to stress. Always discharge capacitors completely after each process or step. The IC’s power supply should always be
turned off completely before connecting or removing it from a jig or fixture during the evaluation process. To prevent
damage from static discharge, ground the IC during assembly and use similar precautions during transport and storage.
8.
Thermal consideration
Use a thermal design that allows for a sufficient margin in light of the Pd in actual operating conditions.
Consider Pc that does not exceed Pd in actual operating conditions. (Pd≧Pc)
Tjmax : Maximum junction temperature=150℃, Ta : Peripheral temperature[℃] ,
θja : Thermal resistance of package-ambience[℃/W], Pd : Package Power dissipation [W],
Pc : Power dissipation [W], Vcc : Input Voltage, Vo : Output Voltage, Io : Load, Ib : Bias Current
Package Power dissipation
Power dissipation
9.
: Pd (W)=(Tjmax-Ta)/θja
: Pc (W)=(Vcc-Vo)×Io+Vcc×Ib
Vcc pin
Insert a capacitor(Vo≧5V:capacitor≧1µF ~ , Vo<5V:capacitor≧2.2µF ~)between the Vcc and GND pins.
The appropriate capacitance value varies by application. Be sure to allow a sufficient margin for input voltage levels.
Electric capacitance
IC
Ceramic capacitors,Low ESR capacitors
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9/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
10.
Output pin
It is necessary to place capacitors between each output pin and GND to prevent oscillation on the output. Usable
capacitance values range from 1µF to 1000µF. Ceramic capacitors can be used as long as their ESR value is low
enough to prevent oscillation (0.001Ω to 20Ω). Abrupt fluctuations in input voltage and load conditions may affect the
output voltage. Output capacitance values should be determined only through sufficient testing of the actual
application.
●BD33C0AWFP
Vo=3.3V
Vcc=4.3V~25V
Io=0A~1A
Ta=-40℃~+105℃
Vcc=4.3V~25V(BD33C0AWFP)/6V~25V(BD50C0AWFP)
Ta=-40℃~+105℃
Cin=2.2μF~100μF Cout=1μF~100μF
100
●BD50C0AWFP
Vo=5V
Vcc=6V~25V
Io=0A~1A
Ta=-40℃~+105℃
100
100
Unstable operating region
Stable operating region
0.1
Stable operating region
10
0.01
2.2
0.001
1
Cin(μF)
1
Cin(μF)
Cout_ESR(Ω)
10
Stable operating region
10
Unstable
operating region
0
200
400
600
800
1000
1
1
10
Io(mA)
100
1
Cout_ESR vs Io(reference data)
10
100
Cout(μF)
Cout(μF)
Cin vs Cout(reference data)
Vo
Vcc
BD33C0AWFP(4.3V~25V)
BD50C0AWFP(6V~25V)
Cin
BD33C0AWFP (2.2μF~)
BD50C0AWFP (1.0μF~)
Cout(1.0μF~)
CTL
GND
N.C.
ESR
Io(ROUT)
(0.001Ω~)
VCTL
(5V)
※Operation Notes 10
Measurement circuit
11.
CTL pin
Do not make voltage level of chip enable pin keep floating level, or in between VthH and VthL. Otherwise, the output
voltage would be unstable or indefinite.
12.
For a steep change of the Vcc voltage
Because MOS FET for output Transistor is used when an input voltage change is very steep, it may evoke large current.
When selecting the value of external circuit constants, please make sure that the operation on the actual application
takes these conditions into account.
13.
For an infinitesimal fluctuations of output voltage.
At the use of the application that infinitesimal fluctuations of output voltage caused by some factors (e.g. disturbance
noise, input voltage fluctuations, load fluctuations, etc.), please take enough measures to avoid some influence (e.g.
insert the filter, etc.).
14.
Over current protection circuit (OCP)
The IC incorporates an integrated over-current protection circuit that operates in accordance with the rated output
capacity. This circuit serves to protect the IC from damage when the load becomes shorted. It is also designed to limit
output current (without latching) in the event of a large and instantaneous current flow from a large capacitor or other
component. These protection circuits are effective in preventing damage due to sudden and unexpected accidents.
However, the IC should not be used in applications characterized by the continuous or transitive operation of the
protection circuits.
15.
Thermal shutdown circuit (TSD)
The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of
thermal overload. It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used
after this function has activated, or in applications where the operation of this circuit is assumed.
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© 2011 ROHM Co., Ltd. All rights reserved.
10/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
16.
Applications or inspection processes where the potential of the Vcc pin or other pins may be reversed from their normal
state may cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1000µF or lower in
case Vcc is shorted with the GND pin while the external capacitor is charged. Insert a diode in series with Vcc to prevent
reverse current flow, or insert bypass diodes between Vcc and each pin.
17.
Positive voltage surges on VCC pin
A power zener diode should be inserted between VCC and GND for protection against voltage surges of more than 35V
on the VCC pin.
Vcc
GND
18.
Negative voltage surges on VCC pin
A schottky barrier diode should be inserted between VCC and GND for protection against voltages lower than GND on
the VCC pin.
Vcc
GND
19.
Output protection diode
Loads with large inductance components may cause reverse current flow during startup or shutdown. In such cases, a
protection diode should be inserted on the output to protect the IC.
20.
Regarding input pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them
isolated. PN junctions are formed at the intersection of these P layers with the N layers of other elements, creating
parasitic diodes and/or transistors. For example (refer to the figure below):
○When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
○When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in
mutual interference among circuits, operational faults, or physical damage. Accordingly, conditions that cause these
diodes to operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate)
should be avoided.
Transistor (NPN)
Resistor
B
(Pin B)
(Pin A)
(Pin B)
C
E
B
N
P
P+
N
P
P+
N
P+
N
P+
GND
Parasitic elements
or transistors
Parasitic elements
or transistors
N
P substrate
Parasitic elements
GND
E
P
N
N
C
(Pin A)
GND
Parasitic elements
Example of Simple Monolithic IC Architecture
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© 2011 ROHM Co., Ltd. All rights reserved.
11/12
2011.07 - Rev.A
Technical Note
BD33C0AWFP, BD50C0AWFP
●Ordering part number
B
Part No.
D
X
X
Output voltage
C
0
A
Current capacity
33: 3.3V output C0A:Output 1A
50:5.0V~
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© 2011 ROHM Co., Ltd. All rights reserved.
W
F
P
Shutdown switch Package
W : With switch FP : TO252
None : Without
switch
12/12
-
E
2
Packaging specification
E2: Embossed tape and reel
2011.07 - Rev.A
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
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The Products specified in this document are intended to be used with general-use electronic
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The Products specified in this document are not designed to be radiation tolerant.
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Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
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R1120A