INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF40374B MSI Octal D-type flip-flop with 3-state outputs Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF40374B MSI Octal D-type flip-flop with 3-state outputs The output stages have high current output capability suitable for driving highly capacitive loads. The device features hysteresis on the CP input to improve noise rejection. Schmitt-trigger action in the E input makes the circuit highly tolerant to slower input rise and fall times. DESCRIPTION The HEF40374B is an octal D-type flip-flop with 3-state buffered outputs with a common clock input (CP). The device is used primarily as an 8-bit positive edge-triggered storage register for interfacing with a 3-state bus. Data on the D-inputs is transferred to storage during the LOW-to-HIGH transition of the clock (CP) input. The 3-state output buffers are controlled by an active LOW output enable input (EO). A HIGH on EO forces the eight outputs to a high impedance OFF-state. When EO is LOW, the data in the register appears at the outputs. The HEF40374B is pin and functionally compatible with the TTL ‘374’ device. Supply voltage range: 3 to 15 V. Fig.1 Functional diagram. Fig.2 Pinning diagram. PINNING HEF40374BP(N): 20-lead DIL; plastic (SOT146-1) D0 to D7 data inputs HEF40374BD(F): 20-lead DIL; ceramic (cerdip) (SOT152) CP clock input EO output enable input (active LOW) HEF40374BT(D): 20-lead SO; plastic (SOT163-1) O0 to O7 3-state buffered outputs ( ): Package Designator North America FAMILY DATA, IDD LIMITS category MSI See Family Specifications January 1995 2 This text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here in _white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader.This text is here inThis text is here in white to force landscape pages to be rotated correctly when browsing through the pdf in the Acrobat reader. white to force landscape pages to be ... Philips Semiconductors 3 Octal D-type flip-flop with 3-state outputs January 1995 Fig.3 Logic diagram. Product specification HEF40374B MSI Philips Semiconductors Product specification HEF40374B MSI Octal D-type flip-flop with 3-state outputs FUNCTION TABLE INPUTS OPERATING MODES EO load & read register load register & disable outputs CP Dn INTERNAL REGISTER OUTPUTS O0 TO O7 L I L L L h H H H I L Z H h H Z Notes 1. H = HIGH state (the more positive voltage) h = HIGH state (one set-up time prior to the LOW-to-HIGH clock transition) L = LOW state (the less positive voltage) I = LOW state (one set-up time prior to the LOW-to-HIGH clock transition) Z = high impedance OFF-state = LOW-to-HIGH clock transition January 1995 4 Philips Semiconductors Product specification HEF40374B MSI Octal D-type flip-flop with 3-state outputs RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) See Family Specifications, except for: D.C. current into any input ± II max. 10 mA D.C. source or sink current into any output ± IO max. 25 mA D.C. current into the supply terminals ±I max. 100 mA DC CHARACTERISTICS VSS = 0 V VDD V VOH V VOL V Tamb (°C) SYMBOL −40 MIN. Output current HIGH Output current HIGH Output current LOW Hysteresis 5 4,6 10 9,5 15 13,5 5 3,6 10 8,4 15 13,2 −IOH 5 0,4 10 0,5 15 1,5 voltage at 10 clock input (CP) 15 VH MIN. TYP. 0,6 1,2 0,45 mA 1,5 3,0 1,1 mA 15,5 mA 15 50 9,3 10 24 10,7 mA 14,4 15 46 15,0 mA 19,5 20 62 19,8 mA 9,5 30,0 5 TYP. 0,75 2,9 IOL MIN. + 85 1,85 14,5 −IOH TYP. + 25 2,3 7,6 25 5,4 17 45 1,75 mA 5,50 mA 19,0 mA 220 mV 250 mV 320 mV (1) P-channel MOS transistor conducting. (2) P-channel MOS transistor and bipolar n-p-n transistor conducting. Fig.4 Typical output source current characteristic. January 1995 Fig.5 Schematic diagram of output stage. 5 Philips Semiconductors Product specification HEF40374B MSI Octal D-type flip-flop with 3-state outputs AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL MIN. TYP. TYPICAL EXTRAPOLATION FORMULA MAX. Propagation delays CP → On HIGH to LOW 5 10 tPHL 15 CP → On LOW to HIGH 5 10 tPLH 15 Output transition times HIGH to LOW LOW to HIGH 5 125 250 ns 113 ns + (0,24 ns/pF) CL 55 110 ns 54 ns + (0,01 ns/pF) CL 40 80 ns 36 ns + (0,07 ns/pF) CL 125 250 ns 122 ns + (0,06 ns/pF) CL 55 110 ns 53 ns + (0,03 ns/pF) CL 40 80 ns 39 ns + (0,02 ns/pF) CL 40 80 ns 20 40 ns 15 15 30 ns 5 30 60 ns 20 40 ns 15 15 30 ns 5 60 120 ns 30 60 ns 10 10 tTHL tTLH 3-state propagation delays Output disable times EO → On HIGH LOW 10 tPHZ 15 24 48 ns 5 70 140 ns 35 70 ns 15 30 60 ns 5 65 130 ns 10 tPLZ Output enable times EO → On HIGH LOW 10 tPZH 30 60 ns 15 24 48 ns 5 85 170 ns 35 70 ns 25 50 ns 10 tPZL 15 Set-up time Dn → CP Hold time Dn → CP 5 10 ns 20 2 ns 20 5 ns 5 20 10 ns 15 2 ns 10 0 ns 15 January 1995 0 15 10 tsu 20 thold 6 see Fig.6 Philips Semiconductors Product specification HEF40374B MSI Octal D-type flip-flop with 3-state outputs VDD V Minimum clock pulse width; LOW Maximum clock pulse frequency SYMBOL MIN. 5 10 tWCPL TYP. TYPICAL EXTRAPOLATION FORMULA MAX. 50 25 ns 25 12 ns 15 20 10 ns 5 25 5 MHz 6 12 MHz 8 17 MHz 10 fmax 15 AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; input transition times ≤ 20 ns Dynamic power VDD V TYPICAL FORMULA FOR P (µW) 5 3 775 fi + ∑ (foCL) × VDD2 dissipation per 10 15 700 fi + ∑ (foCL) × package (P) 15 40 575 fi + ∑ (foCL) × VDD2 VDD2 where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) tTLH − − − − tTHL Fig.6 Output transition times as a function of the load capacitance. . January 1995 7