PHILIPS 74LV4053D

INTEGRATED CIRCUITS
74LV4053
Triple 2-channel analog
multiplexer/demultiplexer
Product specification
Supersedes data of 1997 Jul 15
IC24 Data Handbook
1998 Jun 23
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
FEATURES
DESCRIPTION
• Optimized for low voltage applications: 1.0 to 6.0 V
• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V
• Low typ “ON” resistance:
•
74LV4053
The 74LV4053 is a low-voltage CMOS device and is pin and
function compatible with the 74HC/HCT4053.
The 74LV4053 is a triple 2-channel analog multiplexer/demultiplexer with
a common enable input (E). Each multiplexer/demultiplexer has two
independent inputs/outputs (nY0 to nY1), a common input/output (nZ)
and three digital select inputs (S1 to S3).
With E LOW, one of the two switches is selected (low impedance
ON-state) by S1 to S3 With E HIGH, all switches are in the high
impedance OFF-states, independent of S1 and S3.
VCC and GND are the supply voltage pins for the digital control inputs
(S1, to S3, and E). The VCC to GND ranges are 1.0 to 6.0 V. The
analog inputs/outputs (nY0, to nY1, and nZ) can swing between VCC
as a positive limit and VEE as a negative limit. VCC - VEE may not
exceed 6.0 V. For operation as a digital multiplexer/demultiplexer, VEE
is connected to GND (typically ground).
100 at Vcc – VEE = 4.5 V
150 at Vcc – VEE = 3.0 V
240 at Vcc – VEE = 2.0 V
Logic level translation: to enable 3 V logic to communicate with ± 3
V analog signals
Typical “break before make” built in
•
• Output capability: non-standard
• ICC category: MSI
QUICK REFERENCE DATA
GND = 0 V; Tamb = 25°C; tr =tf ≤ 2.5 ns
SYMBOL
PARAMETER
CONDITIONS
tPZH/tPZL
Turn “ON” time
E to VOS
Sn to VOS
tPHZ/tPLZ
Turn “OFF” time
E to VOS
Sn to VOS
CI
Input capacitance
CPD
Power dissipation capacitance per switch
CS
Maximum switch capacitance
independent (Y) common (Z)
TYPICAL
CL = 15 pF
RL = 1K
VCC = 3.3 V
UNIT
16
20
ns
17
16
3.5
See Notes 1 and 2
36
pF
F
5
8
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in µW)
PD = CPD × VCC2 × fi ((CL + CS) × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; CS = maximum switch capacitance in pF;
VCC = supply voltage in V;
((C +C ) × V 2 × f ) = sum of the outputs.
L
S
CC
o
2. The condition is VI = GND to VCC.
ORDERING INFORMATION
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
16-Pin Plastic DIL
PACKAGES
–40°C to +125°C
74LV4053 N
74LV4053 N
SOT38-1
16-Pin Plastic SO
–40°C to +125°C
74LV4053 D
74LV4053 D
SOT109-1
16-Pin Plastic SSOP Type II
–40°C to +125°C
74LV4053 DB
74LV4053 DB
SOT338-1
16-Pin Plastic TSSOP Type I
–40°C to +125°C
74LV4053 PW
74LV4053PW DH
SOT403-1
PIN CONFIGURATION
PIN DESCRIPTION
2Y1
1
16 VCC
2Y0
2
15 2Z
3Y1
3
14 1Z
3Z
4
13 1Y1
3Y0
5
12 1Y0
E
6
11 S1
VEE
7
GND 8
PIN NUMBER
10 S2
9
S3
SV01687
1998 Jun 23
PKG. DWG. #
2
SYMBOL
FUNCTION
2, 1
2Y0, 2Y1
Independent inputs/outputs
5, 3
3Y0, 3Y1
Independent inputs/outputs
6
E
Enable input (active LOW)
7
VEE
Negative supply voltage
8
GND
Ground (0 V)
11, 10, 9
S1 to S3
Select inputs
12, 13
1Y0, 1Y1
Independent inputs/outputs
14, 15, 4
1Z to 3Z
Common inputs/outputs
16
VCC
Positive supply voltage
853-2000 19618
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
LOGIC SYMBOL
74LV4053
FUNCTIONAL DIAGRAM
14
1Z
11
10
9
6
S1 1Y0
S2 1Y1
S3 2Y
0
E
12
16
V CC
1Z
14
1Y1
13
1Y0
12
2Z
15
13
2
2Y1
1
3Y0
5
3Y1
3
2Z
6
E
11
S1
3Z
15
4 SV01659
10
S2
LOGIC SYMBOL (IEEE/IEC)
6
9
#
MDX
3X1
3X2
15
10
S3
1
2
13
LOGIC
LEVEL
CONVERSION
2Y0
2
3Z
4
3Y1
3
3Y0
5
DECODER
12
1
#
2
4
3
9
1
G3
14
11
2Y1
#
5
SV01693
FUNCTION TABLE
INPUTS
E
Sn
CHANNEL
ON
L
L
nY0 – nZ
L
H
nY1 – nZ
H
X
None
GND
V EE
8
7
SV01694
NOTES:
H = HIGH voltage level
L
= LOW voltage level
X = don’t care
SCHEMATIC DIAGRAM (ONE SWITCH)
VCC
VCC
Y
VEE
VCC
VCC
VEE
from logic
VEE
Z
SV01695
1998 Jun 23
3
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
74LV4053
ABSOLUTE MAXIMUM RATINGS1, 2
In accordance with the Absolute Maximum Rating System (IEC 134).
Voltages are referenced to GND (ground = 0 V).
PARAMETER
SYMBOL
VCC
DC supply voltage
IIK
DC input diode current
ISK
IS
Tstg
Storage temperature range
PTOT
CONDITIONS
RATING
UNIT
–0.5 to +7.0
V
VI < –0.5 or VI > VCC + 0.5 V
20
mA
DC switch diode current
VO < –0.5 or VO > VCC + 0.5 V
20
mA
DC switch current
–0.5 V < VS < VCC + 0.5 V
25
mA
–65 to +150
°C
Power dissipation per package
– plastic DIL
– plastic mini-pack (SO)
– plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12 mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
DC supply voltage
VI
Input voltage
VO
Output voltage
Tamb
Operating ambient temperature range in free air
tr, tf
Input rise and fall times
CONDITIONS
MIN
TYP
MAX
UNIT
See Note 1 and Figure 5
1.0
3.3
6.0
V
0
–
VCC
V
0
–
VCC
V
+85
+125
°C
500
200
100
ns/V
See DC and AC
characteristics
–40
–40
VCC = 1.0 V to 2.0 V
VCC = 2.0 V to 2.7 V
VCC = 2.7 V to 6.0 V
–
–
–
–
–
–
NOTE:
1. The LV is guaranteed to function down to VCC = 1.0V (input levels GND or VCC); DC characteristics are guaranteed from VCC = 1.2V to VCC = 6.0V.
1998 Jun 23
4
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
74LV4053
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions, voltages are referenced to GND (ground = 0 V)
LIMITS
SYMBOL
PARAMETER
-40°C to +85°C
TEST CONDITIONS
MIN
VIH
VIL
HIGH level Input
voltage
LOW level Input
voltage
TYP1
-40°C to +125°C
MAX
MIN
VCC = 1.2 V
0.9
0.9
VCC = 2.0 V
1.4
1.4
VCC = 2.7 to 3.6 V
2.0
2.0
VCC = 4.5 V
3.15
3.15
VCC = 6.0 V
4.20
V
4.20
VCC = 1.2 V
0.3
0.3
VCC = 2.0 V
0.6
0.6
VCC = 2.7 to 3.6 V
0.8
0.8
VCC = 4.5 V
1.35
1.35
VCC = 6.0 V
1.80
1.80
±II
Input leakage
g
current
VCC = 3.6
1.0
1.0
2.0
2.0
±IS
Analog switch
OFF-state current
per channel
VCC = 3.6
VI = VIH or VIL
IVSI = VCC - GND
(See Figure 2)
1.0
1.0
2.0
2.0
±IS
Analog
g switch
ON-state current
1.0
1.0
VCC = 6.0
VI = VIH or VIL
VSI = VCC - GND
(See Figure 3)
2.0
2.0
Quiescent supply
y
current
VCC = 3.6 V
VI = VCC or GND
20.0
40
ICC
VCC = 6.0 V
VIS = GND or VCC;
VOS = VCC or GND
40.0
80
VCC = 2.7 to 3.6 V
VI = VCC – 0.6 V
500
850
VCC = 1.2 V
IS = 100 mA;
VIS = VCC to GND;
VI = VIH or VIL
∆ICC
RON
Additional
quiescent supply
current per input
ON-resistance
((peak))
VCC = 6.0
VCC = 6.0
VCC = 3.6
VI = VCC or GND
VCC = 2.0 V
180
365
435
VCC = 2.7 V
115
225
270
100
200
245
75
150
180
70
140
165
VCC = 3.0 to 3.6 V
VCC = 4.5 V
IS = 1000 mA
A;
VIS = VCC to GND;
VI = VIH or VIL
VCC = 6.0 V
VCC = 1.2 V
RON
ON-resistance
((rail))
IS = 100 mA;
VIS = GND;
VI = VIH or VIL
120
280
325
VCC = 2.7 V
75
170
195
70
155
180
50
120
135
45
105
120
VCC = 3.0 to 3.6 V
VCC = 4.5 V
VCC = 6.0 V
VCC = 1.2 V
RON
ON-resistance
((rail))
VI = VIH or VIL;
IS = 100 mA;
VIS = VCC
170
340
400
VCC = 2.7 V
105
210
250
95
190
225
70
140
165
65
125
150
VCC = 3.0 to 3.6 V
VCC = 4.5 V
VCC = 6.0 V
1998 Jun 23
5
µA
µA
µA
µA
µA
W
W
350
VCC = 2.0 V
VI = VIH or VIL;
IS = 1000 mA;
VIS = VCC
V
250
VCC = 2.0 V
A;
IS = 1000 mA
VIS = GND;
VI = VIH or VIL
UNIT
MAX
W
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
74LV4053
DC ELECTRICAL CHARACTERISTICS (Continued)
LIMITS
SYMBOL
PARAMETER
-40°C to +85°C
TEST CONDITIONS
TYP1
MIN
Maximum variation
of ON-resistance
b
between
any two
channels
DRON
VCC = 1.2 V
VCC = 2.0 V
VCC = 2.7 V
VCC = 3.0 to 3.6 V
VCC = 4.5 V
VCC = 6.0 V
-40°C to +125°C
MAX
MIN
5
4
4
3
2
VI = VIH or VIL;
VIS = VCC to GND
UNIT
MAX
W
NOTES:
1. All typical values are measured at Tamb = 25°C.
2. At supply voltages approaching 1.2 V, the analog switch ON-resistance becomes extremely non-linear. Therefore, it is recommended that
these devices be used to transmit digital signals only, when using these supply voltages.
HIGH
(from select inputs)
180
RON
(W)
V
VCC = 2.0 V
120
nYn
VCC = 3.0 V
nZ
60
V
is
= 0 to V
CC
I
– VEE
VCC = 4.5 V
is
VEE
0
0
1.2
2.4
SV01688
Figure 1. Test circuit for measuring ON-resistance (RON).
3.6
Vis (V)
4.8
SV01696
Figure 4. Typical ON-resistance (Ron) as a function of input
voltage (Vis) for Vis = 0 to VCC – VEE.
LOW
(from select inputs)
VCC – GND
(V)
nYn
6.0
nZ
A
A
operating area
4.0
ÎÎ
VI = VCC or VEE
VO = VEE or VCC
VEE
SV01660
2.0
Figure 2. Test circuit for measuring OFF-state current.
HIGH
(from select inputs)
0
2.0
4.0
6.0 VCC – VEE
(V)
SV01662
nYn
nZ
Figure 5. Guaranteed operating area as a
function of the supply voltages.
VO
A
(open circuit)
VI = VCC or VEE
VEE
SV01661
Figure 3. Test circuit for measuring ON-state current.
1998 Jun 23
6
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
74LV4053
AC CHARACTERISTICS
GND = 0 V; tr = tf ≤ 2.5ns; CL = 50pF
LIMITS
CONDITION
SYMBOL
–40 to +85 °C
PARAMETER
VCC
(V)
OTHER
1.2
tPHL/tPLH
tPZH/tPZL
20
13
15
52
10
12
4.5
4
9
10
6.0
3
7
8
1.2
100
34
65
77
25
48
56
192
38
45
3.0 to 3.6
RL = 1k;
1k
CL = 50 pF
Figures 13
and
d1
2.7
3.0 to 3.6
17
32
38
6.0
13
25
29
1.2
125
43
82
97
31
60
71
242
48
57
RL = 1k
CL = 50 pF
Figures 13
and 1
2.7
3.0 to 3.6
4.5
21
41
48
6.0
16
31
37
1.2
95
34
61
73
26
46
54
202
37
44
18
32
38
6.0
15
25
30
1.2
90
32
59
70
24
44
52
192
36
42
17
31
36
14
24
28
2.0
tPHZ/tPLZ
Turn-off time
E to Vos
RL = 1k
CL = 50 pF
Figures 13
and 1
2.7
3.0 to 3.6
4.5
2.0
tPHZ/tPLZ
Turn-off time
Sn to Vos
RL = 1k
CL = 50 pF
Figures 13
and 1
2.7
3.0 to 3.6
4.5
6.0
NOTES:
1. Unless otherwise stated, all typical values are measured at Tamb = 25°C
2. Typical values are measured at VCC = 3.3 V.
1998 Jun 23
UNIT
MAX
17
2.0
Turn-on time
Sn to Vos
MIN
6
RL = ∞;
CL = 50 pF
Figure 12
4.5
tPZH/tPZL
MAX
9
2.7
2.0
Turn-on time
E to Vos
TYP1
25
2.0
Propagation
g
delay
y
Vis to Vos
MIN
–40 to +125 °C
7
ns
ns
ns
ns
ns
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
74LV4053
ADDITIONAL AC CHARACTERISTICS
Recommended conditions and typical values
GND = 0 V; tr = tf ≤ 2.5ns
SYMBOL
TYP.
UNIT
VCC
(V)
Vis(p–p)
(V)
Sine-wave distortion
f = 1 kHz
0.80
0.40
%
3.0
6.0
2.75
5.50
RL = 10 kW; CL = 50 pf
Figures 9 and 10
Sine-wave distortion
f = 10 kHz
2.40
1.20
%
3.0
6.0
2.75
5.50
RL = 10 kW; CL = 50 pf
Figures 9 and 10
Switch “OFF” signal feed through
–50
–50
dB
3.0
6.0
Note 1
RL = 600 W; CL = 50 pf; f= 1 MHz
Figures 5 and 11
Crosstalk between any two
switches/multiplexers
–60
–60
dB
3.0
6.0
Note 1
RL = 600 W; CL = 50 pf; f= 1 MHz
Figure 8
Crosstalk voltage between enable or
address input to any switch
(peak-to-peak value)
110
120
mV
3.0
6.0
fmax
Minimum frequency response
(–3 dB)
180
200
MHz
3.0
6.0
CS
Maximum switch capacitance
5
pf
V(p–p)
PARAMETER
CONDITIONS
RL = 600 W; CL = 50 pf; f= 1 MHz
(Sn or E, square wave between VCC
and GND tr = tf = 6 ns) Figure 8
Note 2
RL = 50 W; CL = 50 pF
Figures 6, 8 and 9
GENERAL NOTES:
Vis is the input voltage at nYn or nZ terminal, whichever is assigned as an input.
VOS is the output voltage at nYn or nZ terminal, whichever is assigned as an output.
NOTES:
1. Adjust input voltage Vis is 0 dBm level (0 dBm = 1 mW into 600 W).
2. Adjust input voltage Vis is 0 dBm level at VOS for 1 MHz (0 dBm = 1 mW into 50 W).
5
(dB)
0
(dB)
0
–50
–5
–100
10
10
2
10
3
10
4
f (kHz)
10
5
10
10 2
10
6
10 3
10 4
10 5
10 6
f (kHz)
SV01636
SV01635
Figure 6. Typical switch “OFF” signal feed-through as a
function of frequency.
Figure 7. Typical frequency response.
NOTES TO FIGURES 6 AND 7:
Test conditions: VCC = 3.0 V; GND = 0 V; VEE = -3.0V; RL = 50 W; RSOURCE = 1kW.
VCC
0.1 mF
V
RL
VCC
2RL
nYn/nZ
VCC
2RL
2RL
nZ/nYn
nZ/nYn
nYn/nZ
Vos
is
channel
ON
2RL
CL
RL
2RL
channel
OFF
GND
CL
dB
GND
(a)
(b)
SV01663
Figure 8. Test circuit for measuring crosstalk between any two switches.
(a) channel ON condition; (b) channel OFF condition.
1998 Jun 23
8
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
NOTE TO FIGURE 8:
The crosstalk is defined as follows (oscilloscope output):
74LV4053
VCC
VCC
Sn or E
2R L
2R L
nYn/nZ
V(p – p)
nZ/nYn
DUT
2RL
2RL
CL
oscilloscope
SV01642
GND
VEE
SV01689
Figure 9. Test circuit for measuring
crosstalk between control and any switch.
NOTE TO FIGURE 9:
Adjust input voltage to obtain 0 dBm at VOS when Fin = 1 MHz. After
set-up frequency of fin is increased to obtain a reading of –3 dB at VOS.
VCC
0.1 F
2RL
nYn/nZ
nZ/nYn
Vis
sine-wave
Vos
2RL
channel
ON
CL
dB
GND
SV01667
Figure 10. Test circuit for measuring
minimum frequency response.
VCC
fin = 1 kHz
sine-wave
10 F
VCC
2RL
nYn/nZ
nZ/nYn
0.1 F
Vos
V
channel
ON
2RL
CL
distortion
meter
2RL
nYn/nZ
nZ/nYn
VOS
is
channel
OFF
GND
2RL
CL
dB
SV01691
GND
Figure 11. Test circuit for measuring sine-wave distortion.
SV01692
Figure 12. Test circuit for measuring
switch “OFF” signal feed-through.
1998 Jun 23
9
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
74LV4053
WAVEFORMS
VM = 1.5 V at 2.7 V ≤ VCC ≤ 3.6 V
VM = 0.5 × VCC at 2.7 V > VCC > 3.6 V
VOL and VOH are the typical output voltage drop that occur with the
output load
Vx = VOL + 0.3 V at 2.7 V ≤ VCC ≤ 3.6 V
VX = VOL + 0.1 × VCC at 2.7 V >VCC > 3.6 V
VY = VOH – 0.3 V at 2.7 V ≤ VCC ≤ 3.6 V
VY = VOH – 0.1 × VCC at 2.7 V >VCC > 3.6 V
VI
VI
INPUTS
INPUTS
VM
VM
GND
GND
t PLH
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VOL
V OH
VM
OUTPUTS
tPZL
tPLZ
t PHL
VM
VX
tPZH
tPHZ
V OL
VOH
SV01638
VY
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
GND
Figure 13. Input (Vis) to output (Vos) propagation delays.
VM
outputs
disabled
outputs
enabled
outputs
enabled
SV01640
Figure 14. Turn-on and turn-off times
for the inputs (Sn, E) to the output (Vos).
TEST CIRCUIT
PULSE
GENERATOR
2 VCC
Open
VEE
NEGATIVE
PULSE
90%
VM
1k
50 pF
CL
10%
0V
D.U.T.
RT
VI
VM
10%
1k
VO
Vl
tW
90%
S1
Vcc
tTHL (tf)
tTLH (tr)
tTLH (tr)
tTHL (tf)
90%
POSITIVE
PULSE
VEE
VI
90%
VM
VM
10%
tW
Test Circuit for Outputs
10%
0V
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
VCC
< 2.7V
VI
Test
S1
VIS
VCC
tPLH/tPHL
Open
Pulse
2.7 - 3.6V
2.7V
tPLZ/tPZL
2 VCC
VEE
> 3.6 V
VCC
tPHZ/tPZH
VEE
RT = Termination resistance should be equal to ZOUT of
pulse generators.
tr = tf =6ns, when measuring fmax, there is no constraint on
tr, tf with 50% duty factor.
VI
SY01738
Figure 15. Load circuitry for switching times.
1998 Jun 23
10
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
DIP16: plastic dual in-line package; 16 leads (300 mil)
1998 Jun 23
11
74LV4053
SOT38-4
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
SO16: plastic small outline package; 16 leads; body width 3.9 mm
1998 Jun 23
12
74LV4053
SOT109-1
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
SSOP16: plastic shrink small outline package; 16 leads; body width 5.3 mm
1998 Jun 23
13
74LV4053
SOT338-1
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm
1998 Jun 23
14
74LV4053
SOT403-1
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
NOTES
1998 Jun 23
15
74LV4053
Philips Semiconductors
Product specification
Triple 2-channel analog multiplexer/demultiplexer
74LV4053
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Formative or in Design
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Preliminary Specification
Preproduction Product
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Product Specification
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
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Date of release: 05-96
9397-750-04462