PHILIPS 74ALVCH162827DGG

INTEGRATED CIRCUITS
74ALVCH162827
20-bit buffer/line driver, non-inverting,
with 30 termination resistors (3-State)
Product specification
IC24 Data Handbook
1998 Sep 29
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30Ω
termination resistors (3-State)
FEATURES
74ALVCH162827
DESCRIPTION
• Complies with JEDEC standard no. 8-1A.
• CMOS low power consumption
• Direct interface with TTL levels
• Current drive ± 12 mA at 3.0 V
• MULTIBYTETM flow-through standard pin-out architecture
• Low inductance multiple VCC and GND pins for minimum noise
The 74ALVCH162827 high-performance CMOS device combines
low static and dynamic power dissipation with high speed and high
output drive.
The 74ALVCH162827 20-bit buffers provide high performance bus
interface buffering for wide data/address paths or buses carrying
parity. They have NAND Output Enables (nOE1, nOE2) for
maximum control flexibility.
The 74ALVCH162827 is designed with 30Ω series resistance in both
the pull-up and pull-down output structures. This design reduces line
noise in applications such as memory address drivers, clock drivers
and bus receivers/transmitters.
and ground bounce
• Integrated 30 W termination resistors
To ensure the high impedance state during power up or power
down, OE should be tied to VCC through a pullup resistor; the
minimum value of the resistor is determined by the
current-sinking/current-sourcing capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data
inputs at a valid logic level.
QUICK REFERENCE DATA
GND = 0V; Tamb = 25°C; tr = tf = 2.5ns
SYMBOL
PARAMETER
Propagation delay
tPHL/tPLH
nAn to nYn
CI
Input capacitance
CPD
CONDITIONS
VCC = 2.5V, CL = 30pF
VCC = 3.3V, CL = 50pF
Power dissipation
dissi ation capacitance
ca acitance per
er latch
VI = GND to VCC
Output enabled
Output disabled
1
TYPICAL
2.9
2.9
5
14
3
UNIT
ns
pF
pF
F
NOTES:
1. CPD is used to determine the dynamic power dissipation (PD in mW):
PD = CPD × VCC2 × fi + S (CL × VCC2 × fo) where:
fi = input frequency in MHz; CL = output load capacity in pF;
fo = output frequency in MHz; VCC = supply voltage in V;
S (CL × VCC2 × fo) = sum of outputs.
ORDERING INFORMATION
PACKAGES
TEMPERATURE RANGE
OUTSIDE NORTH AMERICA
NORTH AMERICA
DWG NUMBER
–40°C to +85°C
74ALVCH162827DGG
ACH162827DGG
SOT364-1
56-Pin Plastic TSSOP Type II
PIN DESCRIPTION
PIN NUMBER
SYMBOL
55, 54, 52, 51, 49, 48, 47, 45, 44, 43,
42, 41, 40, 38, 37, 36, 34, 33, 31, 30
1A0 - 1A9
2A0 - 2A9
Data inputs
2, 3, 5, 6, 8, 9, 10, 12, 13, 14,
15, 16, 17, 19, 20, 21, 23, 24, 26, 27
1Y0 - 1Y9
2Y0 - 2Y9
Data outputs
1, 56,
28, 29
1OE1 1OE2,
2OE1, 2OE2
4, 11, 18, 25, 32, 39, 46, 53
GND
Ground (0V)
7, 22, 35, 50
VCC
Positive supply voltage
1998 Sep 29
FUNCTION
Output enable inputs (active-LOW)
2
853-2127 20100
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30Ω
termination resistors (3-State)
PIN CONFIGURATION
LOGIC SYMBOL (IEEE/IEC)
1OE1
1
56
1OE2
1Y0
2
55
1A0
1Y1
3
54
1A1
GND
4
53
GND
1Y2
5
52
1A2
1Y3
6
51
1A3
VCC
7
1Y4
50
8
1Y5
74ALVCH162827
49
9
48
1OE2
10
47
1Y0
1Y1
52
5
1Y2
51
6
1Y3
49
8
1Y4
48
9
1Y5
47
10
1Y6
45
12
1Y7
44
13
1A9
43
14
1Y9
2A0
42
15
2Y0
2A1
41
16
2Y1
2A2
40
17
2Y2
1A3
1A5
11
46
55
3
1A2
1A4
EN2
2
1A1
VCC
&
29
54
1A0
1A6
1A5
GND
EN1
56
2OE1 28
2OE2
1A4
1Y6
&
1
1OE1
GND
1A6
1
1∇
1Y7
12
45
1A7
1Y8
13
44
1A8
1Y9
14
43
1A9
2Y0
15
42
2A0
2Y1
16
41
2A1
2Y2
17
40
2A2
GND
18
39
GND
2A3
38
19
2Y3
2Y3
19
38
2A3
2A4
37
20
2Y4
2Y4
20
37
2A4
2A5
36
21
2Y5
21
36
2A5
2A6
34
23
2Y6
VCC
22
35
VCC
2A7
33
24
2Y7
2Y6
23
34
2A6
2A8
31
26
2Y8
2Y7
24
33
2A7
2A9
30
27
2Y9
GND
25
32
GND
2Y8
26
31
2A8
2Y9
27
30
2A9
2OE1
28
29
2OE2
1A7
1A8
1
2∇
1Y8
2Y5
SH00012
SH00010
LOGIC SYMBOL
55
54
FUNCTION TABLE
52
51
49
48
47
1A0 1A1 1A2 1A3 1A4 1A5 1A6
45
44
1A7 1A8
INPUTS
43
nOE1
nOE2
1A9
OUTPUT
nAn
nYn
OPERATING MODE
L
L
L
L
1
1OE1
L
L
H
H
Transparent
56
1OE2
H
X
X
Z
High impedance
H
X
Z
High impedance
1Y0 1Y1 1Y2 1Y3 1Y4 1Y5 1Y6
1Y7 1Y8
1Y9
2
3
5
6
8
9
10
12
13
14
42
41
40
38
37
36
34
33
31
30
2A0 2A1 2A2 2A3 2A4 2A5 2A6
2A7 2A8
2A9
2Y0 2Y1 2Y2 2Y3 2Y4 2Y5 2Y6
2Y7 2Y8
2Y9
15
24
27
28
2OE1
29
2OE2
16
17
19
20
21
23
26
X
X
Z
H
L
SH00011
1998 Sep 29
3
=
=
=
=
Don’t care
High impedance “off” state
High voltage level
Low voltage level
Transparent
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30Ω
termination resistors (3-State)
74ALVCH162827
LOGIC DIAGRAM
nA0
nA1
nA2
nA3
nA4
nA5
nA6
nA7
nA8
nA9
nY0
nY1
nY2
nY3
nY4
nY5
nY6
nY7
nY8
nY9
nOE1
nOE2
SH00013
RECOMMENDED OPERATING CONDITIONS
SYMBOL
VCC
PARAMETER
CONDITIONS
MIN
MAX
DC supply voltage 2.5V range (for max. speed
performance @ 30 pF output load)
2.3
2.7
DC supply voltage 3.3V range (for max. speed
performance @ 50 pF output load)
3.0
3.6
UNIT
V
VI
DC Input voltage range
0
VCC
V
VO
DC output voltage range
0
VCC
V
–40
+85
°C
0
0
20
10
ns/V
Tamb
Operating free-air temperature range
tr, tf
Input rise and fall times
VCC = 2.3 to 3.0V
VCC = 3.0 to 3.6V
ABSOLUTE MAXIMUM RATINGS
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
VCC
PARAMETER
CONDITIONS
DC supply voltage
RATING
UNIT
–0.5 to +4.6
V
IIK
DC input diode current
VI 0
–50
mA
VI
DC input voltage
Note 1
–0.5 to +4.6
V
IOK
DC output diode current
VO VCC or VO 0
50
mA
VO
DC output voltage
Note 1
–0.5 to VCC +0.5
V
IO
DC output source or sink current
VO = 0 to VCC
50
mA
100
mA
–65 to +150
°C
IGND, ICC
Tstg
PTOT
DC VCC or GND current
Storage temperature range
Power dissipation per package
–plastic thin-medium-shrink (TSSOP)
For temperature range: –40 to +125 °C
above +55°C derate linearly with 8 mW/K
NOTE:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
1998 Sep 29
4
600
mW
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30Ω
termination resistors (3-State)
74ALVCH162827
DC ELECTRICAL CHARACTERISTICS
Over recommended operating conditions. Voltage are referenced to GND (ground = 0 V).
LIMITS
SYMBOL
PARAMETER
VIH
HIGH level Input voltage
VIL
LOW level Input voltage
VOH
HIGH level output voltage
TEST CONDITIONS
Temp = -40°C to +85°C
MIN
TYP1
VCC = 2.3 to 2.7V
1.7
1.2
VCC = 2.7 to 3.6V
2.0
1.5
UNIT
MAX
V
VCC = 2.3 to 2.7V
1.2
0.7
VCC = 2.7 to 3.6V
1.5
0.8
V
3 to 3
6V; VI = VIH or VIL; IO = –100µA
100µA
VCC = 2
2.3
3.6V;
02
VCC0.2
VCC = 2.3V; VI = VIH or VIL; IO = –4mA
VCC0.4
VCC0.11
VCC = 2.3V; VI = VIH or VIL; IO = –6mA
VCC0.6
VCC0.17
VCC = 2.7V; VI = VIH or VIL; IO = –4mA
VCC0.5
VCC0.09
VCC = 2.7V; VI = VIH or VIL; IO = –8mA
VCC0.7
VCC0.19
VCC = 3.0V; VI = VIH or VIL; IO = –6mA
VCC0.6
VCC0.13
VCC = 3.0V; VI = VIH or VIL; IO = –12mA
VCC1.0
VCC0.27
VCC
V
VCC = 2
2.3
3 to 3
3.6V;
6V; VI = VIH or VIL; IO = 100µA
GND
0 20
0.20
VCC = 2.3V; VI = VIH or VIL; IO = 4mA
0.07
0.40
VCC = 2.3V; VI = VIH or VIL; IO = 6mA
0.11
0.55
VCC = 2.7V; VI = VIH or VIL; IO = 4mA
0.06
0.40
VCC = 2.7V; VI = VIH or VIL; IO = 8mA
0.13
0.60
VCC = 3.0V; VI = VIH or VIL; IO = 6mA
0.09
0.55
VCC = 3.0V; VI = VIH or VIL; IO = 12mA
0.19
0.80
g current
Input leakage
3 to 3
6V;
VCC = 2
2.3
3.6V;
VI = VCC or GND
0.1
5
µ
µA
IOZ
3-State output OFF-state current
VCC = 2.3 to 3.6V; VI = VIH or VIL;
VO = VCC or GND
0.1
10
µA
ICC
Quiescent supply current
VCC = 2.3 to 3.6V; VI = VCC or GND; IO = 0
0.2
40
µA
Additional quiescent supply current
VCC = 2.3V to 3.6V; VI = VCC – 0.6V; IO = 0
150
750
µA
VOL
II
∆ICC
IBHL
LOW level output voltage
Bus hold LOW sustaining current
0.7V2
45
VCC = 2.3V; VI = 1.7V2
–45
VCC = 3.0V; VI = 2.0V2
–75
VCC = 2.3V; VI =
–
V
µA
µA
IBHH
Bus hold HIGH sustaining current
IBHLO
Bus hold LOW overdrive current
VCC = 3.6V2
500
µA
Bus hold HIGH overdrive current
3.6V2
–500
µA
IBHHO
VCC =
NOTES:
1. All typical values are at Tamb = 25°C.
2. Valid for data inputs of bus hold parts.
1998 Sep 29
5
–175
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30Ω
termination resistors (3-State)
74ALVCH162827
AC CHARACTERISTICS FOR VCC = 2.5V ± 0.2V
GND = 0V; tr = tf ≤ 2.0ns; CL = 30pF
LIMITS
SYMBOL
PARAMETER
VCC = 2.5 ± 0.2V
WAVEFORM
UNIT
MIN
TYP1
MAX
tPHL/tPLH
Propagation delay
nAn to nYn
1, 3
1.0
2.9
4.6
ns
tPZH/tPZL
3-State output enable time
nOEn to nYn
2, 3
1.4
3.9
6.4
ns
tPHZ/tPLZ
3-State output disable time
nOEn to nYn
2,3
1.7
2.2
5.9
ns
NOTE:
1. All typical values are at VCC = 2.5V and Tamb = 25°C.
AC CHARACTERISTICS FOR VCC = 3.0V ± 0.3V
GND = 0V; tr = tf ≤ 2.5ns; CL = 50pF
LIMITS
SYMBOL
PARAMETER
LIMITS
VCC = 3.3 ± 0.3V
WAVEFORM
VCC = 2.7V
MIN
TYP1, 2
MAX
TYP1
MAX
UNIT
tPHL/tPLH
Propagation delay
nAn to nYn
1, 3
1.5
2.9
4.2
3.1
4.7
ns
tPZH/tPZL
3-State output enable time
nOEn to nYn
2, 3
1.6
3.7
5.4
4.4
6.5
ns
tPHZ/tPLZ
3-State output disable time
nOEn to nYn
2, 3
1.8
3.0
4.7
3.2
5.2
ns
NOTES:
1. All typical values are at VCC Tamb = 25°C.
2. Typical value is measured at VCC = 3.3V.
1998 Sep 29
6
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30Ω
termination resistors (3-State)
AC WAVEFORMS FOR VCC = 2.3V TO 2.7V
74ALVCH162827
TEST CIRCUIT AND WAVEFORM
VM = 0.5 VCC
VX = VOL + 0.15V
VY = VOH –0.15V
VOL and VOH are the typical output voltage drop that occur with the
output load.
V =V
CC
I
S1
VCC
VI
AC WAVEFORMS FOR VCC = 3.0V TO 3.6V AND
VCC = 2.7V RANGE
D.U.T.
RT
VM = 1.5 V
VX = VOL + 0.3V
VY = VOH –0.3V
VOL and VOH are the typical output voltage drop that occur with the
output load.
V = 2.7V
I
RL = 500 Ω
VO
PULSE
GENERATOR
2 * VCC
Open
GND
RL = 500 Ω
CL
Test Circuit for switching times
DEFINITIONS
RL = Load resistor
CL = Load capacitance includes jig and probe capacitance
RT = Termination resistance should be equal to ZOUT of pulse generators.
VI
An
INPUT
SWITCH POSITION
VM
TEST
GND
tPLH/tPHL
tPHL
tPLH
VM
2 VCC
tPHZ/tPZH
GND
VI
< 2.7V
VCC
2.7–3.6V
2.7V
Waveform 3. Load circuitry for switching times
SH00132
Waveform 1. Input (nAx) to Output (nYx) Propagation Delays
VI
VM
GND
tPLZ
tPZL
VCC
OUTPUT
LOW-to-OFF
OFF-to-LOW
VM
VX
VOL
tPHZ
tPZH
VOH
OUTPUT
HIGH-to-OFF
OFF-to-HIGH
VY
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
SH00137
Waveform 2. 3-State Output Enable and Disable Times
1998 Sep 29
VCC
SV00906
VOL
nOE INPUT
Open
tPLZ/tPZL
VOH
Yn
OUTPUT
S1
7
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30
termination resistors (3-State)
TSSOP56: plastic thin shrink small outline package; 56 leads; body width 6.1mm
1998 Sep 29
8
74ALVCH162827
SOT364-1
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30
termination resistors (3-State)
NOTES
1998 Sep 29
9
74ALVCH162827
Philips Semiconductors
Product specification
20-bit buffer/line driver, non-inverting, with 30
termination resistors (3-State)
74ALVCH162827
DEFINITIONS
Data Sheet Identification
Product Status
Definition
Objective Specification
Formative or in Design
This data sheet contains the design target or goal specifications for product development. Specifications
may change in any manner without notice.
Preliminary Specification
Preproduction Product
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips
Semiconductors reserves the right to make changes at any time without notice in order to improve design
and supply the best possible product.
Product Specification
Full Production
This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes
at any time without notice, in order to improve design and supply the best possible product.
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products,
including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright,
or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes
only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing
or modification.
LIFE SUPPORT APPLICATIONS
Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices,
or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected
to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips
Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully
indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale.
 Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Date of release: 06-98
Document order number:
1998 Sep 29
10
9397-750-04603