INTEGRATED CIRCUITS 74LVC16240A 16-bit buffer/line driver; inverting (3-State) Product specification Supersedes data of 1995 Dec 26 IC24 Data Handbook 1997 Jul 29 Philips Semiconductors Product specification 74LVC16240A 16-bit buffer/line driver; inverting (3-State) FEATURES PIN CONFIGURATION • 5 volt tolerant inputs/outputs for interfacing with 5V logic • Wide supply voltage range of 1.2V to 3.6V • Complies with JEDEC standard no. 8-1A • CMOS low power consumption • MULTIBYTETM flow-through standard pin-out architecture • Low inductance multiple power and ground pins for minimum noise and ground bounce • Direct interface with TTL levels DESCRIPTION The 74LVC16240A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. These features allow the use of these devices in a mixed 3.3V/5V environment. The 74LVC16240A is a 16-bit inverting buffer/line driver with 3-State outputs. The 3-State outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH on nOE causes the outputs to assume a high impedance OFF-state. The 74LVC16240A is identical to the 74LVC16244A but has inverting outputs. 1OE 1 48 2OE 1Y0 2 47 1A0 1Y1 3 46 1A1 GND 4 45 GND 1Y2 5 44 1A2 1Y3 6 43 1A3 VCC 7 42 VCC 2Y0 8 41 2A0 2Y1 9 40 2A1 GND 10 39 GND 2Y2 11 38 2A2 2Y3 12 37 2A3 3Y0 13 36 3A0 3Y1 14 35 3A1 GND 15 34 GND 3Y2 16 33 3A2 3Y3 17 32 3A3 VCC 18 31 VCC 4Y0 19 30 4A0 4Y1 20 29 4A1 GND 21 28 GND 4Y2 22 27 4A2 4Y3 23 26 4A3 4OE 24 25 3OE SW00041 QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf 2.5 ns PARAMETER SYMBOL tPHL/tPLH Propagation delay 1An to 1Yn; 2An to 2Yn CI Input capacitance CPD Power dissipation capacitance per buffer CONDITIONS CL = 50pF VCC = 3.3V VCC = 3.3V TYPICAL UNIT 2.7 ns 5.0 pF 25 pF NOTES: 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) where: fi = input frequency in MHz; CL = output load capacity in pF; fo = output frequency in MHz; VCC = supply voltage in V; (CL x VCC2 x fo) = sum of outputs. ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 48-Pin Plastic SSOP Type III PACKAGES –40°C to +85°C 74LVC16240A DL VC16240A DL SOT370-1 48-Pin Plastic TSSOP Type II –40°C to +85°C 74LVC16240A DGG VC16240A DGG SOT362-1 1997 Jul 29 2 853-2007 18218 Philips Semiconductors Product specification 74LVC16240A 16-bit buffer/line driver; inverting (3-State) PIN DESCRIPTION PIN NUMBER FUNCTION TABLE SYMBOL NAME AND FUNCTION 1 1OE 2, 3, 5, 6 1Y0 to 1Y3 Data outputs 4, 10, 15, 21, 28, 34, 39, 45 GND Ground (0V) 7, 18, 31, 42 VCC 8, 9, 11, 12 2Y0 to 2Y3 Data outputs 13, 14, 16, 17 3Y0 to 3Y3 Data outputs 19, 20, 22, 23 4Y0 to 4Y3 Data outputs 24 4OE 25 INPUTS Output enable input (active LOW) nAn nYn L L H L H L H X Z H = HIGH voltage level L = LOW voltage level X = don’t care Z = high impedance OFF-state Positive supply voltage LOGIC SYMBOL (IEEE/IEC) Output enable input (active LOW) 3OE 1OE 1 EN1 Output enable input (active LOW) 2OE 48 EN2 3OE 25 EN3 24 EN4 30, 29, 27, 26 4A0 to 4A3 Data inputs 4OE 36, 35, 33, 32 3A0 to 3A3 Data inputs 1A0 41, 40, 38, 37 2A0 to 2A3 Data inputs 1A1 Data inputs 1A2 47, 46, 44, 43 1A0 to 1A3 1A3 48 Output enable input (active LOW) 2OE 2A0 2A1 2A2 LOGIC SYMBOL 2A3 1A0 47 2 1Y0 3A0 36 13 3A0 3Y0 3A1 1A1 46 3 1Y1 3A1 35 14 3A2 3Y1 3A3 1A2 44 5 1Y2 3A2 33 16 4A0 3Y2 4A1 1A3 43 6 1Y3 3A3 32 17 4A2 3Y3 4A3 1OE 2A0 2A1 2A2 2A3 2OE 1 3OE 41 8 40 9 38 11 37 12 48 2Y0 4A0 2Y1 4A1 2Y2 4A2 2Y3 4A3 4OE 25 47 2 1Y0 46 3 1Y1 44 5 1Y2 43 6 1Y3 8 2Y0 1 41 1 1∇ 2∇ 40 9 38 11 2Y2 37 12 2Y3 13 3Y0 35 14 3Y1 33 16 3Y2 32 17 3Y3 19 4Y0 29 20 4Y1 27 22 4Y2 26 23 36 30 1 1 3∇ 4∇ 2Y1 4Y3 SW00059 30 19 29 20 27 22 26 23 4Y0 4Y1 4Y2 4Y3 24 SW00042 1997 Jul 29 OUTPUT nOE 3 Philips Semiconductors Product specification 74LVC16240A 16-bit buffer/line driver; inverting (3-State) RECOMMENDED OPERATING CONDITIONS LIMITS SYMBOL PARAMETER CONDITIONS UNIT MIN MIN. MAX MAX. VCC DC supply voltage (for max. speed performance) 2.7 3.6 V VCC DC supply voltage (for low-voltage applications) 1.2 3.6 V VI DC Input voltage range 0 5.5 V VO DC output voltage range; output HIGH or LOW state 0 VCC V VO DC output voltage range; output 3-State 0 5.5 V Tamb Operating ambient temperature range in free air See DC and AC characteristics for individual device –40 +85 °C tr, tf Input rise and fall times VCC = 1.2 to 2.7V VCC = 2.7 to 3.6V 0 0 20 10 ns/V ABSOLUTE MAXIMUM RATINGS1 In accordance with the Absolute Maximum Rating System (IEC 134) Voltages are referenced to GND (ground = 0V) LIMITS SYMBOL VCC PARAMETER CONDITIONS DC supply voltage UNIT MIN MAX –0.5 +6.5 V IIK DC input diode current VI < 0 – –50 mA VI DC input voltage Note 2 –0.5 +6.5 V IOK DC output diode current VO > VCC or VO < 0 – "50 mA VO DC output voltage; output HIGH or LOW state Note 2 –0.5 VCC + 0.5 V VO DC output voltage; output 3-State Note 2 –0.5 6.5 V IO DC output source or sink current VO = 0 to VCC – "50 mA – "100 mA –65 +150 °C 500 500 mW IGND, ICC DC VCC or GND current Tstg Storage temperature range Ptot Power dissipation per package – SO package – SSOP and TSSOP package Above +70°C derate linearly 8mW/K Above +60°C derate linearly 5.5mW/K NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 1997 Jul 29 4 Philips Semiconductors Product specification 74LVC16240A 16-bit buffer/line driver; inverting (3-State) DC ELECTRICAL CHARACTERISTICS Over recommended operating conditions. Voltages are referenced to GND (ground = 0V) LIMITS SYMBOL PARAMETER TEST CONDITIONS Temp = -40°C to +85°C MIN VIH HIGH level Input voltage VIL LOW level Input voltage VOH O VCC = 1.2V VCC VCC = 2.7 to 3.6V 2.0 TYP1 V VCC = 1.2V GND V VCC = 2.7 to 3.6V HIGH level output voltage 0.8 VCC = 2.7V; VI = VIH or VIL; IO = –12mA VCC*0.5 VCC = 3.0V; VI = VIH or VIL; IO = –100µA VCC*0.2 VCC = 3.0V; VI = VIH or VIL; IO = –18mA VCC*0.6 VCC = 3.0V; VI = VIH or VIL; IO = –24mA VCC*0.8 VCC VCC = 2.7V; VI = VIH or VIL; IO = 12mA VOL LOW level output voltage VCC = 3.0V; VI = VIH or VIL; IO = 100µA GND 0.20 V 0.55 "0 1 "0.1 "5 µA VCC = 3.6V; VI = VIH or VIL; VO = 5.5V or GND 0.1 "5 µA Power off leakage supply VCC = 0.0V; VI or VO = 5.5V 0.1 "10 µA Quiescent supply current VCC = 3.6V; VI = VCC or GND; IO = 0 0.1 20 µA Additional quiescent supply current per input pin VCC = 2.7V to 3.6V; VI = VCC –0.6V; IO = 0 5 500 µA Input leakage current 6V; VI = 5 5V or GND VCC = 3 3.6V; 5.5V IOZ 3-State output OFF-state current Ioff ICC ∆ICC V 0.40 VCC = 3.0V; VI = VIH or VIL; IO = 24mA II UNIT MAX NOTES: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C. LIMITS SYMBOL PARAMETER VCC = 3.3V ±0.3V WAVEFORM VCC = 2.7V VCC = 1.2V MIN TYP1 MAX MIN MAX TYP UNIT tPHL tPLH Propagation delay 1An to 1Yn; 2An to 2Yn 1, 3 1.5 2.8 4.7 1.5 5.7 12 ns tPZH tPZL 3-State output enable time 1OE to 1Yn; 2OE to 2Yn 2, 3 1.5 3.5 5.4 1.5 6.4 18 ns tPHZ tPLZ 3-State output disable time 1OE to 1Yn; 2OE to 2Yn 2, 3 1.5 3.9 5.1 1.5 6.1 11 ns NOTE: 1. All typical values are at VCC = 3.3V and Tamb = 25°C. 1997 Jul 29 5 Philips Semiconductors Product specification 74LVC16240A 16-bit buffer/line driver; inverting (3-State) AC WAVEFORMS TEST CIRCUIT VM = 1.5V at VCC w 2.7V; VM = 0.5 VCC at VCC t 2.7V. VOL and VOH are the typical output voltage drop that occur with the output load. VX = VOL + 0.3V at VCC w 2.7V; VX = VOL + 0.1 VCC at VCC t 2.7V VY = VOH –0.3V at VCC w 2.7V; VY = VOH – 0.1 VCC at VCC t 2.7V 2<VCC Open GND RL=500 Ω VIN VOUT PULSE GENERATOR VI An INPUT S1 VCC D.U.T. RT VM RL=500 Ω CL GND tPHL Test Circuit for 3-State Outputs tPLH SWITCH POSITION VOH Yn OUTPUT VM VOL SW00045 TEST SWITCH VCC VIN tPLH/tPHL Open tPLZ/tPZL 2<VCC t 2.7V 2.7 – 3.6V VCC 2.7V tPHZ/tPZH GND Waveform 1. Input (An) to output (Yn) propagation delay times DEFINITIONS RL = Load resistor CL = Load capacitance includes jig and probe capacitance RT = Termination resistance should be equal to ZOUT of pulse generators. VI OE INPUT VM SW00047 GND Waveform 3. Load circuitry for switching times tPLZ tPZL VCC Qn OUTPUT LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ tPZH VOH VY Qn OUTPUT HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs disabled outputs enabled SW00046 Waveform 2. 3-State enable and disable times 1997 Jul 29 6 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) SSOP48: plastic shrink small outline package; 48 leads; body width 7.5 mm 1997 Jul 29 7 74LVC16240A SOT370-1 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1mm 1997 Jul 29 8 74LVC16240A SOT362-1 Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) NOTES 1997 Jul 29 9 74LVC16240A Philips Semiconductors Product specification 16-bit buffer/line driver; inverting (3-State) 74LVC16240A DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Copyright Philips Electronics North America Corporation 1997 All rights reserved. Printed in U.S.A. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 print code Document order number: yyyy mmm dd 10 Date of release: 05-96 9397-750-04526