Philips Semiconductors Product specification TrenchMOS transistor Standard level FET GENERAL DESCRIPTION N-channel enhancement mode standard level field-effect power transistor in a plastic envelope using ’trench’ technology. The device features very low on-state resistance and has integral zener diodes giving ESD protection up to 2kV. It is intended for use in DC-DC converters and general purpose switching applications. PINNING - TO220AB PIN PHP87N03T QUICK REFERENCE DATA SYMBOL PARAMETER MAX. UNIT VDS ID Ptot Tj RDS(ON) Drain-source voltage Drain current (DC)1 Total power dissipation Junction temperature Drain-source on-state resistance VGS = 10 V 30 75 142 175 10.5 V A W ˚C mΩ PIN CONFIGURATION SYMBOL DESCRIPTION d tab 1 gate 2 drain 3 source tab g drain s 1 23 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS VDGR ±VGS ID ID IDM Ptot Tstg, Tj Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC)1 Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage & operating temperature RGS = 20 kΩ Tmb = 25 ˚C Tmb = 100 ˚C Tmb = 25 ˚C Tmb = 25 ˚C - - 55 30 30 20 75 61 240 142 175 V V V A A A W ˚C TYP. MAX. UNIT - 1.05 K/W 60 - K/W THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS Rth j-mb Thermal resistance junction to mounting base Thermal resistance junction to ambient - Rth j-a in free air 1 Current limited by package to 75A from a theoretical value of 87A. September 1997 1 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET PHP87N03T ESD LIMITING VALUE SYMBOL PARAMETER CONDITIONS VC Electrostatic discharge capacitor voltage, all pins Human body model (100 pF, 1.5 kΩ) MIN. MAX. UNIT - 2 kV STATIC CHARACTERISTICS Tj= 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS V(BR)DSS Drain-source breakdown voltage Gate threshold voltage VGS = 0 V; ID = 0.25 mA; VGS(TO) Tj = -55˚C VDS = VGS; ID = 1 mA Tj = 175˚C Tj = -55˚C IDSS Zero gate voltage drain current VDS = 30 V; VGS = 0 V; IGSS Gate source leakage current VGS = ±10 V; VDS = 0 V ±V(BR)GSS Gate-source breakdown voltage Drain-source on-state resistance IG = ±1 mA; RDS(ON) Tj = 175˚C Tj = 175˚C VGS = 10 V; ID = 25 A Tj = 175˚C MIN. TYP. MAX. UNIT 30 27 2 1 16 3.0 0.05 0.02 - 4.0 4.4 10 500 1 20 - V V V V V µA µA µA µA V - 9 - 10.5 19.5 mΩ mΩ MIN. TYP. MAX. UNIT DYNAMIC CHARACTERISTICS Tmb = 25˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS gfs Forward transconductance VDS = 25 V; ID = 25 A 9 18 - S Qg(tot) Qgs Qgd Total gate charge Gate-source charge Gate-drain (Miller) charge ID = 75 A; VDD = 24 V; VGS = 10 V - 51 9 29 - nC nC nC Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 2700 700 300 3300 800 330 pF pF pF td on tr td off tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 25 V; ID = 25 A; VGS = 10 V; RG = 5 Ω Resistive load - 26 35 50 30 30 85 60 45 ns ns ns ns Ld Internal drain inductance - 3.5 - nH Ld Internal drain inductance - 4.5 - nH Ls Internal source inductance Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad - 7.5 - nH September 1997 2 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET PHP87N03T REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Tj = 25˚C unless otherwise specified SYMBOL PARAMETER IDR IDRM VSD Continuous reverse drain current Pulsed reverse drain current Diode forward voltage trr Qrr Reverse recovery time Reverse recovery charge CONDITIONS MIN. TYP. MAX. UNIT - - 75 A IF = 25 A; VGS = 0 V IF = 75 A; VGS = 0 V - 0.95 1.0 240 1.2 - A V V IF = 75 A; -dIF/dt = 100 A/µs; VGS = -10 V; VR = 25 V - 95 0.15 - ns µC MIN. TYP. MAX. UNIT - - 200 mJ AVALANCHE LIMITING VALUE SYMBOL PARAMETER CONDITIONS WDSS Drain-source non-repetitive unclamped inductive turn-off energy ID = 45 A; VDD ≤ 15 V; VGS = 10 V; RGS = 50 Ω; Tmb = 25 ˚C September 1997 3 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET 120 PHP87N03T Normalised Power Derating PD% 1E+01 BUKX514-55 Zth / (K/W) 110 100 90 1E+00 80 0.5 70 50 0.2 0.1 0.05 40 0.02 60 1E-01 30 PD tp D= tp T 1E-02 0 20 t T 10 0 0 20 40 60 80 100 Tmb / C 120 140 160 1E-03 1E-07 180 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Tmb) 100 ID (A) 1E-01 ID / A 100 12 Limited by package 80 1E-03 t/s 1E+01 Fig.4. Transient thermal impedance. Zth j-mb = f(t); parameter D = tp/T Current Derating 90 1E-05 BUK7510-30 8 6.5 10 80 70 6 60 60 VGS / V = 50 5.5 40 40 30 5 20 20 4.5 4 10 0 0 20 40 60 0 80 100 120 140 160 180 Tmb / C ID / A DS 6 8 10 RDS(ON) / mOhm 30 7510-30 5.5 6 6.5 / ID =V S RD 100 4 Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS 7510-30 ) (ON 2 VDS / V Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 10 V 1000 0 20 tp = 100 us 1 ms 10 1 8 DC 1 10 ms 100 ms 10 VDS / V 10 0 100 Fig.3. Safe operating area. Tmb = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp September 1997 10 VGS / V = 0 20 40 ID / A 60 80 12 100 Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS 4 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET PHP87N03T ID / A 100 7510-30 5 VGS(TO) / V BUK759-60 max. 4 80 Tj / C = 25 175 typ. 60 3 40 2 20 1 min. 0 0 2 4 6 8 0 -100 10 -50 0 50 Tj / C VGS / V Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj gfs / S 150 200 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS 7510-30 40 100 Sub-Threshold Conduction 1E-01 1E-02 30 Tj / C = 25 2% 1E-03 175 typ 98% 20 1E-04 10 1E-05 0 0 20 40 60 80 100 1E-06 ID / A Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID); conditions: VDS = 25 V a 1 2 3 4 5 Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS 30V TrenchMOS 2 0 10000 C / pF 7510-30 1.5 Ciss 1000 1 Coss 0.5 0 -100 Crss -50 0 50 Tj / C 100 150 100 0.1 200 10 100 VDS / V Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 10 V September 1997 1 Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 5 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET 10 PHP87N03T VGS / V 7510-30 120 WDSS% 110 100 8 VDS / V = 6 90 24 80 6 70 60 50 4 40 30 2 20 10 0 0 0 10 20 30 QG / nC 40 50 20 60 Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 75 A; parameter VDS 100 IF / A 40 60 80 100 120 Tmb / C 140 160 180 Fig.15. Normalised avalanche energy rating. WDSS% = f(Tmb); conditions: ID = 45 A 7510-30 VDD + L 80 VDS - 60 Tj / C = 175 25 VGS -ID/100 40 0 20 0 T.U.T. R 01 shunt RGS 0 1 VSDS / V 2 Fig.16. Avalanche energy test circuit. WDSS = 0.5 ⋅ LID2 ⋅ BVDSS /(BVDSS − VDD ) Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj + VDD RD VDS - VGS 0 RG T.U.T. Fig.17. Switching test circuit. September 1997 6 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET PHP87N03T MECHANICAL DATA Dimensions in mm 4,5 max Net Mass: 2 g 10,3 max 1,3 3,7 2,8 5,9 min 15,8 max 3,0 max not tinned 3,0 13,5 min 1,3 max 1 2 3 (2x) 0,9 max (3x) 2,54 2,54 0,6 2,4 Fig.18. TO220AB; pin 2 connected to mounting base. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for TO220 envelopes. 3. Epoxy meets UL94 V0 at 1/8". September 1997 7 Rev 1.100 Philips Semiconductors Product specification TrenchMOS transistor Standard level FET PHP87N03T DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1997 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. September 1997 8 Rev 1.100