PHILIPS BUK7506-55A

Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
GENERAL DESCRIPTION
N-channel enhancement mode
standard level field-effect power
transistor in a plastic envelope using
’trench’ technology which features
very low on-state resistance. It is
intended for use in automotive and
general
purpose
switching
applications.
PINNING - TO220AB
PIN
BUK7506-55A
QUICK REFERENCE DATA
SYMBOL
PARAMETER
VDS
ID
Ptot
Tj
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Junction temperature
Drain-source on-state
resistance
VGS = 10 V
PIN CONFIGURATION
MAX.
UNIT
55
75
230
175
6.3
V
A
W
˚C
mΩ
SYMBOL
DESCRIPTION
d
tab
1
gate
2
drain
3
source
g
tab
drain
s
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VDS
VDGR
±VGS
ID
ID
IDM
Ptot
Tstg, Tj
Drain-source voltage
Drain-gate voltage
Gate-source voltage
Drain current (DC)
Drain current (DC)
Drain current (pulse peak value)
Total power dissipation
Storage & operating temperature
RGS = 20 kΩ
Tmb = 25 ˚C
Tmb = 100 ˚C
Tmb = 25 ˚C
Tmb = 25 ˚C
-
- 55
55
55
20
75
75
240
230
175
V
V
V
A
A
A
W
˚C
TYP.
MAX.
UNIT
-
0.65
K/W
60
-
K/W
THERMAL RESISTANCES
SYMBOL
PARAMETER
CONDITIONS
Rth j-mb
Thermal resistance junction to
mounting base
Thermal resistance junction to
ambient
-
Rth j-a
December 1998
in free air
1
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
BUK7506-55A
STATIC CHARACTERISTICS
Tj= 25˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
V(BR)DSS
Drain-source breakdown
voltage
Gate threshold voltage
VGS = 0 V; ID = 0.25 mA;
VGS(TO)
Tj = -55˚C
VDS = VGS; ID = 1 mA
Tj = 175˚C
Tj = -55˚C
IDSS
Zero gate voltage drain current
VDS = 55 V; VGS = 0 V;
IGSS
RDS(ON)
Gate source leakage current
Drain-source on-state
resistance
VGS = ±20 V; VDS = 0 V
VGS = 10 V; ID = 25 A
Tj = 175˚C
Tj = 175˚C
MIN.
TYP.
MAX.
UNIT
55
50
2
1
-
3.0
0.05
2
5.3
-
4.0
4.4
10
500
100
6.3
13.2
V
V
V
V
V
µA
µA
nA
mΩ
mΩ
MIN.
TYP.
MAX.
UNIT
DYNAMIC CHARACTERISTICS
Tmb = 25˚C unless otherwise specified
SYMBOL
PARAMETER
CONDITIONS
Ciss
Coss
Crss
Input capacitance
Output capacitance
Feedback capacitance
VGS = 0 V; VDS = 25 V; f = 1 MHz
-
4500
1000
620
6000
1200
820
pF
pF
pF
td on
tr
td off
tf
Turn-on delay time
Turn-on rise time
Turn-off delay time
Turn-off fall time
VDD = 30 V; Rload =1.2Ω;
VGS = 10 V; RG = 10 Ω
-
35
115
155
110
55
175
230
155
ns
ns
ns
ns
Ld
Internal drain inductance
-
3.5
-
nH
Ld
Internal drain inductance
-
4.5
-
nH
Ls
Internal source inductance
Measured from contact screw on
tab to centre of die
Measured from drain lead 6 mm
from package to centre of die
Measured from source lead 6 mm
from package to source bond pad
-
7.5
-
nH
MIN.
TYP.
MAX.
UNIT
-
-
75
A
IF = 25 A; VGS = 0 V
IF = 75 A; VGS = 0 V
-
0.85
1.1
240
1.2
-
A
V
V
IF = 75 A; -dIF/dt = 100 A/µs;
VGS = -10 V; VR = 30 V
-
80
0.2
-
ns
µC
MIN.
TYP.
MAX.
UNIT
-
-
500
mJ
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25˚C unless otherwise specified
SYMBOL
PARAMETER
IDR
IDRM
VSD
Continuous reverse drain
current
Pulsed reverse drain current
Diode forward voltage
trr
Qrr
Reverse recovery time
Reverse recovery charge
CONDITIONS
AVALANCHE LIMITING VALUE
SYMBOL
PARAMETER
CONDITIONS
WDSS
Drain-source non-repetitive
unclamped inductive turn-off
energy
ID = 75 A; VDD ≤ 25 V;
VGS = 10 V; RGS = 50 Ω; Tmb = 25 ˚C
December 1998
2
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
120
BUK7506-55A
Normalised Power Derating
PD%
Zth / (K/W)
1
D=
110
100
0.5
90
0.2
80
0.1
70
0.1
60
0.05
50
0.02
40
PD
tp
D=
0.01
30
20
t
T
0
10
tp
T
0
0
20
40
60
80 100
Tmb / C
120
140
160
180
0.001
Fig.1. Normalised power dissipation.
PD% = 100⋅PD/PD 25 ˚C = f(Tmb)
120
0.001
0.1
t/S
10
Fig.4. Transient thermal impedance.
Zth j-mb = f(t); parameter D = tp/T
400
Normalised Current Derating
ID%
0.00001
20
14
12
ID/A
110
100
10.0
9.0
VGAS/V=
8.0
8.5
300
90
7.5
80
7.0
70
200
60
6.5
50
40
6.0
30
100
5.5
20
5.0
4.5
10
0
0
20
40
60
80 100
Tmb / C
120
140
160
0
180
0
2
4
VDS/V
6
8
10
Fig.5. Typical output characteristics, Tj = 25 ˚C.
ID = f(VDS); parameter VGS
Fig.2. Normalised continuous drain current.
ID% = 100⋅ID/ID 25 ˚C = f(Tmb); conditions: VGS ≥ 5 V
11
1000
RDS(ON)/mOhm
VGS/V =
10
ID/A
tp =
RDS(ON) = VDS/ID
100
10uS
9
100uS
8
5.5
1mS
DC
10
7
6.0
6.5
7.0
8.0
10.0
10mS
6
100mS
5
1
4
1
10
VDS/V
100
Fig.3. Safe operating area. Tmb = 25 ˚C
ID & IDM = f(VDS); IDM single pulse; parameter tp
December 1998
0
20
40
ID/A
60
80
100
Fig.6. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(ID); parameter VGS
3
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
8.5
BUK7506-55A
RDS(ON)/mOhm
2.5
BUK959-60
Rds(on) normlised to 25degC
8
7.5
2
7
6.5
1.5
6
5.5
1
5
4.5
4
5
10
15
VGS/V
0.5
-100
20
Fig.7. Typical on-state resistance, Tj = 25 ˚C.
RDS(ON) = f(VGS); conditions ID = 25 A;
-50
0
50
Tmb / degC
100
150
200
Fig.10. Normalised drain-source on-state resistance.
a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 25 A; VGS = 5 V
100
5
VGS(TO) / V
BUK759-60
ID/A
max.
80
4
typ.
60
3
40
2
min.
25
175
Tj/C =
1
20
0
0
1
2
3 VGS/V 4
5
6
0
-100
7
Fig.8. Typical transfer characteristics.
ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj
-50
0
50
Tj / C
100
150
200
Fig.11. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
90
gfs/S
80
1E-01
70
1E-02
Sub-Threshold Conduction
60
2%
1E-03
50
typ
98%
40
1E-04
30
20
1E-05
10
0
0
20
40
ID/A
60
80
1E-06
100
Fig.9. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID); conditions: VDS = 25 V
December 1998
0
1
2
3
4
5
Fig.12. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
4
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
BUK7506-55A
10
120
9
110
8
100
90
7
Thousands pF
WDSS%
80
6
70
60
5
Ciss
50
4
40
3
30
2
20
10
1
Coss
Crss
0
0.01
0.1
1
VDS/V
10
0
20
40
60
100
Fig.13. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
80
100
120
Tmb / C
140
160
180
Fig.16. Normalised avalanche energy rating.
WDSS% = f(Tmb); conditions: ID = 75 A
12
VGS/V
VDD
+
10
L
8
VDS =
14V
VDS
44V
6
-
VGS
-ID/100
4
0
2
0
T.U.T.
R 01
shunt
RGS
0
20
40
60
80
100
120
140
QG/nC
Fig.17. Avalanche energy test circuit.
WDSS = 0.5 ⋅ LID2 ⋅ BVDSS /(BVDSS − VDD )
Fig.14. Typical turn-on gate-charge characteristics.
VGS = f(QG); conditions: ID = 50 A; parameter VDS
100
IF/A
+
80
VDD
RD
VDS
60
Tj/C =
25
175
-
VGS
40
0
RG
T.U.T.
20
0
0
0.1
0.2
0.3
0.4
0.5 0.6
VSDS/V
0.7
0.8
0.9
1
1.1
Fig.15. Typical reverse diode current.
IF = f(VSDS); conditions: VGS = 0 V; parameter Tj
December 1998
Fig.18. Switching test circuit.
5
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
BUK7506-55A
MECHANICAL DATA
Dimensions in mm
4,5
max
Net Mass: 2 g
10,3
max
1,3
3,7
2,8
5,9
min
15,8
max
3,0 max
not tinned
3,0
13,5
min
1,3
max 1 2 3
(2x)
0,9 max (3x)
2,54 2,54
0,6
2,4
Fig.19. SOT78 (TO220AB); pin 2 connected to mounting base.
Notes
1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent
damage to MOS gate oxide.
2. Refer to mounting instructions for SOT78 (TO220) envelopes.
3. Epoxy meets UL94 V0 at 1/8".
December 1998
6
Rev 1.100
Philips Semiconductors
Product specification
TrenchMOS transistor
Standard level FET
BUK7506-55A
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and
operation of the device at these or at any other conditions above those given in the Characteristics sections of
this specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
 Philips Electronics N.V. 1999
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the
copyright owner.
The information presented in this document does not form part of any quotation or contract, it is believed to be
accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any
consequence of its use. Publication thereof does not convey nor imply any license under patent or other
industrial or intellectual property rights.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices or systems where malfunction of these
products can be reasonably expected to result in personal injury. Philips customers using or selling these products
for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting
from such improper use or sale.
December 1998
7
Rev 1.100