INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC • The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC HEF4539B MSI Dual 4-input multiplexer Product specification File under Integrated Circuits, IC04 January 1995 Philips Semiconductors Product specification HEF4539B MSI Dual 4-input multiplexer DESCRIPTION The HEF4539B is a dual 4-input multiplexer with common select logic. Each multiplexer has four multiplexer inputs (I0 and I3), an active LOW enable input (E) and a multiplexer output (O). When HIGH, E forces O of the respective multiplexer LOW, independent of the select inputs (S0 to S1) and I0 to I3. When E is LOW, S0 and S1 determine which multiplexer input (I0 to I3) on each of the multiplexers is routed to the respective multiplexer output (O). Fig.1 Functional diagram. PINNING Fig.2 Pinning diagram. I0A, I1A, I2A, I3A multiplexer inputs I0B, I1B, I2B, I3B multiplexer inputs S0, S1 select inputs EA, EB enable inputs (active LOW) OA, OB multiplexer outputs FAMILY DATA, IDD LIMITS category MSI See Family Specifications HEF4539BP(N): 16-lead DIL; plastic (SOT38-1) HEF4539BD(F): 16-lead DIL; ceramic (cerdip) HEF4539BT(D): 16-lead SO; plastic (SOT74) (SOT109-1) ( ): Package Designator North America January 1995 2 Philips Semiconductors Product specification HEF4539B MSI Dual 4-input multiplexer Fig.3 Logic diagram. Notes FUNCTION TABLE INPUTS S0 S1 En On X X H L L L L I0 H L L I1 L H L I2 H H L I3 January 1995 1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial OUTPUT 3 Philips Semiconductors Product specification HEF4539B MSI Dual 4-input multiplexer AC CHARACTERISTICS VSS = 0 V; Tamb = 25 °C; CL = 50 pF; input transition times ≤ 20 ns VDD V SYMBOL MIN. TYP. TYPICAL EXTRAPOLATION FORMULA MAX. Propagation delays In → On 5 HIGH to LOW 10 tPHL 15 5 LOW to HIGH 10 tPLH 15 Sn → On 5 HIGH to LOW 10 tPHL 15 ns 22 ns + (0,16 ns/pF) CL 120 245 ns 93 ns + (0,55 ns/pF) CL 50 100 ns 39 ns + (0,23 ns/pF) CL 35 65 ns 27 ns + (0,16 ns/pF) CL 165 330 ns 138 ns + (0,55 ns/pF) CL 65 125 ns 54 ns + (0,23 ns/pF) CL 40 80 ns 32 ns + (0,16 ns/pF) CL 128 ns + (0,55 ns/pF) CL 49 ns + (0,23 ns/pF) CL 40 80 ns 32 ns + (0,16 ns/pF) CL 100 200 ns 73 ns + (0,55 ns/pF) CL 40 80 ns 29 ns + (0,23 ns/pF) CL 15 30 55 ns 22 ns + (0,16 ns/pF) CL 5 100 200 ns 73 ns + (0,55 ns/pF) CL tPHL 40 80 ns 29 ns + (0,23 ns/pF) CL 15 30 55 ns 22 ns + (0,16 ns/pF) CL 5 60 120 ns 10 ns + (1,0 ns/pF) CL tPLH 30 60 ns 9 ns + (0,42 ns/pF) CL 15 20 40 ns 6 ns + (0,28 ns/pF) CL 5 60 120 ns 30 60 ns 9 ns + (0,42 ns/pF) CL 20 40 ns 6 ns + (0,28 ns/pF) CL 10 LOW to HIGH 60 ns 10 HIGH to LOW 30 ns 5 Output transition times 34 ns + (0,23 ns/pF) CL 310 10 LOW to HIGH 93 ns + (0,55 ns/pF) CL ns 120 tPLH 15 HIGH to LOW ns 90 60 10 En → On 240 45 155 5 LOW to HIGH 120 10 tTHL tTLH 15 VDD V TYPICAL FORMULA FOR P (µW) 5 700 fi + ∑ (foCL) × VDD2 Dynamic power dissipation per 10 2900 fi + ∑ (foCL) × package (P) 15 8100 fi + ∑ (foCL) × VDD2 VDD2 10 ns + (1,0 ns/pF) CL where fi = input freq. (MHz) fo = output freq. (MHz) CL = load capacitance (pF) ∑ (foCL) = sum of outputs VDD = supply voltage (V) APPLICATION INFORMATION Some examples of applications for the HEF4539B are: January 1995 * Data selectors 4 * Data multiplexers