Philips Semiconductors Product specification PowerMOS transistor Logic level FET GENERAL DESCRIPTION N-channel enhancement mode logic level field-effect power transistor in a plastic full-pack envelope. The device is intended for use in Automotive applications, Switched Mode Power Supplies (SMPS), motor control, welding, DC/DC and AC/DC converters, and in general purpose switching applications. PINNING - SOT186 PIN BUK545-60H QUICK REFERENCE DATA SYMBOL PARAMETER VDS ID Ptot Tj RDS(ON) Drain-source voltage Drain current (DC) Total power dissipation Junction temperature Drain-source on-state resistance; VGS = 5 V PIN CONFIGURATION MAX. UNIT 60 21 30 150 38 V A W ˚C mΩ SYMBOL DESCRIPTION d case 1 gate 2 drain 3 source g case isolated s 1 2 3 LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER CONDITIONS VDS VDGR ±VGS ±VGSM Drain-source voltage Drain-gate voltage Gate-source voltage Non-repetitive gate-source voltage Drain current (DC) Drain current (DC) Drain current (pulse peak value) Total power dissipation Storage temperature Junction Temperature ID ID IDM Ptot Tstg Tj MIN. MAX. UNIT RGS = 20 kΩ tp ≤ 50 µs - 60 60 15 20 V V V V Ths = 25 ˚C Ths = 100 ˚C Ths = 25 ˚C Ths = 25 ˚C - - 55 - 21 13.5 82 30 150 150 A A A W ˚C ˚C TYP. MAX. UNIT - 4.17 K/W 55 - K/W THERMAL RESISTANCES SYMBOL PARAMETER CONDITIONS Rth j-hs Thermal resistance junction to heatsink Thermal resistance junction to ambient With heatsink compound Rth j-a August 1994 1 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET BUK545-60H STATIC CHARACTERISTICS Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS V(BR)DSS Drain-source breakdown voltage Gate threshold voltage Zero gate voltage drain current Zero gate voltage drain current Gate source leakage current Drain-source on-state resistance VGS(TO) IDSS IDSS IGSS RDS(ON) MIN. TYP. MAX. UNIT VGS = 0 V; ID = 0.25 mA 60 - - V VDS = VGS; ID = 1 mA VDS = 60 V; VGS = 0 V; Tj = 25 ˚C VDS = 60 V; VGS = 0 V; Tj =125 ˚C VGS = ±15 V; VDS = 0 V VGS = 5 V; ID = 20 A 1.0 - 1.5 1 0.1 10 25 2.0 10 1.0 100 38 V µA mA nA mΩ MIN. TYP. MAX. UNIT 11 20 - S DYNAMIC CHARACTERISTICS Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS gfs Forward transconductance VDS = 25 V; ID = 20 A Ciss Coss Crss Input capacitance Output capacitance Feedback capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1200 470 180 1750 600 275 pF pF pF td on tr td off tf Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time VDD = 30 V; ID = 3 A; VGS = 5 V; RGS = 50 Ω; Rgen = 50 Ω - 25 120 160 110 40 150 220 145 ns ns ns ns Ld Internal drain inductance - 4.5 - nH Ls Internal source inductance Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad - 7.5 - nH MIN. TYP. MAX. UNIT 1500 V ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS Visol Repetitive peak voltage from all three terminals to external heatsink R.H. ≤ 65% ; clean and dustfree Cisol Capacitance from T2 to external f = 1 MHz heatsink - - 12 - pF MIN. TYP. MAX. UNIT REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS Ths = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS IDR - - - 21 A IDRM VSD Continuous reverse drain current Pulsed reverse drain current Diode forward voltage IF = 21 A ; VGS = 0 V - 0.9 84 2.0 A V trr Qrr Reverse recovery time Reverse recovery charge IF = 21 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 30 V - 60 0.25 - ns µC August 1994 2 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET BUK545-60H AVALANCHE LIMITING VALUE SYMBOL PARAMETER CONDITIONS WDSS Drain-source non-repetitive unclamped inductive turn-off energy ID = 41 A ; VDD ≤ 25 V ; Ths = 25 ˚C VGS = 5 V ; RGS = 50 Ω Normalised Power Derating PD% 120 1000 with heatsink compound 110 100 90 MIN. TYP. MAX. UNIT - - 90 mJ BUK545-60H ID / A ID S/ 100 )= 80 70 tp = VD 10 us ON S( RD 60 100 us 100 us 1 ms 10 50 10 ms 1 ms 100 ms 10 ms 100 ms DC 40 30 1 20 10 0 0 20 40 60 80 Ths / C 100 120 0.1 0.1 140 Fig.1. Normalised power dissipation. PD% = 100⋅PD/PD 25 ˚C = f(Ths) 120 10 with heatsink compound 110 10 VDS / V 100 Fig.3. Safe operating area. Ths = 25 ˚C ID & IDM = f(VDS); IDM single pulse; parameter tp Normalised Current Derating ID% 1 Zth / (K/W) BUKx45-lv D= 100 90 0.5 1 0.2 0.1 0.05 0.1 0.02 0.01 0 80 70 60 50 40 30 PD tp D= 20 10 0 0 20 40 60 80 Ths / C 100 120 0.001 1E-07 140 Fig.2. Normalised continuous drain current. ID% = 100⋅ID/ID 25 ˚C = f(Ths); conditions: VGS ≥ 5 V August 1994 T 1E-05 1E-03 t/s tp T t 1E-01 1E+01 Fig.4. Transient thermal impedance. Zth j-hs = f(t); parameter D = tp/T 3 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET BUK545-60H ID / A 100 BUK5Y5-60H 10 15 40 gfs / S BUK5Y5-60H 6 5 80 30 4.5 60 4 40 20 3.5 10 3 20 Tj / C = -40 25 150 VGS / V = 2.5 0 0 2 4 6 8 0 10 0 20 40 VDS / V Fig.5. Typical output characteristics, Tj = 25 ˚C. ID = f(VDS); parameter VGS 0.2 RDS(ON) / Ohm 2.5 3 80 100 Fig.8. Typical transconductance, Tj = 25 ˚C. gfs = f(ID); conditions: VDS = 10 V a BUK5Y5-60H 3.5 60 ID / A Normalised RDS(ON) = f(Tj) 4 1.5 4.5 0.15 VGS / V = 5 1.0 0.1 10 0.5 0.05 6 15 0 0 20 40 60 80 0 100 -60 -40 -20 0 20 ID / A Fig.6. Typical on-state resistance, Tj = 25 ˚C. RDS(ON) = f(ID); parameter VGS 100 ID / A 40 60 Tj / C 80 100 120 140 Fig.9. Normalised drain-source on-state resistance. a = RDS(ON)/RDS(ON)25 ˚C = f(Tj); ID = 20 A; VGS = 5 V VGS(TO) / V BUK5Y5-60H max. 2 80 typ. 60 min. 1 40 20 Tj / C = -40 25 150 0 0 1 2 3 4 VGS / V 5 6 7 0 8 -60 Fig.7. Typical transfer characteristics. ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj August 1994 -40 -20 0 20 40 60 Tj / C 80 100 120 140 Fig.10. Gate threshold voltage. VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS 4 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET 1E-01 BUK545-60H SUB-THRESHOLD CONDUCTION ID / A IS / A 100 1E-02 -40 25 150 80 2% 1E-03 98 % typ 60 1E-04 40 1E-05 20 1E-06 0 0.4 0.8 1.2 VGS / V 1.6 2 0 2.4 0 0.5 1 1.5 VSDS / V Fig.11. Sub-threshold drain current. ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS 10000 BUKXY5-60H Tj / C = Fig.14. Typical reverse diode current. IF = f(VSDS); conditions: VGS = 0 V; parameter Tj BUK5Y5-60H C / pF 120 110 Ciss Coss Crss WDSS% 100 90 80 70 60 1000 50 40 30 20 10 0 100 0.1 1 10 20 100 40 VDS / V Fig.12. Typical capacitances, Ciss, Coss, Crss. C = f(VDS); conditions: VGS = 0 V; f = 1 MHz 15 60 80 100 Ths / C 120 140 Fig.15. Normalised avalanche energy rating. WDSS% = f(Ths); conditions: ID = 41 A BUK5Y5-60H VGS / V VDD + L VDD / V = 12 10 VDS 48 - VGS -ID/100 T.U.T. 0 5 RGS 0 0 10 20 30 40 50 60 70 R 01 shunt 80 QG / nC Fig.16. Avalanche energy test circuit. WDSS = 0.5 ⋅ LID2 ⋅ BVDSS /(BVDSS − VDD ) Fig.13. Typical turn-on gate-charge characteristics. VGS = f(QG); conditions: ID = 41 A; parameter VDS August 1994 5 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET BUK545-60H MECHANICAL DATA Dimensions in mm 10.2 max 5.7 max 3.2 3.0 Net Mass: 2 g 4.4 max 0.9 0.5 2.9 max 4.4 4.0 7.9 7.5 17 max seating plane 3.5 max not tinned 4.4 13.5 min 1 0.4 2 3 0.9 0.7 M 0.55 max 2.54 1.3 5.08 top view Fig.17. SOT186; The seating plane is electrically isolated from all terminals. Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for F-pack envelopes. 3. Epoxy meets UL94 V0 at 1/8". August 1994 6 Rev 1.000 Philips Semiconductors Product specification PowerMOS transistor Logic level FET BUK545-60H DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1996 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. August 1994 7 Rev 1.000 Error Log 545-60.H 1) Level: Format Error Message: Page break required with Keep enabled Location: Document Body Page E1 96-11-11 04:14 pm