BUK7510-55AL N-channel TrenchMOS standard level FET Rev. 02 — 3 January 2008 Product data sheet 1. Product profile 1.1 General description Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using NXP General-Purpose Automotive (GPA) TrenchMOS technology specifically optimized for linear operation. This product has been designed and qualified to the appropriate AEC standard for use in automotive critical applications. 1.2 Features 175 °C rated Stable operation in linear mode Q101 compliant TrenchMOS technology 1.3 Applications 12 V and 24 V loads DC linear motor control Automotive systems Repetitive clamped inductive switching 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit ID drain current VGS = 10 V; Tmb = 25 °C; see Figure 1 and 4 - - 75 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 300 W ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped inductive load - - 1.1 J VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12 and 13 - 8.5 10 mΩ [1] Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy Static characteristics RDSon [1] drain-source on-state resistance Continuous current is limited by package. BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 2. Pinning information Table 2. Pinning Pin Symbol Description 1 G gate 2 D drain 3 S source mb D mounting base; connected to drain Simplified outline Graphic symbol D mb G mbb076 S 1 2 3 SOT78 (TO-220AB) 3. Ordering information Table 3. Ordering information Type number BUK7510-55AL Package Name Description Version TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit - 55 V VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C RGS = 20 kΩ VDGR drain-gate voltage VGS gate-source voltage ID drain current - 55 V -20 20 V Tmb = 25 °C; VGS = 10 V; see Figure 1 and 4 [1][2] - 122 A Tmb = 25 °C; VGS = 10 V; see Figure 1 and 4 [3] - 75 A Tmb = 100 °C; VGS = 10 V; see Figure 1 [3] - 75 A IDM peak drain current Tmb = 25 °C; tp ≤ 10 μs; pulsed; see Figure 4 - 490 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 300 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C - 1.1 J - - J Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy ID = 75 A; Vsup ≤ 55 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped inductive load EDS(AL)R repetitive drain-source avalanche energy see Figure 3 [6] BUK7510-55AL_2 Product data sheet [4][5] © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 2 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET Table 4. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit Source-drain diode source current IS peak source current ISM Tmb = 25 °C [1][2] - 122 A Tmb = 25 °C [3] - 75 A - 490 A tp ≤ 10 μs; pulsed; Tmb = 25 °C [1] Current is limited by power dissipation chip rating. [2] Refer to document 9397 750 12572 for further information. [3] Continuous current is limited by package. [4] Single-shot avalanche rating limited by maximum junction temperature of 175 °C. [5] Repetitive avalanche rating limited by average junction temperature of 170 °C. [6] Refer to AN10273 for further information. 003aaa726 150 ID (A) 03aa16 120 Pder (%) 100 80 (1) 50 40 0 0 0 50 100 150 Tmb (°C) 200 VGS 10 V 0 P der = (1) Capped at 75 A due to package. Fig 1. Continuous drain current as a function of mounting base temperature P tot P tot (25°C ) 100 150 Tmb (°C) 200 × 100 % Fig 2. Normalized total power dissipation as a function of mounting base temperature BUK7510-55AL_2 Product data sheet 50 © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 3 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 003aaa739 102 (1) IAV (A) (2) Tj = 25 ˚C 10 150 ˚C (3) 1 10-1 10-2 10-1 1 tAV (ms) 10 (1) Singleíshot. (2) Singleíshot. (3) Repetitive. Fig 3. Single-shot and repetitive avalanche rating; avalanche current as a function of avalanche period 003aaa737 103 Limit RDSon = VDS / ID ID (A) tp = 10 μ s 100 μ s 102 (1) 1 ms DC 10 ms 10 100 ms 1 1 10 102 VDS (V) Tmb = 25 °C; IDM is single pulse (1) Capped at 75 A due to package. Fig 4. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK7510-55AL_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 4 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-a) thermal resistance from junction to ambient vertical in still air - 60 - K/W Rth(j-mb) thermal resistance from junction to mounting base see Figure 5 - 0.25 0.5 K/W 003aaa734 1 Zth(j-mb) (K/W) δ = 0.5 0.2 10-1 0.1 0.05 0.02 10 δ= P -2 single shot tp T t tp T 10-3 10-6 10-5 10-4 10-3 10-2 10-1 tp (s) 1 Fig 5. Transient thermal impedance from junction to mounting base as a function of pulse duration 6. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit ID = 250 μA; VGS = 0 V; Tj = -55 °C 50 - - V ID = 250 μA; VGS = 0 V; Tj = 25 °C 55 - - V gate-source threshold ID = 1 mA; VDS = VGS; Tj = 25 °C; voltage see Figure 10 and 11 2 3 4 V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10 and 11 - - 4.4 V ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 10 and 11 1 - - V Static characteristics V(BR)DSS VGS(th) drain-source breakdown voltage BUK7510-55AL_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 5 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit IDSS drain leakage current VDS = 55 V; VGS = 0 V; Tj = 175 °C - - 500 μA VDS = 55 V; VGS = 0 V; Tj = 25 °C - 0.05 10 μA IGSS gate leakage current VDS = 0 V; VGS = +20 V; Tj = 25 °C - 2 100 nA VDS = 0 V; VGS = -20 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 12 and 13 - - 20 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12 and 13 - 8.5 10 mΩ IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 16 - 0.85 1.2 V RDSon drain-source on-state resistance Source-drain diode VSD source-drain voltage trr reverse recovery time IS = 20 A; dIS/dt = -100 A/μs; VGS = 0 V; VDS = 30 V; Tj = 25 °C - 73 - ns Qr recovered charge IS = 20 A; dIS/dt = -100 A/μs; VGS = 0 V; VDS = 30 V; Tj = 25 °C - 430 - nC Dynamic characteristics QG(tot) total gate charge ID = 25 A; VDS = 44 V; VGS = 10 V; Tj = 25 °C; see Figure 14 - 124 - nC QGS gate-source charge ID = 25 A; VDS = 44 V; VGS = 10 V; Tj = 25 °C; see Figure 14 - 22 - nC QGD gate-drain charge ID = 25 A; VDS = 44 V; VGS = 10 V; Tj = 25 °C; see Figure 14 - 50 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 44 V; Tj = 25 °C; see Figure 14 - 5 - V Ciss input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 15 - 4710 6280 pF Coss output capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 15 - 980 1180 pF Crss reverse transfer capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 15 - 560 770 pF td(on) turn-on delay time VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C - 33 - ns tr rise time VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C - 117 - ns BUK7510-55AL_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 6 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit td(off) turn-off delay time VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C - 132 - ns tf fall time VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω; Tj = 25 °C - 95 - ns LD internal drain inductance from contact screw on package to center of die; Tj = 25 °C - 3.5 - nH from drain lead 6 mm from package to center of die; Tj = 25 °C - 4.5 - nH from source lead to source bond pad; Tj = 25 °C - 7.5 - nH LS internal source inductance 003aaa729 400 ID (A) 7 RDSon (mΩ) 20 18 300 16 14 12 VGS (V) = 10 9.5 9 8.5 8 7.5 7 6.5 6 5.5 5 4.5 100 0 9 10 2 4 6 10 VGS (V) = 20 5 0 8 VDS (V) 10 T j = 25 °C 0 100 200 300 ID (A) 400 T j = 25 °C Fig 6. Output characteristics: drain current as a function of drain-source voltage; typical values Fig 7. Drain-source on-state resistance as a function of drain current; typical values BUK7510-55AL_2 Product data sheet 8 15 200 0 003aaa731 20 © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 7 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 003aaa732 40 gfs (S) 003aaa733 150 ID (A) 35 100 30 50 25 Tj = 175 °C 20 Tj = 25 °C 0 0 20 40 60 ID (A) 80 0 T j = 25 °C; VDS = 25 V 03aa32 5 6 8 10 VGS (V) Fig 9. Transfer characteristics: drain current as a function of gate-source voltage; typical values 03aa35 10−1 ID (A) VGS(th) (V) 4 2 min 10−2 max 3 typ 10−3 min 10−4 typ max 10−5 1 0 60 120 180 Tj (°C) 10−6 0 2 4 6 VGS (V) ID = 1 m A; VDS = VGS T j = 25 °C; VDS = VGS Fig 10. Gate-source threshold voltage as a function of junction temperature Fig 11. Sub-threshold drain current as a function of gate-source voltage BUK7510-55AL_2 Product data sheet 4 VDS = 25 V Fig 8. Forward transconductance as a function of drain current; typical values 0 −60 2 © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 8 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 003aaa730 18 03ne89 2 a RDSon (mΩ) 1.5 14 1 10 0.5 0 -60 6 5 10 15 VGS (V) 20 T j = 25 °C; ID = 25 A a= Fig 12. Drain-source on-state resistance as a function of gate-source voltage; typical values 003aaa735 10 VGS (V) 0 60 120 Tj (°C) 180 R DSon R DSon (25°C ) Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature 003aaa738 8000 C (pF) Ciss 8 6000 VDS = 14 V VDS = 44 V 6 4000 Coss 4 C rss 2000 2 0 0 50 100 QG (nC) 150 T j = 25 °C; ID = 25 A 0 10-1 10 VDS (V) 102 VGS = 0 V ; f = 1 M H z Fig 14. Gate-source voltage as a function of gate charge; typical values Fig 15. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK7510-55AL_2 Product data sheet 1 © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 9 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 003aaa736 150 IS (A) 100 Tj = 25 °C 50 Tj = 175 °C 0 0.0 0.3 0.6 0.9 VSD (V) 1.2 VGS = 0 V Fig 16. Source current as a function of source-drain voltage; typical values BUK7510-55AL_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 10 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB E SOT78 A A1 p q mounting base D1 D L2 L1 Q b1 L 1 2 3 c b e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D D1 E e L L1 L2 max. p q Q mm 4.7 4.1 1.40 1.25 0.9 0.6 1.45 1.00 0.7 0.4 16.0 15.2 6.6 5.9 10.3 9.7 2.54 15.0 12.8 3.30 2.79 3.0 3.8 3.5 3.0 2.7 2.6 2.2 OUTLINE VERSION SOT78 REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 05-03-22 05-10-25 Fig 17. Package outline SOT78 (TO-220AB) BUK7510-55AL_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 11 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK7510_55AL_2 20080103 Product data sheet - BUK75_7610_55AL_1 Modifications: BUK75_7610_55AL_1 • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Typical thermal resistance from junction to mounting base figure added in Table 5. 20050331 Product data sheet BUK7510-55AL_2 Product data sheet - - © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 12 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Document status[1][2] Product status[3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. Definition [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] BUK7510-55AL_2 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 02 — 3 January 2008 13 of 14 BUK7510-55AL NXP Semiconductors N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 11 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 5 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 12 Legal information. . . . . . . . . . . . . . . . . . . . . . . 13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 3 January 2008 Document identifier: BUK7510-55AL_2