BUK7E2R3-40C N-channel TrenchMOS standard level FET Rev. 03 — 26 January 2009 Product data sheet 1. Product profile 1.1 General description Standard level gate drive N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using advanced TrenchMOS technology. This product has been designed and qualified to the appropriate AEC standard for use in high performance automotive applications. 1.2 Features and benefits AEC Q101 compliant Suitable for standard level gate drive Avalanche robust Suitable for thermally demanding environment up to 175°C rating 1.3 Applications 12V Motor, lamp and solenoid loads High performance automotive power systems High performance Pulse Width Modulation (PWM) applications 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit - - 40 V - - 100 A VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C ID drain current VGS = 10 V; Tmb = 25 °C; see Figure 1; see Figure 3; Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 333 W VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12; see Figure 13 - 1.96 2.3 mΩ ID = 100 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V; Tj(init) = 25 °C; unclamped - - 1.2 J [1] [2] Static characteristics RDSon drain-source on-state resistance Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy [1] Refer to document 9397 750 12572 for further information. [2] Continuous current is limited by package. BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 G gate 2 D drain 3 S source mb D mounting base; connected to drain Graphic symbol D mb G mbb076 S 1 2 3 SOT226 (TO-220AB; I2PAK) 3. Ordering information Table 3. Ordering information Type number Package Name Description BUK7E2R3-40C TO-220AB; plastic single-ended package (I2PAK); low-profile 3-lead TO-220AB I2PAK BUK7E2R3-40C_3 Product data sheet Version SOT226 © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 2 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 40 V VDGR drain-gate voltage RGS = 20 kΩ VGS gate-source voltage ID drain current - 40 V -20 20 V Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3; [1][2] - 100 A Tmb = 25 °C; VGS = 10 V; see Figure 1; see Figure 3; [1][3] - 276 A Tmb = 100 °C; VGS = 10 V; see Figure 1; [1][2] - 100 A - 1104 A IDM peak drain current Tmb = 25 °C; tp ≤ 10 µs; pulsed; see Figure 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 333 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Source-drain diode IS ISM source current peak source current Tmb = 25 °C; [1][3] - 276 A Tmb = 25 °C; [1][2] - 100 A - 1104 A - 1.2 J - - J tp ≤ 10 µs; pulsed; Tmb = 25 °C Avalanche ruggedness EDS(AL)S non-repetitive ID = 100 A; Vsup ≤ 40 V; RGS = 50 Ω; VGS = 10 V; drain-source avalanche Tj(init) = 25 °C; unclamped energy EDS(AL)R repetitive drain-source avalanche energy see Figure 4; [1] Refer to document 9397 750 12572 for further information. [2] Continuous current is limited by package. [3] Current is limited by power dissipation chip rating. [4] Maximum value not quoted. Repetitive rating defined in avalanche rating figure. [5] Single-pulse avalanche rating limited by maximum junction temperature of 175 °C. [6] Repetitive avalanche rating limited by an average junction temperature of 170 °C. [7] Refer to application note AN10273 for further information. BUK7E2R3-40C_3 Product data sheet [4][5] [6][7] © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 3 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab004 300 ID (A) 03aa16 120 Pder (%) 200 80 100 40 (1) 0 0 0 Fig 1. 50 100 150 Tmb (°C) 200 Continuous drain current as a function of mounting base temperature 0 50 100 150 200 Tmb (°C) Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aab028 104 ID (A) limit RDSon = VDS/ID 103 δ = 10 μs 100 μs 102 (1) DC 10 1 ms 10 ms 100 ms 1 10−1 10−1 1 102 10 VDS (V) Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 4 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab013 103 IAL (A) 102 (1) (2) 10 (3) 1 10-3 Fig 4. 10-2 10-1 1 tAL (ms) 10 Single-pulse and repetitive avalanche rating; avalanche current as a function of avalanche time BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 5 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Rth(j-mb) Rth(j-a) Conditions Min Typ Max Unit thermal resistance from see Figure 5 junction to mounting base - - 0.45 K/W thermal resistance from vertical in free air junction to ambient - 50 - K/W 003aab020 1 Zth(j-mb) (K/W) δ = 0.5 0.2 10−1 0.1 0.05 0.02 10−2 δ= P tp T single shot t tp T 10−3 10−6 Fig 5. 10−5 10−4 10−3 10−2 10−1 tp (s) 1 Transient thermal impedance from junction to mounting base as a function of pulse duration BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 6 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 6. Characteristics Table 6. Symbol Characteristics Parameter Conditions Min Typ Max Unit drain-source breakdown voltage ID = 250 µA; VGS = 0 V; Tj = -55 °C 36 - - V ID = 250 µA; VGS = 0 V; Tj = 25 °C 40 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10; see Figure 11 2 3 4 V VGSth gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 10; see Figure 11 1 - - V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10; see Figure 11 - - 4.4 V Static characteristics V(BR)DSS IDSS drain leakage current VDS = 40 V; VGS = 0 V; Tj = 25 °C - 0.02 1 µA IGSS gate leakage current VDS = 0 V; VGS = 20 V; Tj = 25 °C - 2 100 nA VDS = 0 V; VGS = -20 V; Tj = 25 °C - 2 100 nA VGS = 10 V; ID = 25 A; Tj = 175 °C; see Figure 12; see Figure 13 - - 4.26 mΩ VGS = 10 V; ID = 25 A; Tj = 25 °C; see Figure 12; see Figure 13 - 1.96 2.3 mΩ VDS = 40 V; VGS = 0 V; Tj = 175 °C - - 500 µA ID = 25 A; VDS = 32 V; VGS = 10 V; see Figure 15 - 175 - nC - 49 - nC - 67 - nC RDSon IDSS drain-source on-state resistance drain leakage current Dynamic characteristics QG(tot) total gate charge QGS gate-source charge QGD gate-drain charge VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 32 V; see Figure 15 - 5 - V Ciss input capacitance - 8492 11323 pF Coss output capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz; Tj = 25 °C; see Figure 16 - 1606 1927 pF Crss reverse transfer capacitance - 1101 1508 pF td(on) turn-on delay time - 65 - ns tr rise time - 133 - ns td(off) turn-off delay time - 146 - ns tf fall time - 119 - ns LD internal drain inductance from drain lead 6 mm from package to centre of die - 4.5 - nH from upper edge of drain mounting base to centre of die - 2.5 - nH from source lead to source bonding pad - 7.5 - nH LS internal source inductance VDS = 30 V; RL = 1.2 Ω; VGS = 10 V; RG(ext) = 10 Ω Source-drain diode VSD source-drain voltage IS = 25 A; VGS = 0 V; Tj = 25 °C; see Figure 14 - 0.85 1.2 V trr reverse recovery time - 75 - ns Qr recovered charge IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V; VDS = 30 V - 57 - nC BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 7 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab005 300 20 10 7 6.5 ID (A) 003aab007 6 RDSon (mΩ) VGS (V) = 6 VGS (V) = 5.5 5 6.5 200 4 5.5 3 7 100 5 8 10 2 20 4.5 0 1 0 Fig 6. 2 4 6 8 10 VDS (V) Output characteristics: drain current as a function of drain-source voltage; typical values 003aab008 180 0 100 200 300 ID (A) Fig 7. Drain-source on-state resistance as a function of drain current; typical values 003aab010 400 ID (A) gfs (S) 300 120 200 60 100 Tj = 175 °C 0 0 0 Fig 8. Tj = 25 °C 20 40 60 ID (A) 0 80 Forward transconductance as a function of drain current; typical values Fig 9. 3 4 6 VGS (V) 7 Transfer characteristics: drain current as a function of gate-source voltage; typical values BUK7E2R3-40C_3 Product data sheet 1 © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 8 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 03aa32 5 03aa35 10−1 ID (A) VGS(th) (V) 4 3 typ max 10−3 typ 2 min 10−2 max 10−4 min 10−5 1 0 −60 10−6 0 60 120 0 180 2 4 Tj (°C) Fig 10. Gate-source threshold voltage as a function of junction temperature Fig 11. Sub-threshold drain current as a function of gate-source voltage 003aab006 4 6 VGS (V) 03aa27 2 a RDSon (mΩ) 1.5 3 1 2 0.5 1 5 10 15 VGS (V) 20 Fig 12. Drain-source on-state resistance as a function of gate-source voltage; typical values 0 -60 60 120 Tj (°C) 180 Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature BUK7E2R3-40C_3 Product data sheet 0 © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 9 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 003aab012 200 003aab011 10 VGS (V) IS (A) 8 150 VDD = 14 V VDD = 32 V 6 100 4 Tj = 175 °C Tj = 25 °C 50 2 0 0.0 0 0.5 1.0 1.5 VSD (V) 0 2.0 Fig 14. Source current as a function of source-drain voltage; typical values 50 100 150 QG (nC) 200 Fig 15. Gate-source voltage as a function of gate charge; typical values 003aab009 14000 Ciss C (pF) 10500 Coss 7000 Crss 3500 0 10−2 10−1 1 102 10 VDS (V) Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 10 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 7. Package outline Plastic single-ended package (I2PAK); low-profile 3-lead TO-220AB SOT226 A A1 E D1 mounting base D L1 Q b1 L 1 2 3 c b e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1 c D max D1 E e L L1 Q mm 4.5 4.1 1.40 1.27 0.85 0.60 1.3 1.0 0.7 0.4 11 1.6 1.2 10.3 9.7 2.54 15.0 13.5 3.30 2.79 2.6 2.2 OUTLINE VERSION SOT226 REFERENCES IEC JEDEC JEITA low-profile 3-lead TO-220AB EUROPEAN PROJECTION ISSUE DATE 05-06-23 06-02-14 Fig 17. Package outline SOT226 (I2PAK) BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 11 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes BUK7E2R3-40C_3 20090126 Product data sheet - BUK75_7E2R3-40C_2 Modifications: • The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • • Legal texts have been adapted to the new company name where appropriate. Type number BUK7E2R3-40C separated from data sheet BUK75_7E2R3-40C_2. BUK75_7E2R3-40C_2 20060810 Product data sheet - BUK75_7E2R3-40C_1 BUK75_7E2R3-40C_1 20060503 Product data sheet - - BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 12 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 9. Legal information 9.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 9.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] BUK7E2R3-40C_3 Product data sheet © NXP B.V. 2009. All rights reserved. Rev. 03 — 26 January 2009 13 of 14 BUK7E2R3-40C NXP Semiconductors N-channel TrenchMOS standard level FET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . .12 Legal information. . . . . . . . . . . . . . . . . . . . . . . .13 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .13 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2009. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 26 January 2009 Document identifier: BUK7E2R3-40C_3