INTEGRATED CIRCUITS 74ABT10 Triple 3-input NAND gate Product specification IC23 Data Handbook 1995 Sep 22 Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 QUICK REFERENCE DATA SYMBOL LOGIC SYMBOL CONDITIONS Tamb = 25°C; GND = 0V PARAMETER TYPICAL UNIT 3.3 2.2 ns 0.4 ns tPLH tPHL Propagation delay An, Bn, Cn to Yn tOSLH tOSHL Output to Output skew CIN Input capacitance VI = 0V or VCC 3 pF ICC Total supply current Outputs disabled; VCC = 5.5V 50 µA CL = 50pF; VCC = 5V 1 2 13 3 4 5 9 A0 B0 C0 A1 B1 C1 A2 Y0 Y1 Y2 12 6 8 VCC = Pin 14 GND = Pin 7 B2 C2 SA00347 LOGIC SYMBOL (IEEE/IEC) PIN CONFIGURATION 1 A0 1 14 VCC B0 2 13 C0 A1 3 12 Y0 B1 4 11 C2 C1 5 10 B2 4 Y1 6 9 A2 5 GND 7 8 Y2 & 12 2 13 3 6 9 10 SA00346 8 11 PIN DESCRIPTION PIN NUMBER SYMBOL 1, 2, 3, 4, 5, 9, 10, 11, 13 An, Bn, Cn 6, 8, 12 Yn Data outputs 7 GND Ground (0V) 14 VCC Positive supply voltage NAME AND FUNCTION SV00059 Data inputs FUNCTION TABLE INPUTS LOGIC DIAGRAM 1 A0 2 12 B1 C1 A2 B2 C2 Bn L L OUTPUTS Cn Yn L L H L H H L H L H L H H H H L L H H L H H 3 H H L H 4 H H H L Y0 C0 A1 An 13 B0 VCC = Pin 14 GND = Pin 7 11 10 6 Y1 NOTES: H = High voltage level L = Low voltage level 5 9 10 8 Y2 11 SA00348 ORDERING INFORMATION TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 14-Pin Plastic DIP PACKAGES –40°C to +85°C 74ABT10 N 74ABT10 N SOT27-1 14-Pin plastic SO –40°C to +85°C 74ABT10 D 74ABT10 D SOT108-1 14-Pin Plastic SSOP Type II –40°C to +85°C 74ABT10 DB 74ABT10 DB SOT337-1 14-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT10 PW 74ABT10PW DH SOT402-1 1995 Sep 22 2 853-1810 15793 Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 ABSOLUTE MAXIMUM RATINGS1, 2 PARAMETER SYMBOL VCC CONDITIONS DC supply voltage IIK DC input diode current VI DC input voltage3 IOK DC output diode current RATING UNIT –0.5 to +7.0 V –18 mA VI < 0 –1.2 to +7.0 V VO < 0 –50 mA –0.5 to +5.5 V 40 mA –65 to 150 °C VOUT DC output voltage3 output in Off or High state IOUT DC output current output in Low state Tstg Storage temperature range NOTES: 1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. 3. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. RECOMMENDED OPERATING CONDITIONS SYMBOL VCC LIMITS PARAMETER DC supply voltage UNIT MIN MAX 4.5 5.5 V 0 VCC V VI Input voltage VIH High-level input voltage VIL Low-level input voltage 0.8 V IOH High-level output current –15 mA IOL Low-level output current 2.0 ∆t/∆v Input transition rise or fall rate Tamb Operating free-air temperature range V 20 mA 0 10 ns/V –40 +85 °C DC ELECTRICAL CHARACTERISTICS LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = –40°C to +85°C Tamb = +25°C MIN TYP MAX –0.9 –1.2 MIN UNIT MAX VIK Input clamp voltage VCC = 4.5V; IIK = –18mA VOH High-level output voltage VCC = 4.5V; IOH = –15mA; VI = VIL or VIH VOL Low-level output voltage VCC = 4.5V; IOL = 20mA; VI = VIL or VIH 0.35 0.5 0.5 V Input leakage current VCC = 5.5V; VI = GND or 5.5V ±0.01 ±1.0 ±1.0 µA IOFF Power-off leakage current VCC = 0.0V; VO or VI ≤ 4.5V ±5.0 ±100 ±100 µA ICEX Output High leakage current VCC = 5.5V; VO = 5.5V; VI = GND or VCC 5.0 50 50 µA IO Output current1 VCC = 5.5V; VO = 2.5V –75 –180 –180 mA ICC Quiescent supply current VCC = 5.5V; VI = GND or VCC 2 50 50 µA Additional supply current per input pin2 VCC = 5.5V; One data input at 3.4V, other inputs at VCC or GND 0.25 500 500 µA II ∆ICC 2.5 –50 2.9 NOTES: 1. Not more than one output should be tested at a time, and the duration of the test should not exceed one second. 2. This is the increase in supply current for each input at 3.4V. 3. For valid test results, data must not be loaded into the flip-flop or latch after applying the power. 1995 Sep 22 3 –1.2 2.5 –50 V V Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 AC CHARACTERISTICS GND = 0V; tR = tF = 2.5ns; CL = 50pF, RL = 500Ω LIMITS SYMBOL tPLH tPHL tOSHL tOSLH1 Tamb = +25°C VCC = +5.0V WAVEFORM PARAMETER Propagation delay An, Bn, Cn to Yn 1 Output to Output skew An or Bn to Yn 2 Tamb = –40°C to +85°C VCC = +5.0V ±0.5V UNIT MIN TYP MAX MIN MAX 1.0 1.0 3.3 2.2 4.7 3.3 1.0 1.0 5.3 3.7 ns 0.4 0.5 0.5 ns NOTE: 1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the the same direction, either HIGH–to-LOW (tOSHL) or LOW-to-HIGH (tOSLH); parameter guaranteed by design. AC WAVEFORMS VM = 1.5V, VIN = GND to 3.0V INPUT An, Bn, Cn VM VM tPHL tPLH OUTPUT tPHL MIN VM Yn VM tPLH OUTPUT N same part MIN SA00357 Waveform 1. Propagation Delay for Inverting Outputs tPLH tPHL MAX tOSLH MAX tOSHL SA00381 Waveform 2. Common edge skew TEST CIRCUIT AND WAVEFORMS tW 90% VCC 90% VM NEGATIVE PULSE AMP (V) VM 10% 10% 0V PULSE GENERATOR VIN VOUT tTHL (tF) D.U.T. RT CL tTLH (tR) tTLH (tR) RL tTHL (tF) 90% POSITIVE PULSE AMP (V) 90% VM VM 10% Test Circuit for Outputs 10% tW 0V VM = 1.5V Input Pulse Definition DEFINITIONS RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. INPUT PULSE REQUIREMENTS FAMILY 74ABT Amplitude Rep. Rate tW tR tF 3.0V 1MHz 500ns 2.5ns 2.5ns SH00067 1995 Sep 22 4 Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 DIP14: plastic dual in-line package; 14 leads (300 mil) 1995 Sep 22 5 SOT27-1 Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 SO14: plastic small outline package; 14 leads; body width 3.9 mm 1995 Sep 22 6 SOT108-1 Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 SSOP14: plastic shrink small outline package; 14 leads; body width 5.3 mm 1995 Sep 22 7 SOT337-1 Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm 1995 Sep 22 8 SOT402-1 Philips Semiconductors Product specification Triple 3-input NAND gate 74ABT10 DEFINITIONS Data Sheet Identification Product Status Definition Objective Specification Formative or in Design This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. Preliminary Specification Preproduction Product This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. Product Specification Full Production This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product. Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. Copyright Philips Electronics North America Corporation 1995 All rights reserved. Printed in U.S.A. (print code) Document order number: Date of release: July 1994 9397-750-04851