PCF2128 Integrated RTC / TCXO / Crystal Rev. 00.03 — 4 June 2007 Preliminary [short] data sheet 1. General description The PCF2128 is a ready to run CMOS real time clock/calendar with an integrated temperature compensated crystal oscillator (TCXO). In timekeeping applications the high accuracy of the PCF2128 allows it to be used as a replacement for costly and higher powered long wave receivers or GPS receivers. A programmable battery switch-over circuit enables an uninterruptible power supply and consequently continuous timekeeping. The PCF2128 additionally features 512 bytes of general purpose RAM, a programmable watchdog, a time stamp facility and a voltage monitoring facility. Programming is possible using either an SPI or an I2C-bus interface. 2. Features Integration of a 32.768 kHz quartz crystal in the same package as the RTC temperature compensated crystal oscillator (TCXO) with integrated capacitors. accuracy: typically 3 ppm from−20 °C to +70 °C, typically 5 ppm from −40 °C to +85 °C provides year, month, day, weekday, hours, minutes and seconds programmable alarm function with interrupt capability programmable countdown timer with interrupt capability programmable watchdog timer with interrupt and reset capability 512 bytes of general purpose static RAM 1 second or 1 minute interrupt output oscillator stop detection two line bi-directional 1 MHz fast mode plus I2C interface timestamp input power-on reset 3 line SPI interface with separate data input and output (maximum speed 6.5 Mbits/s) programmable square wave output pin timestamp function with interrupt capability battery backup input pin and switch-over I2C-bus slave address: read A3H and circuitry write A2H extra power fail detection with input and clock operating voltage: <tbd> to 5.5 V output pins battery low detection low backup current; typical 0.95 μA at VDD = 3.0 V and Tamb = 25 °C battery backed output voltage pin selectable I2C and SPI interface PCF2128 NXP Semiconductors Real time clock / calendar 3. Quick reference data Table 1. Quick reference data VDD = 1.8 to 5.5 V; VSS = 0 V; Tamb = −40 to +85 °C unless otherwise specified. Symbol Parameter VDD supply voltage IDD supply current Conditions Min Typ Max Unit 1.8 - 5.5 V fSCL = 6.5 MHz - - 800 μA fSCL = 1.0 MHz - - 200 μA VDD = 5.0 V - 2700 - nA VDD = 3.0 V - 2100 - nA VDD = 5.0 V - 850 - nA VDD = 3.0 V - 450 - nA interface active interface inactive (fSCL = 0 kHz) timekeeping and power management configuration, CLKOUT disabled; interface inactive (fSCL = 0 kHz) timekeeping configuration; Tamb = +25 °C fSCL SCL clock frequency 0 - 6.5 MHz Δf / f frequency stability (fo = 32.768 kHz) Tamb = −40 to +85 °C - ±5 - ppm Tamb = −20 to +70 °C - ±3 ±5 ppm Tamb ambient temperature operating −40 - +85 °C Tstg storage temperature −65 - +150 °C 4. Ordering information Table 2: Ordering information Type number Topside mark Package Name Description Version PCF2128T / 1 PCF2128T SO20 plastic thin shrink small outline package; 20 leads; body width 4.4mm SOT163-1 PCF2128_SDS_0 Preliminary [short] data sheet © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 2 of 10 PCF2128 NXP Semiconductors Real time clock / calendar 5. Block diagram INT 17 TCXO OSCI CONTROL 1 00 CONTROL 2 01 CONTROL 3 02 SECONDS 03 MINUTES 04 HOURS 05 DAYS 06 WEEKDAYS 07 MONTHS 08 YEARS 09 SECOND ALARM 0A MINUTE ALARM 0B HOUR ALARM 0C DAY ALARM 0D WEEKDAY ALARM 0E CLOCKOUT CONTROL 0F TIMER CONTROL 10 COUNTDOWN TIMER 11 1/16 SECOND TIMESTAMP 12 SECOND TIMESTAMP 13 MINUTE TIMESTAMP 14 HOUR TIMESTAMP 15 DAY TIMESTAMP 16 MONTH TIMESTAMP 17 SCL YEAR TIMESTAMP 18 SDO CRYSTAL AGING OFFSET 19 RAM ADDRESS MSB 1A RAM ADDRESS LSB 1B RAM WRITE 1C RAM READ 1D DIVIDER AND TIMER 32.768 kHz OSCO CLKOUT VOUT VDD VBAT VSS 7 18 20 BATTERY BACK UP SWITCH-OVER CIRCUITRY 19 8 OSCILLATOR MONITOR RST SDA/CE SDO SDI SCL IFS TEMP 1 Hz LOGIC CONTROL RESET 16 4 3 ADDRESS REGISTER SERIAL BUS INTERFACE 2 1 5 INTERFACE SELECTORS SCL I2C BUS INTERFACE SDA/CE TS internal power supply 6 SDI 512 BYTES STATIC RAM SDA/CE PFI 15 TEMP 1.25 V (internal) TEMPERATURE SENSOR 14 13 PFO TEST 001aag059_02 Fig 1. Block diagram of PCF2128 PCF2128_SDS_0 Preliminary [short] data sheet © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 3 of 10 PCF2128 NXP Semiconductors Real time clock / calendar 6. Pinning information 6.1 Pinning SCL 1 20 VDD SDI 2 19 VBAT SDO 3 18 VOUT SDA/CE 4 17 INT IFS 5 TS 6 CLKOUT 7 14 PFO VSS 8 13 TEST n.c. 9 12 n.c. n.c. 10 11 n.c. PCF2128 die oscillator 16 RST 15 PFI 001aag576 001aag060 Fig 2. Pin configuration SO20 Table 3: Symbol Fig 3. SO20 (3d) Pin description PCF2128 Pin Description I2C Symbol Pin Description SCL 1 combined serial clock input for both and SPI interface. May float when CE inactive. VDD 20 positive supply voltage SDI 2 serial data input for SPI interface. May float when CE inactive. VBAT 19 battery backup supply voltage SDO 3 serial data output for SPI interface, push-pull VOUT 18 battery backed output voltage SDA / CE 4 combined serial data input / output for the I2C interface and chip enable input (active LOW) for the SPI interface. INT 17 interrupt output (open-drain; active LOW) IFS 5 interface selector input RST 16 reset output (open drain; active LOW) • connect to ground to select the SPI interface • connect to VOUT (pin 18) to select the I2C interface TS 6 timestamp input (active LOW) with 200 kΩ internal pull-up resistor PFI 15 power fail input CLKOUT 7 clock output (open drain) PFO 14 power fail output (open drain; active LOW) VSS 8 ground TEST 13 Do not connect and do not use as feed through. nc 9 Do not connect and do not use as feed through. nc 12 Do not connect and do not use as feed through. nc 10 Do not connect and do not use as feed through. nc 11 Do not connect and do not use as feed through. PCF2128_SDS_0 Preliminary [short] data sheet © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 4 of 10 PCF2128 NXP Semiconductors Real time clock / calendar 7. Limiting values Table 4: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD Conditions Min Max Unit supply voltage −0.5 +6.5 V VBAT backup battery supply voltage −0.5 +6.5 V IDD supply current −50 +50 mA VI input voltage −0.5 +6.5 V VO output voltage −0.5 +6.5 V II input current −10 +10 mA IO output current −10 +10 mA Ptot total power dissipation - 300 mW Tamb ambient temperature −40 +85 °C Tstg storage temperature −65 +150 °C 7.1 ESD values • ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115 and 2000 V CDM per JESD22-C101. • Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA. 8. Application information • The PCF2128 is a ready to run real time clock; no external quartz is required. • You can set different configurations in your application depending on the PCF2128 functions you want to use. • The integration of the quartz crystal in the same package as the RTC has the following advantages: – elimination of crystal procurement issues – elimination of RTC frequency tuning – no more crystal PCB layout issues. • You can select the SPI or I2C-bus interface using the IFS pin. • By connecting a battery to VBAT an uninterruptible power supply is guaranteed. • You can use the battery backed voltage VOUT to supply an external RAM to retain RAM data in battery backup mode. • You can connect PFI through an external voltage divider to VDD to allow extra power fail detection. If not used, connect PFI to VSS. • You can connect the timestamp input pin TS to a push button for tamper detection. PCF2128_SDS_0 Preliminary [short] data sheet © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 5 of 10 PCF2128 NXP Semiconductors Real time clock / calendar 8.1 Application example 8.1.1 Timekeeping, power management, CLKOUT, timestamp and interface active PCF2128 used for timekeeping, power management, CLKOUT and timestamp functions (see Figure 4). The interface is active. Vout supplies an external chip (e.g. SRAM). mgm002_09 VDD = 2.2 - 5.5 V microcontroller SCL from PCF2128 INT RST PFO RPU RPU PCF2128 1 SCL VDD 20 SDI 2 SDI VBAT 19 SDO 3 SDO VOUT 18 CE 4 SDA / CE INT 17 5 IFS RST 16 6 TS PFI 15 7 CLKOUT PFO 14 8 VSS n.c. 13 9 n.c. n.c. 12 10 n.c. n.c. 11 VSS R1 INT to the MCU RST PFO 100 nF 100 nF VSS R2 Batt 100 nF SRAM VDD Fig 4. Application diagram: timekeeping, power management, CLKOUT, timestamp with the interface active PCF2128_SDS_0 Preliminary [short] data sheet © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 6 of 10 PCF2128 NXP Semiconductors Real time clock / calendar 9. Revision history Table 5. Revision history Document ID Release date Data sheet status PCF2128__SDS_00.03 <tbd> Preliminary • Modifications: PCF2128__SDS_00.02 • PCF2128__SDS_00.01 PCF2128__SDS_00.02 Preliminary PCF2128__SDS_00.01 Datasheet text ammended. Section 8.1 corrected. 20070509 Preliminary short data sheet PCF2128_SDS_0 Preliminary [short] data sheet Supersedes Added Figure 3. 20070604 Modifications: Change notice - © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 7 of 10 PCF2128 NXP Semiconductors Real time clock / calendar 10. Legal information 10.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 10.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 10.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of a NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. 10.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus — logo is a trademark of NXP B.V. 11. Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] PCF2128_SDS_0 Preliminary [short] data sheet © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 8 of 10 PCF2128 NXP Semiconductors Real time clock / calendar Notes PCF2128_SDS_0 Preliminary [short] data sheet © NXP B.V. 2007. All rights reserved. Rev. 00.03 — 4 June 2007 9 of 10 PCF2128 NXP Semiconductors Real time clock / calendar 12. Contents 1 2 3 4 5 6 6.1 7 7.1 8 8.1 8.1.1 9 10 10.1 10.2 10.3 10.4 11 12 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 ESD values . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application information. . . . . . . . . . . . . . . . . . . 5 Application example . . . . . . . . . . . . . . . . . . . . . 6 Timekeeping, power management, CLKOUT, timestamp and interface active . . . . . . . . . . . . . 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 7 Legal information. . . . . . . . . . . . . . . . . . . . . . . . 8 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 8 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Contact information. . . . . . . . . . . . . . . . . . . . . . 8 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 4 June 2007 Document identifier: PCF2128_SDS_0