IRF IRS21853SPBF

Data Sheet No. PD60294
IRS21853SPBF
DUAL HIGH SIDE DRIVER IC
Features
•
•
•
•
•
•
Product Summary
Gate drive supply range from 10 V to 20 V
Under voltage lockout for VCC & VBS1,2
5 V input logic compatible
Tolerant to negative transient voltage
Matched propagation delays for all channels
RoHS compliant
VOFFSET
600 V max
VOUT
10 V to 20 V
ton/toff (typ)
170 ns/170 ns
2 A/2 A
Io+/-
Descriptions
Delay Matching
The IRS21853 is a high voltage, high speed power
MOSFET and IGBT dual high-side driver with propagation
delay matched output channels. Proprietary HVIC and
latch immune CMOS technologies enable ruggedized
monolithic construction. The floating logic input is
compatible with standard CMOS or LSTTL output, down to
3.3 V logic and can be operated up to 600 V above the
ground. The output driver features a high pulse current
buffer stage designed for minimum driver crossconduction. The floating channel can be used to drive an
N-channel power MOSFET or IGBT in the high-side
configuration, which operates up to 600 V.
40 ns
Package
16-Lead SOIC (narrow body)
Typical Connection Diagram
1
V B1
16
2
HO1
15
V S1
14
3
VCC
4
COM
5
H IN 1
6
H IN 2
IR S21853
S O N 16
+V D C 1
13
12
V S2
11
7
HO2
10
8
V B2
9
+VD C 2
IRS21853SPBF
Typical Connection Diagram for ER Circuit in PDP
1
VB1
16
2
HO1
15
VS1
14
3
VCC
4
COM
5
HIN1
6
HIN2
IRS21853
SON16
L ER
C
Cp
13
12
VS2
11
7
HO2
10
8
VB2
9
C ERC
2
IRS21853SPBF
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur.
parameters are absolute voltages referenced to COM.
Symbol
VCC
VIN
VB1,2
VS1,2
VHO1,2
dVS/dt
PD
RθJA
TJ
TS
TL
Note1:
Definition
Low side supply voltage
Logic input voltage (HIN1,2)
High side floating well supply voltage
High side floating well supply return voltage
Floating gate drive output voltage
Allowable VS1,2 offset supply transient relative to COM
Package power dissipation @ TA ≤+25 ºC
Thermal resistance, junction to ambient
Junction temperature
Storage temperature
Lead temperature (soldering, 10 seconds)
All voltage
Min
Max
-0.3
COM-0.3
-0.3
VB1,2-20
VS1,2-0.3
-
20 (Note1)
VCC +0.3
620 (Note1)
VBn+0.3
VBn+0.3
50
1.25
100
-55
150
-
300
Units
V
V/ns
W
ºC/W
ºC
All supplies are fully tested at 25 V. An internal 20 V clamp exists for each supply.
Recommended Operating Conditions
For proper operation, the device should be used within the recommended conditions. All voltage parameters are absolute
voltages referenced to COM. The offset rating are tested with supplies of (VCC-COM)=(VB1,2-VS1,2)=15 V.
Symbol
VCC
VIN
VB1,2
VS1,2
VHO1,2
TA
Note 2:
Note 3:
Definition
Low side supply voltage
HIN1, 2 input voltage
High side floating well supply voltage
High side floating well supply offset voltage
Floating gate drive output voltage
Ambient temperature
Min
Max
10
COM
VS1,2+10
Note 2
VS1,2
-40
20
VCC
VS1,2+20
600
VB1,2
125
Units
V
ºC
VS1,2 and VB1,2 voltages will be tolerant to short negative transient spikes. These will be defined and specified in
the future.
Logic operation for VS of –5 V to 600 V. Logic state held for VS of –5 V to –VBS1,2. (Please refer to Design Tip
DT97-3 for more details).
3
IRS21853SPBF
Static Electrical Characteristics
(VCC-COM)=(VB1,2-VS1,2)=15 V. TA = 25 oC unless otherwise specified. The VIN, VIN,TH, and IIN parameters are referenced to
COM. The VO and IO parameters are referenced to respective VS1,2 and are applicable to the respective output leads
HO1,2. The VCCUV parameters are referenced to COM. The VBSUV1,2 parameters are referenced to VS1,2.
Symbol
Definition
Min
Typ
Max Units
VCCUV+
VCC supply undervoltage positive going threshold
8.0
8.9
9.8
VCCUV-
VCC supply undervoltage negative going threshold
7.4
8.2
9.0
8.0
8.9
9.8
7.4
8.2
9.0
---
---
50
V
ILK1,2
VBS1,2 supply undervoltage positive going
threshold
VBS1,2 supply undervoltage negative going
threshold
High-side floating well offset supply leakage
current
IQBS
Quiescent VBS supply current
---
75
150
IQCC
Quiescent VCC supply current
---
110
220
VIH
Logic “1” input voltage
3.5
---
---
VIL
Logic “0” input voltage
---
---
0.6
VOH
HO1,2 high level output voltage, VBIAS-VO
---
---
1.4
VOL
HO1,2 low level output voltage, VO
---
---
0.0
6
IIN+
Logic “1” input bias current
---
5
20
VBSUV+
VBSUV-
Test Conditions
VB1,2 = VS1,2 = 600 V
µA
HIN1,2 = 0 V or 5 V
V
Io= 0 A
Io=20 mA
VHIN1,2=5 V
µA
IIN-
Logic “0” input bias current
---
---
5
VHIN1,2=0 V
Io+
Output high short circuit pulsed current
HO1,2
---
2
---
VO=0 V,VIN=0 V,
PW<=10 µs
Io-
Output low short circuit pulsed current
HO1,2
---
A
2
---
VO=15 V,VIN=5 V,
PW<=10 µs
4
IRS21853SPBF
Dynamic Electrical Characteristics (All values are target data)
(VCC-COM)= (VB1,2-VS1,2)=15 V. TA = 25 oC unless otherwise specified. CL = 1000 pF unless otherwise specified. All
parameters are reference to COM.
Symbol
Definition
Min
Typ
Max
ton
Turn-on propagation delay (HO1,2)
---
170
---
(Vs1,2-COM)=0 V
toff
Turn-off propagation delay (HO1,2)
---
170
---
(Vs1,2-COM)=600 V
tr
Turn-on rise time
---
15
50
tf
Turn-off fall time
---
15
50
Delay matching (Note 1)
---
---
40
MT
Units
Test Conditions
ns
Note 4:Max(ton,HO1, ton,HO2)- Min(ton,HO1, ton,HO2); Max(toff,HO1, toff,HO2)- Min(toff,HO1, toff,HO2)
5
IRS21853SPBF
Functional Block Diagram
VCC
COM
5V
VREG
VCCUV
DETECT
HIGHSIDE CHANNLE1
VB1
HIN1
PULSE
GEN
LEVEL
SHIFT UP
FILTER,
LATCH
UV DETECT
DRIVER
HO1
VS1
HIGHSIDE CHANNEL2
VB2
HIN2
PULSE
GEN
LEVEL
SHIFT UP
FILTER,
LATCH
UV DETECT
DRIVER
HO2
VS2
6
IRS21853SPBF
Lead Definitions
Symbol
Description
VCC
Low side supply voltage
COM
Ground
VB1,2
High side gate drive floating supply
HO1,2
High side driver outputs
VS1,2
High voltage floating supply return
HIN1,2
Logic inputs for high side gate driver outputs (in phase)
Lead Assignments
1
16
VB1
2
15
HO1
VCC
3
14
VS1
COM
4
HIN1
5
HIN2
6
11
VS2
7
10
HO2
8
9
VB2
IRS21853
SONIC16
13
12
7
IRS21853SPBF
50%
50%
IN
t on
t off
tr
90%
OUT
tf
90%
10%
10%
Figure 1: Switching Time Waveforms
HIN1,2
HO1,2
Figure 2: Input/Output Timing Diagram
8
IRS21853SPBF
500
Turn-On Delay Time (ns)
Turn-On Delay Time (ns)
500
400
300
200
100
Typ.
0
-50
400
300
Typ.
200
100
0
-25
0
25
50
75
100
125
10
12
500
500
400
400
Turn-Off Time (ns)
Turn-Off Time (ns)
18
20
18
20
Figure 3B. Turn-On Tim e
vs. Supply Voltage
Figure 3A. Turn-On Tim e
vs. Tem perature
300
200
Typ.
100
300
Typ.
200
100
0
-25
0
25
50
75
100
10
125
12
14
16
VBIAS Supply Voltage (V)
Temperature (oC)
Figure 4A. Turn-Off Tim e
vs. Tem perature
Figure 4B. Turn-Off Tim e
vs. Supply Voltage
60
Turn-On Rise Time (ns)
60
Turn-On Rise Time (ns)
16
VBIAS Supply Voltage (V)
Temperature (oC)
0
-50
14
40
20
40
20
Typ.
Typ.
0
-50
0
-25
0
25
50
75
100
Temperature ( C)
o
Figure 5A. Turn-On Rise Tim e
vs.Tem perature
125
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 5B. Turn-On Rise Tim e
vs. Supply Voltage
9
IRS21853SPBF
60
Turn-Off Fall Time (ns)
Turn-Off Fall Time (ns)
60
40
20
Typ.
0
-50
-25
0
25
50
75
100
40
20
Typ.
0
125
10
12
Temperature (oC)
6
6
5
5
4
Mi n.
20
3
Min.
1
1
-50
-25
0
25
50
75
100
10
125
12
16
18
20
Figure 7B. Logic "1" Input Voltage
vs. Supply Voltage
Figure 7A. Logic "1" Input Voltage
vs. Tem perature
4
3
3
Input Voltage (V)
4
2
Max.
0
-50
14
Vcc Supply Voltage (V)
Temperature (oC)
Input Voltage (V)
18
4
2
2
1
16
Figure 6B. Turn-Off Fall Tim e
vs. Supply Voltage
Input Voltage (V)
Input Voltage (V)
Figure 6A. Turn-Off Fall Tim e
vs. Tem perature
3
14
VBIAS Supply Voltage (V)
2
1
Max
0
-25
0
25
50
75
100
Temperature ( C)
o
Figure 8A. Logic "0" Input Voltage
vs. Tem perature
125
10
12
14
16
18
20
Vcc Supply Voltage (V)
Figure 8B. Logic "0" Input Voltage
vs. Supply Voltage
10
IRS21853SPBF
2.0
High Level Output Voltage (V)
High Level Output Voltage (V)
2.0
1.5
Max.
1.0
0.5
0.0
-50
1.5
Max.
1.0
0.5
0.0
-25
0
25
50
75
100
125
10
12
Temperature (oC)
18
20
Figure 9B. High Level Output
vs. Supply Voltage
0.20
Low Level Output Voltage (V)
0.20
Low Level Output Voltage (V)
16
Vcc Supply Voltage (V)
Figure 9A. High Level Output
vs. Tem perature
0.15
0.10
Max.
0.05
0.00
-50
-25
0
25
50
75
100
0.15
0.10
Max.
0.05
0.00
125
10
12
Temperature (oC)
Offset Supply Leakage Current (uA)
400
300
200
100
M ax.
-25
0
25
50
16
18
20
Figure 10B. Low Level Output
vs. Supply Voltage
500
0
-50
14
Vcc Supply Voltage (V)
Figure 10A. Low Level Output
vs.Tem perature
Offset Supply Leakage Current (uA)
14
75
100
125
Temperature (oC)
Figure 11A. Offset Supply Leakage Current
vs. Tem perature
500
400
300
200
100
Max.
0
0
100
200
300
400
500
600
VB Boost Voltage (V)
Figure 11B. Offset Supply Leakage
Current vs. Supply Voltage
11
IRS21853SPBF
400
VBS Supply Current (uA)
VBS Supply Current (uA)
400
300
200
100
Max.
300
200
Max.
100
Typ.
Typ.
0
-50
0
-25
0
25
50
75
100
10
125
12
Temperature (oC)
20
600
Vcc Supply Current (uA)
Vcc Supply Current (uA)
18
Figure 12B. V BS Supply Current
vs. Supply Voltage
600
400
Max.
200
Typ.
400
200
Max.
Typ.
0
-50
-25
0
25
50
75
100
125
0
10
Temperature ( C)
o
12
14
16
18
20
Vcc Supply Voltage (V)
Figure 13A. V cc Supply Current
vs. Tem perature
Figure 13B. V cc Supply Current
vs. Supply Voltage
60
60
Logic "1" Input Current (uA)
Logic "1" Input Current (uA)
16
VBS Supply Voltage (V)
Figure 12A. V BS Supply Current
vs. Tem perature
50
40
30
20
Max.
10
Typ.
0
-50
14
-25
50
40
30
20
Max.
10
Typ.
0
0
25
50
75
100
Temperature ( oC)
Figure 14A. Logic "1" Input Current
vs. Tem perature
125
10
12
14
16
18
20
Vcc Supply Voltage (V)
Figure 14B. Logic "1" Input Current
vs. Supply Voltage
12
IRS21853SPBF
10
Logic "0" Input Current (uA)
Logic "0" Input Current (uA)
10
8
6
Max.
4
2
0
-50
-25
0
25
50
75
100
8
6
Max.
4
2
0
125
10
12
14
Temperature ( C)
Figure 15A. Logic "0" Input Current
vs. Tem perature
20
12
Vcc UVLO Threshold (-) (V)
Vcc UVLO Threshold (+) (V)
18
Figure 15B. Logic "0" Input Current
vs. Supply Voltage
12
11
Max.
10
9
Typ.
8
Min.
7
6
-50
-25
0
25
50
75
100
11
10
Max
9
Typ.
8
Min.
7
6
-50
125
-25
0
Temperature (oC)
25
50
75
100
125
Temperature (oC)
Figure 17. V cc Undervoltage Threshold (-)
vs. Tem perature
Figure 16. V cc Undervoltage Threshold (+)
vs. Tem perature
12
VBS UVLO Threshold (-) (V)
12
VBS UVLO Threshold (+) (V)
16
Vcc Supply Voltage (V)
o
11
Max.
10
9
Typ.
8
Min.
7
6
-50
-25
0
25
50
75
100
Temperature (oC)
Figure 18. V BS Undervoltage Threshold (+)
vs. Tem perature
125
11
10
Max
9
Typ.
8
Min.
7
6
-50
-25
0
25
50
75
100
125
Temperature (oC)
Figure 19. V BS Undervoltage Threshold (-)
vs. Tem perature
13
IRS21853SPBF
8
Output Source Current (A)
Output Source Current (A)
8
6
4
Typ.
2
0
-50
6
4
2
Typ.
0
-25
0
25
50
75
100
125
10
12
16
18
20
VBIAS Supply Voltage (V)
Temperature (oC)
Figure 20B. Output Source Current
vs. Supply Voltage
Figure 20A. Output Source Current
vs. Tem perature
8
8
Output Sink Current (A)
Output Sink Current (A)
14
6
Typ.
4
2
0
-50
6
4
Typ.
2
0
-25
0
25
50
75
100
125
Temperature (oC)
10
12
14
16
18
20
VBIAS Supply Voltage (V)
Figure 21A. Output Sink Current
vs.Tem perature
Figure 21B. Output Sink Current
vs. Supply Voltage
Vs Offset Supply Voltage (V)
0
-2
Typ.
-4
-6
-8
-10
-12
10
12
14
16
18
20
VBS Floting Supply Voltage (V)
Figure 22. Maxim um V S Negative Offset
vs. Supply Voltage
14
IRS21853SPBF
NOTES:
1. DIMENSIONING & TOLERANCING PER ANSI Y14.5W-1982
2. CONTROLLING DIMENSION. MILLIMETER
3. DIMENSIONS ARE SHOWN IN MILLIMETER [INCHES]
4. OUTLINE CONFORMS TO JEDEC OUTLINE MS-012AC
5. DIMENSION IS THE LENGTH OF LEAD FOR SOLDERING TO A SUBSTRATE
6. DIMENSION DOES NOT INCLUDE MOLD PROTUSIONS. MOLD PROTUSIONS SHALL NOT EXCEED 0.15
[.006]
16-Lead SOIC (narrow body)
15
IRS21853SPBF
LOADED TAPE FEED DIRECTION
A
B
H
D
F
C
NOTE : CONTROLLING
DIM ENSION IN M M
E
G
CARRIER TAPE DIMENSION FOR
Metric
Code
Min
Max
A
7.90
8.10
B
3.90
4.10
C
15.70
16.30
D
7.40
7.60
E
6.40
6.60
F
10.20
10.40
G
1.50
n/a
H
1.50
1.60
16SOICN
Imperial
Min
Max
0.311
0.318
0.153
0.161
0.618
0.641
0.291
0.299
0.252
0.260
0.402
0.409
0.059
n/a
0.059
0.062
F
D
C
B
A
E
G
H
REEL DIMENSIONS FOR 16SOICN
Metric
Imperial
Code
Min
Max
Min
Max
A
329.60
330.25
12.976
13.001
B
20.95
21.45
0.824
0.844
C
12.80
13.20
0.503
0.519
D
1.95
2.45
0.767
0.096
E
98.00
102.00
3.858
4.015
F
n/a
22.40
n/a
0.881
G
18.50
21.10
0.728
0.830
H
16.40
18.40
0.645
0.724
16
IRS21853SPBF
ORDER INFORMATION
16-Lead SOIC IRS21853SPBF
16-Lead SOIC Tape & Reel IRS21853STRPBF
SO-16N package is MSL3 qualified.
This product has been designed and qualified for the industrial level.
Qualification standards can be found at IR’s Web Site http://www.irf.com/
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245 Tel: (310) 252-7105
Data and specifications subject to change without notice
06/28/2007
17