PMN28UN TrenchMOS™ ultra low level FET Rev. 01 — 27 September 2002 M3D302 Product data 1. Description N-channel enhancement mode field-effect transistor in a plastic package using TrenchMOS™ technology. Product availability: PMN28UN in SOT457 (TSOP6). 2. Features ■ ■ ■ ■ TrenchMOS™ technology Very fast switching Low threshold voltage Surface mount package. ■ ■ ■ ■ Battery powered motor control Load switch in notebook computers High speed switch in set top box power supplies Driver FET in DC to DC converters. 3. Applications 4. Pinning information Table 1: Pinning - SOT457 (TSOP6), simplified outline and symbol Pin Description 1,2,5,6 drain (d) 3 gate (g) 4 source (s) Simplified outline 6 5 Symbol d 4 g 1 Top view 2 3 MBK092 SOT457 (TSOP6) MBB076 s PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 5. Quick reference data Table 2: Quick reference data Symbol Parameter Conditions Typ Max Unit VDS drain-source voltage (DC) 25 °C ≤ Tj ≤ 150 °C - 12 V ID drain current (DC) Tsp = 25 °C; VGS = 4.5 V - 5.7 A Ptot total power dissipation Tsp = 25 °C - 1.75 W Tj junction temperature - 150 °C RDSon drain-source on-state resistance VGS = 4.5 V; ID = 2 A; Tj = 25 °C 28 34 mΩ VGS = 2.5 V; ID = 2 A; Tj = 25 °C 32 40 mΩ VGS = 1.8 V; ID = 1.5 A; Tj = 25 °C 39 56 mΩ 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit 25 °C ≤ Tj ≤ 150 °C - 12 V - ±8 V Tsp = 25 °C; VGS = 4.5 V; Figure 2 and 3 - 5.7 A Tsp = 70 °C; VGS = 4.5 V; Figure 2 - 4.5 A Tsp = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 - 22.9 A Tsp = 25 °C; Figure 1 - 1.75 W storage temperature −55 +150 °C junction temperature −55 +150 °C - 1.45 A VDS drain-source voltage (DC) VGS gate-source voltage (DC) ID drain current (DC) IDM peak drain current Ptot total power dissipation Tstg Tj Source-drain diode IS source (diode forward) current (DC) Tsp = 25 °C © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data Rev. 01 — 27 September 2002 2 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 03aa17 120 03aa25 120 Pder I der (%) (%) 80 80 40 40 0 0 0 50 100 200 150 0 50 100 150 Tsp (°C) P tot P der = ---------------------- × 100% P ° ID I der = ------------------- × 100% I ° tot ( 25 C ) D ( 25 C ) Fig 1. Normalized total power dissipation as a function of solder point temperature. Fig 2. Normalized continuous drain current as a function of solder point temperature. 03aj66 102 Limit RDSon = VDS / ID ID (A) 200 Tsp (°C) tp = 10 µs 100 µs 10 1 ms 10 ms 1 DC 100 ms 10-1 10-2 10-3 10-1 1 102 10 VDS (V) Tsp = 25 °C; IDM is single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data Rev. 01 — 27 September 2002 3 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 7. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit thermal resistance from junction to solder point mounted on a metal clad board; Figure 4 - Rth(j-sp) - 70 K/W 7.1 Transient thermal impedance 03aj56 102 Zth(j-sp) (K/W) δ = 0.5 0.2 10 0.1 0.05 0.02 1 δ= P tp T single pulse t tp T 10-1 10-4 10-3 10-2 10-1 1 10 tp (s) 102 Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data Rev. 01 — 27 September 2002 4 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 8. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit ID = 250 µA; VGS = 0 V 12 - - V 0.4 0.7 - V Tj = 25 °C - 0.01 1.0 µA Tj = 55 °C - - 10 µA Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS IDSS drain-source leakage current VDS = 10 V; VGS = 0 V IGSS gate-source leakage current VGS = ±8 V; VDS = 0 V - 10 100 nA RDSon drain-source on-state resistance VGS = 4.5 V; ID = 2 A; Figure 7 and 8 - 28 34 mΩ VGS = 2.5 V; ID = 2 A; Figure 7 and 8 - 32 40 mΩ VGS = 1.8 V; ID = 1.5 A; Figure 7 and 8 - 39 56 mΩ VDD = 6 V; VGS = 4.5 V; ID = 3.8 A; Figure 13 - 10.1 - nC Dynamic characteristics Qg(tot) total gate charge Qgs gate-source charge - 1.8 - nC Qgd gate-drain (Miller) charge - 2.1 - nC Ciss input capacitance - 740 - pF Coss output capacitance - 185 - pF Crss reverse transfer capacitance - 125 - pF td(on) turn-on delay time - 8 - ns VGS = 0 V; VDS = 10 V; f = 1 MHz; Figure 11 VDD = 6 V; RD = 5.6 Ω; VGS = 4.5 V; RG = 6 Ω tr rise time - 15 - ns td(off) turn-off delay time - 53 - ns tf fall time - 14 - ns - 0.8 1.2 V Source-drain diode VSD source-drain (diode forward) voltage IS = 1.7 A; VGS = 0 V; Figure 12 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data Rev. 01 — 27 September 2002 5 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 03aj58 20 ID (A) 03aj60 20 4.5 V 2.5 V 2V VDS > ID x RDSon ID (A) 15 15 1.8 V 10 10 1.6 V 5 5 1.4 V 25 °C Tj = 150 °C VGS = 1.2 V 0 0 0 0.2 0.4 0.6 0.8 1 VDS (V) Tj = 25 °C 0 VGS (V) 3 Fig 6. Transfer characteristics: drain current as a function of gate-source voltage; typical values. 03aj59 60 Tj = 25 °C 2 Tj = 25 °C and 150 °C; VDS > ID x RDSon Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. RDSon 1 1.6 V 03af18 2 2V VGS = 1.8 V a (mΩ) 1.5 40 2.5 V 1 4.5 V 20 0.5 0 0 0 5 10 15 ID (A) 20 Tj = 25 °C -60 60 120 Tj (°C) 180 R DSon a = --------------------------R DSon ( 25 °C ) Fig 7. Drain-source on-state resistance as a function of drain current; typical values. Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data 0 Rev. 01 — 27 September 2002 6 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 03aj65 1 03aj64 10-3 VGS(th) ID (A) (V) 0.8 typ 10-4 0.6 min typ min 0.4 10-5 0.2 10-6 0 -60 0 60 120 Tj (°C) 0 180 0.2 0.4 0.6 0.8 1 VGS (V) Tj = 25 °C; VDS = 5 V ID = 1 mA; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03aj67 104 C (pF) 103 Ciss Coss Crss 102 10 10-1 1 10 VDS (V) 102 VGS = 0 V; f = 1 MHz Fig 11. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data Rev. 01 — 27 September 2002 7 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 03aj61 20 VGS = 0 V IS (A) 03aj68 5 VGS ID = 3.8 A (V) 4 Tj = 25 °C 15 VDD = 6 V 3 10 2 150 °C Tj = 25 °C 5 1 0 0 0 0.5 1 VSD (V) 1.5 Tj = 25 ° and 150 °C; VGS = 0 V 0 8 QG (nC) 12 ID = 3.8 A; VDD = 6 V Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. Fig 13. Gate-source voltage as a function of gate charge; typical values. © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data 4 Rev. 01 — 27 September 2002 8 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 9. Package outline Plastic surface mounted package; 6 leads SOT457 D E B y A HE 6 X v M A 4 5 Q pin 1 index A A1 c 1 2 3 Lp bp e w M B detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.1 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION SOT457 REFERENCES IEC JEDEC EIAJ SC-74 EUROPEAN PROJECTION ISSUE DATE 97-02-28 01-05-04 Fig 14. SOT457 (TSOP6). © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data Rev. 01 — 27 September 2002 9 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 10. Revision history Table 6: Revision history Rev Date 01 20020927 CPCN Description - Product data (9397 750 10191) © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Product data Rev. 01 — 27 September 2002 10 of 12 PMN28UN Philips Semiconductors TrenchMOS™ ultra low level FET 11. Data sheet status Data sheet status[1] Product status[2] Definition Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. [1] [2] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 12. Definitions 13. Disclaimers Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 14. Trademarks TrenchMOS — is a trademark of Koninklijke Philips Electronics. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: [email protected]. Product data Fax: +31 40 27 24825 © Koninklijke Philips Electronics N.V. 2002. All rights reserved. 9397 750 10191 Rev. 01 — 27 September 2002 11 of 12 Philips Semiconductors PMN28UN TrenchMOS™ ultra low level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 14 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 © Koninklijke Philips Electronics N.V. 2002. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 27 September 2002 Document order number: 9397 750 10191