PMV65XP P-channel TrenchMOS™ extremely low level FET Rev. 01 — 28 September 2004 Product data sheet 1. Product profile 1.1 General description P-channel enhancement mode field effect transistor in a plastic package using TrenchMOS™ technology. 1.2 Features ■ Low threshold voltage ■ Low on-state resistance. 1.3 Applications ■ Low power DC-to-DC converters ■ Load switching ■ Battery management ■ Battery powered portable equipment. 1.4 Quick reference data ■ VDS ≤ −20 V ■ RDSon ≤ 76 mΩ ■ ID ≤ −3.9 A ■ Qgd = 0.65 nC (typ). 2. Pinning information Table 1: Discrete pinning Pin Description 1 gate (g) 2 source (s) 3 drain (d) Simplified outline Symbol d 3 g 1 2 SOT23 s 003aaa671 SOT23 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 3. Ordering information Table 2: Ordering information Type number PMV65XP Package Name Description Version SOT23 Plastic surface mounted package; 3 leads SOT23 4. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage (DC) 25 °C ≤ Tj ≤ 150 °C - −20 V VDGR drain-gate voltage (DC) 25 °C ≤ Tj ≤ 150 °C; RGS = 20 kΩ - −20 V VGS gate-source voltage (DC) - ±12 V ID drain current (DC) Tsp = 25 °C; VGS = −4.5 V; Figure 2 and 3 - −3.9 A Tsp = 100 °C; VGS = −4.5 V; Figure 2 - −2.5 A IDM peak drain current Tsp = 25 °C; pulsed; tp ≤ 10 µs; Figure 3 - −15.9 A Ptot total power dissipation Tsp = 25 °C; Figure 1 - 1.92 W Tstg storage temperature −55 +150 °C Tj junction temperature −55 +150 °C Source-drain diode IS source (diode forward) current (DC) Tsp = 25 °C - −1.6 A ISM peak source (diode forward) current Tsp = 25 °C; pulsed; tp ≤ 10 µs - −6.4 A 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 2 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 03aa17 120 03aa25 120 Ider (%) Pder (%) 80 80 40 40 0 0 0 50 100 150 Tsp (°C) 200 0 P tot P der = ----------------------- × 100% P ° 50 100 150 Tsp (°C) 200 ID I der = ------------------- × 100% I ° tot ( 25 C ) D ( 25 C ) Fig 1. Normalized total power dissipation as a function of solder point temperature. Fig 2. Normalized continuous drain current as a function of solder point temperature. 03ar44 102 -ID (A) Limit RDSon = -VDS / -ID tp = 10 µ s 10 100 µ s 1 ms 1 10 ms DC 100 ms 10-1 10-2 10-1 1 10 -VDS (V) 102 Tsp = 25 °C; IDM is single pulse; VGS = −4.5 V Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 3 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 5. Thermal characteristics Table 4: Thermal characteristics Symbol Parameter thermal resistance from junction to solder point Rth(j-sp) Conditions Min Typ Max Unit Figure 4 - - 65 K/W 5.1 Transient thermal impedance 03ar45 102 Zth(j-sp) (K/W) 10 δ = 0.5 0.2 0.1 0.05 0.02 1 δ= P single pulse t tp 10-1 10-5 tp T T 10-4 10-3 10-2 10-1 1 tp (s) 10 Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration. 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 4 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 6. Characteristics Table 5: Characteristics Tj = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit Tj = 25 °C −20 - - V Tj = −55 °C −18 - - V Tj = 25 °C −0.55 −0.75 −0.95 V Tj = 150 °C −0.35 - - V Tj = −55 °C - - −1.1 V Tj = 25 °C - - −1 µA Tj = 150 °C - - −100 µA - −10 −100 nA Tj = 25 °C - 65 76 mΩ Tj = 150 °C - 104 122 mΩ VGS = −2.5 V; ID = −2.3 A; Figure 6 and 8 - 90 112 mΩ ID = −2.8 A; VDS = −6 V; VGS = −4.5 V; Figure 11 - 7.6 - nC - 1.6 - nC Static characteristics V(BR)DSS drain-source breakdown voltage ID = −250 µA; VGS = 0 V VGS(th) IDSS gate-source threshold voltage drain-source leakage current ID = −1 mA; VDS = VGS; Figure 9 and 10 VDS = −20 V; VGS = 0 V VGS = ±12 V; VDS = 0 V IGSS gate-source leakage current RDSon drain-source on-state resistance VGS = −4.5 V; ID = −2.8 A; Figure 6 and 8 Dynamic characteristics Qg(tot) total gate charge Qgs gate-source charge Qgd gate-drain (Miller) charge - 0.65 - nC Vplat plateau voltage - −1.5 - V - 725 - pF - 105 - pF - 80 - pF - 7 - ns Ciss input capacitance Coss output capacitance Crss reverse transfer capacitance td(on) turn-on delay time VGS = 0 V; VDS = −20 V; f = 1 MHz; Figure 13 VDS = −6 V; RL = 6 Ω; VGS = −4.5 V; RG = 6 Ω tr rise time - 21 - ns td(off) turn-off delay time - 68 - ns tf fall time - 33 - ns - −0.77 −1.2 V Source-drain diode VSD source-drain (diode forward) voltage IS = −1.25 A; VGS = 0 V; Figure 12 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 5 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 03ar46 20 -4.5 V -ID (A) 03ar47 200 RDSon (mΩ) -3.5 V -3 V 160 VGS = -2.5 V 15 -2.5 V 120 -3 V 10 -3.5 V 80 -2 V -4.5 V -1.8 V 5 40 -1.6 V VGS = -1.4 V 0 0 0 0.5 1 1.5 -VDS (V) 2 0 Tj = 25 °C 5 10 15 -ID (A) 20 Tj = 25 °C Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function of drain current; typical values. 03ar48 20 03aq10 2 -ID (A) a 15 1.5 10 1 5 0.5 Tj = 150 °C 25 °C 0 0 1 2 3 -VGS (V) 4 Tj = 25 °C and 150 °C; VDS > ID x RDSon 0 -60 60 120 Tj (°C) 180 R DSon a = ---------------------------R DSon ( 25 °C ) Fig 7. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. 9397 750 13993 Product data sheet 0 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 6 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 03ar95 1.2 -VGS(th) (V) -ID (A) max 0.8 03ar96 10-3 10-4 typ min min max 10-5 0.4 0 -60 typ 10-6 0 60 120 Tj (°C) 180 0 ID = −1 mA; VDS = VGS 0.2 0.4 0.6 0.8 1 -VGS (V) Tj = 25 °C; VDS = −5 V Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 03ar51 5 -VGS (V) 4 3 2 1 0 0 2 4 6 8 10 QG (nC) ID = −2.8 A; VDS = −6 V Fig 11. Gate-source voltage as a function of gate charge; typical values. 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 7 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 03ar50 10 03ar49 103 -IS (A) Ciss C (pF) 8 6 Coss 102 Crss 4 150 °C 2 Tj = 25 °C 0 0 0.3 0.6 0.9 -VSD (V) 1.2 Tj = 25 °C and 150 °C; VGS = 0 V 10 10-1 10 -VDS (V) 102 VGS = 0 V; f = 1 MHz Fig 12. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values. Fig 13. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. 9397 750 13993 Product data sheet 1 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 8 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 7. Package outline Plastic surface mounted package; 3 leads SOT23 D E B A X HE v M A 3 Q A A1 1 2 e1 bp c w M B Lp e detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max. bp c D E e e1 HE Lp Q v w mm 1.1 0.9 0.1 0.48 0.38 0.15 0.09 3.0 2.8 1.4 1.2 1.9 0.95 2.5 2.1 0.45 0.15 0.55 0.45 0.2 0.1 OUTLINE VERSION REFERENCES IEC SOT23 JEDEC EIAJ TO-236AB EUROPEAN PROJECTION ISSUE DATE 97-02-28 99-09-13 Fig 14. SOT23 package outline. 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 9 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 8. Revision history Table 6: Revision history Document ID Release date Data sheet Change status notice PMV65XP_1 20040928 Product data sheet - Doc. number Supersedes 9397 750 13993 - 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 10 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 9. Data sheet status Level Data sheet status [1] Product status [2] [3] Definition I Objective data Development This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). [1] Please consult the most recently issued data sheet before initiating or completing a design. [2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. [3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. 10. Definitions customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Right to make changes — Philips Semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in full production (status ‘Production’), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 12. Trademarks TrenchMOS — is a trademark of Koninklijke Philips Electronics N.V. 11. Disclaimers Life support — These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors 13. Contact information For additional information, please visit: http://www.semiconductors.philips.com For sales office addresses, send an email to: [email protected] 9397 750 13993 Product data sheet © Koninklijke Philips Electronics N.V. 2004. All rights reserved. Rev. 01 — 28 September 2004 11 of 12 PMV65XP Philips Semiconductors P-channel TrenchMOS™ extremely low level FET 14. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 5.1 6 7 8 9 10 11 12 13 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information . . . . . . . . . . . . . . . . . . . . 11 © Koninklijke Philips Electronics N.V. 2004 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 28 September 2004 Document number: 9397 750 13993 Published in The Netherlands