PHILIPS SAA5254

INTEGRATED CIRCUITS
DATA SHEET
SAA5254
Integrated VIP and teletext decoder
(IVT1.1X)
Preliminary specification
Supersedes data of July 1993
File under Integrated Circuits, IC02
1996 Nov 07
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
FEATURES
• Complete teletext decoder including page memory and
FASTEXT links in a 40-pin DIP package
• Automatic processing of extension packet 26 for widest
possible language decoding. All our standard language
options can be available, and language option is
readable via I2C-bus
DESCRIPTION
• 100% hardware compatible with the SAA5244A; plug-in
replacement and extra market
The Integrated VIP and Teletext decoder (IVT1.1X) is
designed to decode 625-line based World System Teletext
transmissions. This single-chip teletext decoder hardware
is based on the SAA5244A with which it is completely
compatible.
• 100% hardware compatible with the SAA5244A, except
if the special OSD symbols were used with the
SAA5244A, except ROM identification number
• The device is pin-aligned with the other members of the
new Philips teletext decoder family, i.e. SAA5280 and
the SAA5249, making one hardware solution for the full
range
Like the SAA5244A the device contains all the hardware
necessary to decode the teletext, but the SAA5254 also
contains extra hardware to process the extension packet
26 characters automatically, extending the markets to
which the TV chassis can be shipped and opening the
possibility of many more language options.
• Low software overhead for the control microprocessor
• Single page acquisition system
• RGB interface to standard colour decoder ICs, push-pull
output drive
• Separate text and video signal quality detectors.
ORDERING INFORMATION
PACKAGE
TYPE
NUMBER
NAME
SAA5254P
DIP40
DESCRIPTION
VERSION
SOT129-1
plastic dual in-line package; 40 leads (600 mil)
QUICK REFERENCE DATA
SYMBOL
PARAMETER
MIN.
TYP.
MAX.
UNIT
VDD
supply voltage
4.5
5.0
5.5
V
IDD
supply current
−
90
120
mA
Vsync
sync voltage amplitude
0.1
0.3
0.6
V
Vvideo
video voltage amplitude
0.7
1.0
1.4
V
fXTAL
crystal frequency
−
27
−
MHz
Tamb
operating ambient temperature
−20
−
+70
°C
1996 Nov 07
2
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
BLOCK DIAGRAM
Y
BLAN
23
COR RGBREF
19
21
RGB
18
ODD/EVEN
15 to 17 22
DISPLAY
HAMMING
CHECKER
AND
PACKET 26
PROCESSING
ENGINE
PAGE
MEMORY
DATA
SLICER
AND
CLOCK
REGENERATOR
TELETEXT
ACQUISITION
AND
DECODING
25
I 2 C-BUS
INTERFACE
24
SDA
SCL
DCVBS
VSS1
REF
OSCOUT
OSCIN
5
VDD1
10
VDD2
14
VSS2
20
VSS3
SAA5254
ANALOG
TO
DIGITAL
CONVERTER
TIMING
CHAIN
CRYSTAL
OSCILLATOR
INPUT
CLAMP
AND SYNC
SEPARATOR
6
2
3
4
7
OSCGND
9
8
DISPLAY
CLOCK
PHASE
LOCKED
LOOP
11
BLACK IREF CVBS POL
Fig.1 Block diagram; SOT129 (DIP40).
1996 Nov 07
1
3
13
12
VCR/FFB STTV/LFB
MLB207
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
PINNING
SYMBOL
PIN
DESCRIPTION
VDD1
1
+5 V supply 1
OSCOUT
2
27 MHz crystal oscillator output
OSCIN
3
27 MHz crystal oscillator input
OSCGND
4
0 V crystal oscillator ground
VSS1
5
0 V ground 1
REF+
6
Positive reference voltage for the ADC. This pin should be connected to +5 V.
BLACK
7
Video black level storage pin, connected to ground via a 100 nF capacitor.
CVBS
8
Composite video input pin. A positive-going 1 V (peak-to-peak) input is required,
connected via a 100 nF capacitor.
IREF
9
Reference current input pin, connected to ground via a 27 kΩ resistor.
VDD2
10
+5 V supply 2
POL
11
STTV/LFB/FFB polarity selection pin
STTV/LFB
12
Sync to TV output pin/line flyback input pin. Function controlled by an internal register bit
(scan sync mode).
VCR/FFB
13
PLL time constant switch/field flyback input pin. Function controlled by an internal register
bit (scan sync mode).
VSS2
14
0 V ground 2
R
15
Dot rate character output of the RED colour information.
G
16
Dot rate character output of the GREEN colour information.
B
17
Dot rate character output of the BLUE colour information.
RGBREF
18
DC input voltage to define the output high level on the RGB pins.
BLAN
19
Dot rate fast blanking output.
VSS3
20
0 V ground 3
COR
21
Programmable active LOW output to provide contrast reduction of the TV picture for mixed
text and picture displays or when viewing newsflash/subtitle pages; open drain output.
ODD/EVEN
22
25 Hz output synchronized with the CVBS inputs field sync pulses to produce a
non-interlaced display by adjustment of the vertical deflection currents.
Y
23
Dot rate character output of teletext foreground colour information; open drain output.
SCL
24
Serial clock input for the I2C-bus. It can still be driven during power-down of the device.
SDA
25
Serial input/output data port for the I2C-bus; open drain output. It can still be driven during
power-down of the device.
i.c.
1996 Nov 07
26 to 40
Internally connected. Must be left open-circuit in application.
4
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
VDD1
1
40
OSCOUT
2
39
OSCIN
3
38
OSCGND
4
37
VSS1
5
36
REF
6
35
BLACK
7
34
CVBS
8
33
IREF
9
32
VDD2 10
SAA5254
i.c.
31
SAA5254
POL 11
30
STTV/LFB 12
29
VCR/FFB 13
28
VSS2 14
27
R 15
26
G 16
25 SDA
B 17
24 SCL
RGBREF 18
23 Y
BLAN 19
22 ODD/EVEN
VSS3 20
21 COR
MLB208
Fig.2 Pin configuration; SOT129 (DIP40).
1996 Nov 07
5
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
QUALITY AND RELIABILITY
This device will meet Philips Semiconductors General Quality Specification for Business group “Consumer Integrated
Circuits SNW-FQ-611-Part E”. The principal requirements are shown in Tables 1 to 4.
Group A
Table 1 Acceptance tests per lot
TEST
CONDITIONS
REQUIREMENTS(1)
Mechanical
cumulative target < 100 ppm
Electrical
cumulative target < 100 ppm
Group B
Table 2 Processability tests (by package family)
TEST
CONDITIONS
REQUIREMENTS(1)
Solderability
< 7% LTPD
Mechanical
< 15% LTPD
Solder heat resistance
< 15% LTPD
Group C
Table 3 Reliability tests (by process family)
TEST
CONDITIONS
REQUIREMENTS(1)
Operational life
168 hours at Tj = 150 °C
< 1500 FPM; equivalent to
< 100 FITS at Tj = 70 °C
Humidity life
temperature, humidity, bias
(1000 hours, 85 °C, 85% RH or
equivalent test)
< 2000 FPM
Temperature cycling performance
Tstg(min) to Tstg(max)
< 2000 FPM
Table 4 Reliability tests (by device type)
TEST
ESD and latch-up
CONDITIONS
ESD Human body model
2000 V, 100 pF, 1.5 kΩ
< 15% LTPD
ESD Machine model
200 V, 100 pF, 1.5 kΩ
< 15% LTPD
latch-up 100 mA, 1.5 × VDD
(absolute maximum)
< 15% LTPD
Notes to Tables 1 to 4
1. ppm = fraction of defective devices, in parts per million.
LTPD = Lot Tolerance Percent Defective.
FPM = fraction of devices failing at test condition, in Failures Per Million.
FITS = Failures In Time Standard.
1996 Nov 07
REQUIREMENTS(1)
6
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
MIN.
MAX.
UNIT
VDD
supply voltage (all supplies)
−0.3
+6.5
V
VI
input voltage (any input)
−0.3
VDD + 0.5
V
VO
output voltage (any output)
−0.3
VDD + 0.5
V
IO
output current (each output)
−10
+10
mA
IIOK
DC input or output diode current
−20
+20
mA
Tamb
operating ambient temperature
−20
+70
°C
CHARACTERISTICS
VDD = 5 V ± 10%; Tamb = −20 to +70 °C, unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Supply
VDD
supply voltage
4.5
5.0
5.5
V
IDD(tot)
total supply current
−
90
120
mA
Vsync
sync voltage amplitude
0.1
0.3
0.6
V
td(sync)
delay from CVBS to TCS output from
STTV buffer (nominal video, average
of leading/trailing edge)
−150
0
+150
ns
∆td(sync)
change in sync delay between all
black and all white video input at
nominal levels
0
−
25
ns
Vvideo(p-p)
video input voltage amplitude
(peak-to-peak value)
0.7
1.0
1.4
V
PLLcatch
display PLL catching range
±7
−
−
%
Zsource
source impedance
−
−
250
Ω
Ci
input capacitance
−
−
10
pF
resistance to ground
−
27
−
kΩ
V
Inputs
CVBS
IREF
RGND
POL
VIL
LOW level input voltage
−0.3
−
+0.8
VIH
HIGH level input voltage
2.0
−
VDD + 0.5 V
ILI
input leakage current
−10
−
+10
µA
Ci
input capacitance
−
−
10
pF
1996 Nov 07
VI = 0 to VDD
7
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SYMBOL
PARAMETER
SAA5254
CONDITIONS
MIN.
TYP.
MAX.
UNIT
LBF
VIL
LOW level input voltage
−0.3
−
+0.8
VIH
HIGH level input voltage
2.0
−
VDD + 0.5 V
ILI
input leakage current
VI = 0 to VDD
−10
−
+10
µA
II
input current
note 1
−1
−
+1
mA
td(LFB)
delay between LFB front edge and
input video line sync
−
250
−
ns
VIL
LOW level input voltage
−0.3
−
+0.8
V
VIH
HIGH level input voltage
2.0
−
VDD + 0.5 V
ILI
input leakage current
VI = 0 to VDD
−10
−
+10
µA
II
input current
note 1
−1
−
+1
mA
−0.3
−
VDD + 0.5 V
−10
−
+10
µA
V
VCR/FFB
RGBREF (note 2)
VI
input voltage
ILI
input leakage current
IDC
DC current
−
−
10
mA
VIL
LOW level input voltage
−0.3
−
+1.5
V
VIH
HIGH level input voltage
3.0
−
VDD + 0.5 V
ILI
input leakage current
−10
−
+10
µA
fSCL
clock frequency
0
−
100
kHz
ti(r)
input rise time
10% to 90%
−
−
2
µs
ti(f)
input fall time
90% to 10%
−
−
2
µs
Ci
input capacitance
−
−
10
pF
−
27
−
MHz
3.5
−
−
1.5
−
−
mA/V
VI = 0 to VDD
SCL
VI = 0 to VDD
Inputs/outputs
CRYSTAL OSCILLATOR (OSCIN; OSCOUT)
fXTAL
crystal frequency
Gv
small signal voltage gain
Gm
mutual conductance
Ci
input capacitance
−
−
10
pF
CFB
feedback capacitance
−
−
5
pF
Cblack
storage capacitor to ground
−
100
−
nF
ILI
input leakage current
−10
−
+10
µA
f = 100 kHz
BLACK
1996 Nov 07
VI = 0 to VDD
8
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SYMBOL
PARAMETER
SAA5254
CONDITIONS
MIN.
TYP.
MAX.
UNIT
SDA
VIL
LOW level input voltage
−0.3
−
+1.5
VIH
HIGH level input voltage
3.0
−
VDD + 0.5 V
ILI
input leakage current
−10
−
+10
µA
Ci
input capacitance
−
−
10
pF
ti(r)
input rise time
10% to 90%
−
−
2
µs
ti(f)
input fall time
90% to 10%
−
−
2
µs
VOL
LOW level output voltage
IOL = 3 mA
0
−
0.5
V
to(f)
output fall time
3 to 1 V
−
−
200
ns
CL
load capacitance
−
−
400
pF
GSTTV
gain of STTV relative to video input
0.9
1.0
1.1
VTCS
TCS voltage amplitude
0.2
0.3
0.45
V
VDCshift
DC voltage shift between TCS output
and nominal video output
−
−
0.15
V
IO
output drive current
−
−
3.0
mA
CL
load capacitance
−
−
100
pF
0.2
VI = 0 to VDD
V
Outputs
STTV
R, G AND B
VOL
LOW level output voltage
IOL = 2 mA
0
−
VOH
HIGH level output voltage
IOH = −1.6 mA;
RGBREF ≤ VDD − 2 V
RGBREF
−0.25 V
RGBREF RGBREF
+0.25 V
V
Zo
output impedance
−
−
200
Ω
V
CL
load capacitance
−
−
50
pF
IDC
DC current
−
−
−3.3
mA
to(r)
output rise time
10% to 90%
−
−
20
ns
to(f)
output fall time
90% to 10%
−
−
20
ns
VOL
LOW level output voltage
IOL = 1.6 mA
0
−
0.4
V
VOH
HIGH level output voltage
IOH = −0.2 mA;
VDD = 4.5 V
1.1
−
−
V
IOH = 0 mA; VDD = 5.5 V −
−
2.8
V
−
−
VDD
V
BLAN
VO(max)
allowed output voltage at pin
CL
load capacitance
−
−
50
pF
to(r)
output rise time
10% to 90%
−
−
20
ns
to(f)
output fall time
90% to 10%
−
−
20
ns
1996 Nov 07
with external pull-up
9
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SYMBOL
PARAMETER
SAA5254
CONDITIONS
MIN.
TYP.
MAX.
UNIT
ODD/EVEN
VOL
LOW level output voltage
IOL = 1.6 mA
0
−
0.4
V
VOH
HIGH level output voltage
IOH = −1.6 mA
VDD − 0.4
−
VDD
V
CL
load capacitance
−
−
120
pF
to(r)
output rise time
0.6 to 2.2 V
−
−
50
ns
to(f)
output fall time
2.2 to 0.6 V
−
−
50
ns
−
−
VDD
V
0
−
1.0
V
−
−
25
pF
COR AND Y (OPEN DRAIN)
Vpu
pull-up voltage at pin
VOL
LOW level output voltage
CL
load capacitance
to(f)
output fall time
load resistor of
1.2 kΩ to VDD;
measured between
VDD − 0.5 and 1.5 V
−
−
50
ns
ILO
output leakage current
VI = 0 to VDD
−10
−
+10
µA
Tskew
skew delay between display outputs
R, G, B, COR, Y and BLAN
−
−
20
ns
IOL = 5 mA
Timing
I2C-BUS
(see Fig.3)
tLOW
clock LOW period
4
−
−
µs
tHIGH
clock HIGH period
4
−
−
µs
tSU;DAT
data set-up time
250
−
−
ns
tHD;DAT
data hold time
170
−
−
ns
tSU;STO
set-up time from clock HIGH to
STOP
4
−
−
µs
tBUF
START set-up time following a STOP
4
−
−
µs
tHD;STA
START hold time
4
−
−
µs
tSU;STA
START set-up time following clock
LOW-to-HIGH transition
4
−
−
µs
Notes
1. This current is the maximum allowed into the inputs when line and field flyback signals are connected to these inputs.
Series current limiting resistors must be used to limit the input currents to ±1 mA.
2. RGBREF is the positive supply for the RGB output pins and it must be able to source the IOH current from the
R, G and B pins. The leakage specification on RGBREF only applies when there is no current load on the RGB pins.
1996 Nov 07
10
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
handbook, full pagewidth
SDA
t LOW
t BUF
tf
SCL
t HD;STA
tr
t HD;DAT
t HIGH
t SU;DAT
SDA
MBC764
t SU;STA
t SU;STO
Fig.3 I2C-bus timing.
TIMING CHAIN
handbook, full pagewidth
LSP
(TCS)
0
64 µs
4.66
40 µs
R, G, B, Y
(1)
display period
0
56.67 µs
16.67
(a)
lines 42 to 291 inclusive (and 355 to 604 inclusive interlaced)
R, G, B, Y
(1)
display period
0
312
291
line numbers
41
(b)
(1)
Also BLAN in character and box blanking.
Fig.4 Display output timing (a) line rate (b) field rate.
1996 Nov 07
11
MLA662 - 1
1996 Nov 07
12
0
0 2.33
308
309
621
(308)
309
310
622
(309)
310
311
623
(310)
311
312
624
(311)
312
313
625
(312)
1
314 (1)
1
27.33
Fig.5 Composite sync waveforms.
3
316 (3)
315 (2)
2
3
34.33
2
32
32
4
317 (4)
4
5
318 (5)
5
6
319 (6)
6
7
320 (7)
7
59.33
MLA037 - 2
64 µs
64 µs
64 µs
Integrated VIP and teletext decoder
(IVT1.1X)
LSP, EP and BP are combined to give TCS as shown. All timings are measured from falling edge of LSP.
Line numbers placed in the middle of the line.
Equivalent count numbers in brackets.
TCS is available on STTV/LFB pin.
TCS non-interlaced
TCS interlaced
TCS interlaced
BP
(Broad Pulse)
EP
(Equalizing Pulse)
LSP
(Line Sync Pulse)
4.66
handbook, full pagewidth
0
Philips Semiconductors
Preliminary specification
SAA5254
1996 Nov 07
13
310
311
2 µs
623
(310)
2 µs
312
624
(311)
625
(312)
313
31 µs
48 µs
2
3
315 (2)
31 µs
16 µs
314 (1)
316 (3)
SECOND FIELD START (ODD)
1
Fig.6 ODD/EVEN timing.
Line numbers placed in the middle of the line. Equivalent count numbers in brackets.
309
622
(309)
317 (4)
4
318 (5)
5
319 (6)
6
320 (7)
7
MBA073 - 4
Integrated VIP and teletext decoder
(IVT1.1X)
ODD/EVEN output
(slave sync mode)
ODD/EVEN output
(normal sync mode
when VCS to SCS
mode active)
ODD/EVEN output
(normal sync mode)
TCS interlaced
ODD/EVEN output
(slave sync mode)
ODD/EVEN output
(normal sync mode
when VCS to SCS
mode active)
ODD/EVEN output
(normal sync mode)
TCS interlaced
621
(308)
FIRST FIELD START (EVEN)
Philips Semiconductors
Preliminary specification
SAA5254
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
ON-CHIP MEMORY
SAA5254 page memory organization
The organization of the page memory is shown in Fig.7. The device provides an additional row as compared with first
generation decoders; this brings the display format up to 40 characters by 25 rows. Rows 0 to 23 form the teletext page;
Row 24 is available for software generated status messages and FLOF/FASTEXT prompt information.
7 characters
for status
7
fixed character
written by IVT hardware
alphanumerics white for normal
alphanumerics green when looking
for display page
8 characters
always rolling
(time)
24
8
1
24 characters from page header
rolling when display page looked for
MAIN PAGE DISPLAY AREA
14 bytes
free for use
by microcontroller
0
1
2
3
4
5
to
20
21
22
23
24
25
PACKET X / 22
PACKET X / 23
PACKET X / 24 STORED HERE IF R0D7 = 1
10
14
10 bytes for
received
page information
ROW
MBA274
Fig.7 Basic page memory organization.
REMARK TO Fig.7
Row 0
Row 0 is for the page header. The first seven columns
(0 to 6) are free for status messages. The eighth is an
alphanumeric white or green control character, written
automatically by the SAA5254 to give a green rolling
header when a page is being looked for. The last eight
characters are for rolling time.
ROW
PACKET X / 24 if R0D7 = 0
0
PACKET X / 27 / 0
1
PACKETS 8 / 30 / 0 to 15
2
MBA275 - 2
Row 25
The first 10 bytes of Row 25 contain control data relating
to the received page as shown in Table 5. The remaining
14 bytes are free for use by the microcontroller.
Fig.8 Organization of the extension memory.
1996 Nov 07
14
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
Table 5
SAA5254
Row 25 received control data format
ROW 25
D0
PU0
PT0
MU0
MT0
HU0
HT0
C7
C11
MAG0
0
D1
PU1
PT1
MU1
MT1
HU1
HT1
C8
C12
MAG1
0
D2
PU2
PT2
MU2
MT2
HU2
C5
C9
C13
MAG2
0
D3
PU3
PT3
MU3
C4
HU3
C6
C10
C14
0
0
D4
HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER HAM.ER FOUND
0
D5
0
0
0
0
0
0
0
0
0
PBLF
D6
0
0
0
0
0
0
0
0
0
0
D7
0
0
0
0
0
0
0
0
0
0
Column
0
1
2
3
4
5
6
7
8
9
Table 6
Page number and sub-code for Table 5
BIT NAME
Register maps
SAA5254 mode registers R0 to R11 are shown in Table 7.
R0 to R10 are WRITE only; R11 is READ/WRITE.
Register map (R3), for page requests, is shown in detail in
Table 9.
DESCRIPTION
Page number
MAG
magazine
PU
page units
PT
page tens
PBLF
page being looked for
FOUND
LOW for page has been found
HAM.ER
Hamming error in corresponding byte
Page sub-code
MU
minutes units
MT
minutes tens
HU
hours units
HT
hours tens
C4 to C14
transmitted control bits
1996 Nov 07
15
1996 Nov 07
5
6
7
9
10
11
11B 625/525
SYNC
Display control
(normal)
Display control
(newsflash /subtitle)
Display mode
16
Cursor row
Cursor column
Cursor data
Device status
D5
C5
A0
D4
C4
D3
C3
R3
−
DOUBLE
HEIGHT
TEXT OUT
TEXT OUT
−
PRD3
TB
DEW/ FULL
FIELD
DISPLAY
STATUS
ROW ONLY
D3
ROM VER R4 ROM VER R3 ROM VER R2 ROM VER
R1
D6
−
−
D7
CLEAR
MEMORY
−
R4
−
−
−
COR IN
COR IN
−
COR OUT
COR OUT
PRD4
−
BOTTOM
HALF
BKGND IN
BKGND IN
−
STATUS TOP CURSOR ON REVEAL ON
BKGND OUT
BKGND OUT
−
−
−
−
−
3
Page request data
−
−
−
DISABLE
HDR ROLL
D4
−
2
Page request
address
AUTO
ODD/EVEN
D5
ACQ ON/OFF DISABLT
PKT 26
FREE RUN
PLL
D6
VCS TO SCS 7 + P/ 8-BIT
1
X/24 POS
D7
Mode
No.
0
NAME
REGISTER
Register map (notes 1 to 5)
Advanced control
Table 7
ROM
VER R0
D2
C2
R2
−
BOX ON 24
TEXT IN
TEXT IN
−
PRD2
START
COLUMN
SC2
TCS ON
DISABLE
ODD/EVEN
D2
TEXT
SIGNAL
QUALITY
D1
C1
R1
−
BOX ON
1 to 23
PON OUT
PON OUT
−
PRD1
START
COLUMN
SC1
T1
−
D1
VCS
SIGNAL
QUALITY
D0
C0
R0
−
BOX ON 0
PON IN
PON IN
−
PRD0
START
COLUMN
SC0
T0
R11/R11B
SELECT
D0
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Notes to Table 7
1. The dash (−) indicates these bits are inactive and must be written to logic 0 for future compatibility.
2. All bits in Registers R0 to R13 are cleared to logic 0 on power-up except bits D0 and D1 of Registers R1, R5 and R6
which are set to logic 1.
3. All memory is cleared to space (00100000) on power-up, except Row 0 Column 7 Chapter 0, which is alpha white
(00000111) as the acquisition circuit is enabled but all pages are on hold.
4. TB must be set to logic 0 for normal operation.
5. The I2C-bus slave address is 00110001.
Table 8
Register description
REGISTER BIT D0 TO D7
FUNCTION
R0 AVANCED CONTROL - auto-increments to Register 1
R11/R11B SELECT
Selects reading of R11 if LOW or if HIGH R11B.
DISABLE ODD/EVEN
Forces ODD/EVEN output LOW when logic 1.
DISPLAY STATUS ROW
When SET = 1 and R1D6 = 1 open (8-bit mode) then all the text display is blanked
out apart from the status row, this allows the page memory to be used for
non-textural data, such as in the German TOP system.
DISABLE HDR ROLL
Disables green rolling header and time.
AUTO ODD/EVEN
When SET forces ODD/EVEN LOW if any TV picture displayed, if DISABLE
ODD/EVEN = 0
FREE RUN PLL
Will force the display PLL to free run in all conditions.
X/24 POS
Automatic display of FASTEXT prompt row when logic 1.
R1 MODE - auto-increments to Register 2
T0, T1
Interlace/non-interlace 312/313 line control (see Table 10).
TCS ON
Text composite sync or direct sync select (see Table 10 for FFB mode selection).
DEW/FULL FIELD
Field-flyback or full-channel mode.
ACQ ON/OFF
Acquisition circuits turned off when logic 1.
7 + P/8-BIT
7 bits with parity checking or 8-bit mode.
DISABLE PKT 26
Disable automatic processing of packet 26.
VCS TO SCS
When logic 1 enables display of messages with 60 Hz input signal.
R2 PAGE REQUEST ADDRESS - auto-increments to Register 3
START COLUMN SC0 to SC2
Point to start column for page request data (see Table 9).
TB
Must be logic 0 for normal operation.
R3 PAGE REQUEST DATA - does not auto-increment (see Table 9)
R5 NORMAL DISPLAY CONTROL - auto-increments to Register 6
R6 NEWSFLASH/SUBTITLE DISPLAY CONTROL - auto-increments to Register 7; note 1
PON
Picture on.
TEXT
Text on.
COR
Contrast reduction on.
BKGND
Background colour on.
1996 Nov 07
17
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
REGISTER BIT D0 TO D7
FUNCTION
R7 DISPLAY MODE - does not auto-increment
BOX ON 0
Boxing function allowed on Row 0.
BOX ON 1 to 23
Boxing function allowed on Rows1 to 23.
BOX ON 24
Boxing function allowed on Row 24.
DOUBLE HEIGHT
To display double height text.
BOTTOM HALF
To select bottom half of page when DOUBLE HEIGHT = 1.
REVEAL ON
To reveal concealed text.
CURSOR ON
To display cursor.
STATUS TOP
Row 25 displayed above or below the main text.
R9 CURSOR ROW - auto-increments to Register 10
R0 to R4
Active row for data written to or read from memory via the I2C-bus.
A0
Selects display memory page (when = 0) or extension memory (when = 1).
CLEAR MEM
When set to logic 1, clears the display memory. This bit is automatically reset.
R10 CURSOR COLUMN - auto-increments to Register 11 or 11B
C0 to C5
Active column for data written to or read from memory via the I2C-bus.
R11 CURSOR DATA - does not auto-increment
D0 to D7
Data read from/written to memory via I2C-bus, at location pointed to by R9 and
R10. This location automatically increments each time R11 is accessed.
R11B DEVICE STATUS - does not auto-increment
VCS SIGNAL QUALITY
Indicates that the video signal quality is good and PLL is phase-locked to input
video when logic 1.
TEXT SIGNAL QUALITY
If a good teletext signal is being received then logic 1.
ROM VER R0 to R4
Indicated language/ROM variant. For Western European = 11000.
625/525 SYNC
If the input video is a 525 line signal then logic 1.
Note
1. These functions have IN and OUT referring to inside and outside the boxing function respectively.
1996 Nov 07
18
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
Table 9
SAA5254
Register map for page requests (R3)
START COLUMN
PRD4
0
PRD3
PRD2
PRD1
PRD0
DO CARE
Magazine
1
HOLD
MAG2
MAG1
MAG0
PT3
PT2
PT1
PT0
PU3
PU2
PU1
PU0
X
X
HT1
HT0
HU3
HU2
HU1
HU0
X
MT2
MT1
MT0
MU3
MU2
MU1
MU0
DO CARE
Page tens
2
DO CARE
Page units
3
DO CARE
Hours tens
4
DO CARE
Hours units
5
DO CARE
Minutes tens
6
DO CARE
Minutes units
Notes to Table 9
1. Abbreviations are as for Table 5 except for DO CARE bits.
2. When the DO CARE bit is set to logic 1 this means the corresponding digit is to be taken into account for page
requests. If the DO CARE bit is set to logic 0 the digit is ignored. This allows, for example, normal or timed page
selection.
3. If HOLD is set LOW, the page is held and not updated.
4. Columns auto-increment on successive I2C-bus transmission bytes.
5. X = Don't care.
Table 10 Interlace/non-interlace 312/313 line control and ODD/EVEN field detection option
TCS ON
FFB MODE(1)
T1
T0
X
0
0
interlaced 312.5/312.5 lines
X
0
1
non-interlaced 312/313 lines (note 2)
X
1
0
non-interlaced 312/313 lines (note 2)
0
1
1
SCS (scan composite sync) mode: FFB leading edge in first broad pulse of field
1
1
1
SCS (scan composite sync) mode: FFB leading edge in second broad pulse of field
RESULT
Notes
1. X = don't care.
2. Reverts to interlaced mode if a newsflash or subtitle is being displayed.
1996 Nov 07
19
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
CLOCK SYSTEMS
Crystal oscillator
The crystal is a conventional 2-pin design operating at 27 MHz. It is capable of oscillating with both fundamental and third
overtone mode crystals. External components should be used to suppress the fundamental output of the third overtone,
as shown in Fig.9. The crystal characteristics are given in Table 11.
handbook, full pagewidth
VDD1
OSCOUT
SAA5254
1
2
15 pF 8.2 pF 100 nF
3.3 µH
OSCIN
27 MHz
3rd
overtone
OSCGND
1 nF
3.3 kΩ
CRYSTAL
OSCILLATOR
3
4
MGD702
Fig.9 Crystal oscillator application diagram.
Table 11 Crystal characteristics (see Fig.9)
SYMBOL
PARAMETER
TYP.
MAX.
UNIT
Crystal (27 MHz, 3rd overtone)
C1
series capacitance
1.7
−
pF
C0
parallel capacitance
5.2
−
pF
CL
load capacitance
20
−
pF
Ω
Rr
resonance resistance
−
50
R1
series resistance
20
−
Ω
10−6
Xa
ageing
−
±5 ×
Xj
adjustment tolerance
−
±25 × 10−6
Xd
drift
−
±25 × 10−6
1996 Nov 07
20
year−1
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
CHARACTER SETS
The WST specification allows the selection of national character sets via the page header transmission bits, C12 to C14.
The basic 96 character sets differ only in 13 national option characters as indicated in Tables 17, 18, 19 and 20 with
reference to their table position in the basic character matrix illustrated in Table 16. The SAA5254 automatically decodes
transmission bits C12 to C14. Tables 12, 13, 14 and 15 illustrates the character matrixes.
MLA663
handbook, full pagewidth
alphanumerics and
graphics 'space'
character
0000010
alphanumerics
character
1011010
alphanumerics or
blast-through
alphanumerics
character
0001001
alphanumerics
character
1111111
contiguous
graphics character
0110111
separated
graphics character
0110111
separated
graphics character
1111111
contiguous
graphics character
1111111
=
background
colour
Fig.10 Character format.
1996 Nov 07
21
display
= colour
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Table 12 SAA5254P/E character data input decoding, West European languages; notes 1 to 9
For character version number (11000) see Register 11B.
B pagewidth
b8
handbook, full
I
T
S
0
0
b7
0
b6
4
b
3
b
2
b
0
0
b5
b
0 or 1
0
1
column
r
o
w
0
1
0
1
graphics
black
0
0
0
0
0
0
0
0
1
1
alpha numerics
red
graphics
red
0
0
1
0
2
alpha numerics
green
graphics
green
0
0
1
1
3
alpha numerics
yellow
graphics
yellow
0
1
0
0
4
alpha numerics
blue
graphics
blue
0
1
0
1
5
alpha numerics
magenta
graphics
magenta
0
1
1
0
6
alpha numerics
cyan
graphics
cyan
0
1
1
1
7
alpha numerics
white
graphics
white
1
0
0
0
8
flash
conceal
display
1
0
0
1
9
steady
1
0
1
0
10
end box
separated
graphics
1
0
1
1
11
start box
ESC
1
1
0
0
12
normal
height
1
1
0
1
13
double
height
1
1
1
0
14
SO
1
1
1
1
15
SI
0
0
1
0
2
alpha numerics
black
0 or 1
0
1
0
0
1
1
2a
0
0
1
1
3
0
1
0
1
3a
0
0
0
4
5
1
1
1
6a
1
0
1
7
7a
1
0
0
1
0
6
1
0
1
1
0
0
8
1
1
0
1
9
1
1
0
0
12
1
1
1
1
1
13
1
0
14
1
15
(2)
(2)
(2)
contiguous
graphics
(2)
(1)
(2)
black
back ground
(2)
new
back ground
(1)
hold
graphics
(1)
(2)
release
graphics
MBA429
1996 Nov 07
22
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Table 13 SAA5254P/H character data input decoding, East European languages; notes 1 to 9
For character version number (11001) see Register 11B.
handbook, full
B pagewidth
b8
I
T
S
0
0
b7
0
b6
4
b
3
b
2
b
0
0
b5
b
0 or 1
0
0
0
1
column
r
o
w
1
0
1
graphics
black
0
0
0
0
0
0
0
1
1
alpha numerics
red
graphics
red
0
0
1
0
2
alpha numerics
green
graphics
green
0
0
1
1
3
alpha numerics
yellow
graphics
yellow
0
1
0
0
4
alpha numerics
blue
graphics
blue
0
1
0
1
5
alpha numerics
magenta
graphics
magenta
0
1
1
0
6
alpha numerics
cyan
graphics
cyan
0
1
1
1
7
alpha numerics
white
graphics
white
1
0
0
0
8
flash
conceal
display
1
0
0
1
9
steady
1
0
1
0
10
end box
separated
graphics
1
0
1
1
11
start box
ESC
1
1
0
0
12
normal
height
1
1
0
1
13
double
height
1
1
1
0
14
SO
1
1
1
1
15
SI
0
0
1
0
2
0
0 or 1
0
1
alpha numerics
black
0
1
0
2a
0
0
1
1
3
0
1
0
1
3a
0
0
0
4
5
1
1
1
6a
1
0
1
7
7a
1
0
0
1
0
6
1
0
1
1
0
0
8
1
1
0
1
9
1
1
0
0
12
1
1
1
1
1
13
1
0
14
1
15
(2)
(2)
(2)
contiguous
graphics
(2)
(1)
(2)
black
back ground
(2)
new
back ground
(1)
hold
graphics
(1)
(2)
release
graphics
MLA961
1996 Nov 07
23
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Table 14 SAA5254P/T character data input decoding, West European and Turkish languages; notes 1 to 9
For character version number (11010) see Register 11B.
handbook, full
b8
B pagewidth
I
T
S
0
0
b7
0
b6
0 or 1
0
0
0
b5
0
0
b 4 b 3 b2 b 1
column
r
o
w
1
0
1
graphics
black
0
0
0
0
0
0
0
1
1
alpha numerics
red
graphics
red
0
0
1
0
2
alpha numerics
green
graphics
green
0
0
1
1
3
alpha numerics
yellow
graphics
yellow
0
1
0
0
4
alpha numerics
blue
graphics
blue
0
1
0
1
5
alpha numerics
magenta
graphics
magenta
0
1
1
0
6
alpha numerics
cyan
graphics
cyan
0
1
1
1
7
alpha numerics
white
graphics
white
1
0
0
0
8
flash
conceal
display
1
0
0
1
9
steady
1
0
1
0
10
end box
separated
graphics
1
0
1
1
11
start box
ESC
1
1
0
0
12
normal
height
1
1
0
1
13
double
height
1
1
1
0
14
SO
1
1
1
1
15
SI
0
0
1
0
2
0
0 or 1
0
1
alpha numerics
black
0
1
1
2a
0
0
1
1
3
0
1
0
1
3a
0
0
0
4
5
1
1
1
6a
1
0
1
7
7a
1
0
0
1
0
6
1
0
1
1
0
0
8
1
1
0
1
9
1
1
0
0
12
1
1
1
1
1
13
1
0
14
1
15
(2)
(2)
(2)
contiguous
graphics
(2)
(1)
(2)
black
back ground
(2)
new
back ground
(1)
hold
graphics
(1)
(2)
release
graphics
MBA431
1996 Nov 07
24
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Table 15 SAA5254P/R character data input decoding, Baltic and Cyrillic languages; notes 1 to 9
For character version number (11101) see Register 11B.
B
I
T
S
b8
0
0
b7
0
b6
4
b
3
b
2
b
0
0
b5
b
0 or 1
0
0
0
1
column
r
o
w
1
1
0
0
0
0
alpha numerics
black
graphics
black
0
0
0
1
1
alpha numerics
red
graphics
red
0
0
1
0
2
alpha numerics
green
graphics
green
0
0
1
1
3
alpha numerics
yellow
graphics
yellow
0
1
0
0
4
alpha numerics
blue
graphics
blue
0
1
0
1
5
alpha numerics
magenta
graphics
magenta
handbook, full pagewidth
0 1 1 0
6
alpha numerics
cyan
graphics
cyan
0
0
1
0
2
0
0 or 1
0
1
0
0
1
1
2a
0
0
1
1
3
0
1
0
1
3a
0
1
0
0
4
6a
1
0
1
0
6
1
1
1
1
5
0
1
0
7a
8
1
1
0
0
1
7
1
0
0
1
9
1
1
0
0
12
1
1
1
1
1
13
1
0
14
1
15
(2)
0
1
1
1
7
alpha numerics
white
graphics
white
1
0
0
0
8
flash
conceal
display
1
0
0
1
9
steady
1
0
1
0
10
end box
separated
graphics
1
0
1
1
11
start box
TWIST
(2)
(2)
contiguous
graphics
(2)
(2)
1
1
0
0
12
normal
height
1
1
0
1
13
double
height
1
1
1
0
14
SO
1
1
1
1
15
SI
black
back ground
(2)
new
back ground
(1)
hold
graphics
(1)
(2)
release
graphics
MBA648 - 1
1996 Nov 07
25
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Notes to Tables 12, 13 14 and 15
1. These control characters are reserved for compatibility with other data codes.
2. These control characters are presumed before each row begins.
3. Control characters shown in Columns 0 and 1 are normally displayed as spaces.
4. Characters may be referred to by column and row (for example 2/5 refers to %).
5. Black represents displayed colour. White represents background.
6. The SAA5254 national option characters are illustrated in Tables 17, 18, 19 and 20.
7. Characters 8/6, 8/7, 9/5, 9/6 and 9/7 are special characters for combining with character 8/5 (E, H and T codes only).
8. National option characters will be displayed according to the setting of control bits C12 to C14. These will be mapped
into the basic code table into positions shown in Tables 17, 18, 19 and 20.
9. Columns 2a, 3a, 6a and 7a are displayed in graphics mode.
1996 Nov 07
26
1996 Nov 07
27
2/14
2/15
2/6
2/7
3/15
3/14
3/13
3/12
3/11
3/10
3/9
3/8
1. Where: NC = national option character position.
3/7
3/6
3/5
3/4
3/3
3/2
3/1
3/0
4/7
4/6
4/5
4/4
4/3
4/2
4/1
4/0
NC
4/15
4/14
4/13
4/12
4/11
4/10
4/9
4/8
5/7
5/6
5/5
5/4
5/3
5/2
5/1
5/0
NC
5/15
NC
5/14
NC
5/13
NC
5/12
NC
5/11
5/10
5/9
5/8
6/7
6/6
6/5
6/4
6/3
6/2
6/1
6/0
NC
6/15
6/13
6/12
6/11
6/10
6/9
6/8
7/7
7/6
7/5
7/4
7/3
7/2
7/1
7/0
7/15
MLA630
NC
7/14
NC
7/13
NC
7/12
NC
7/11
7/10
7/9
7/8
Integrated VIP and teletext decoder
(IVT1.1X)
Note to Table 16
2/13
2/5
NC
2/11
2/3
2/12
2/10
2/2
2/4
2/9
2/1
NC
2/8
2/0
Table 16 SAA5254 basic character matrix; note 1
Philips Semiconductors
Preliminary specification
SAA5254
full pagewidth
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Table 17 SAA5254P/E national option character set
handbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW)
LANGUAGE
C12 C13 C14 2 / 3
ENGLISH
0
0
0
GERMAN
0
0
1
SWEDISH
0
1
0
ITALIAN
0
1
1
FRENCH
1
0
0
SPANISH
1
0
1
2/4
4/0
5 / 11 5 / 12 5 / 13 5 / 14 5 / 15
6/0
7 / 11 7 / 12 7 / 13 7 / 14
MLB458
(1) PHCB are the Page Header Control Bits. Other combinations default to English.
Table 18 SAA5254P/H national option character set
handbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW)
LANGUAGE
C12 C13 C14 2 / 3
POLISH
0
0
0
GERMAN
0
0
1
SWEDISH
0
1
0
SERBO-CROAT
1
0
1
CZECHOSLOVAKIA
1
1
0
RUMANIAN
1
1
1
2/4
4/0
5 / 11 5 / 12 5 / 13 5 / 14 5 / 15
6/0
7 / 11 7 / 12 7 / 13 7 / 14
MLA966
(1) PHCB are the Page Header Control Bits. Other combinations default to German. Only the above characters change with the PHCB. All other
characters in the basic set are shown in Table 16.
1996 Nov 07
28
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Table 19 SAA5254P/T national option character set
andbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW)
LANGUAGE
C12 C13 C14 2 / 3
ENGLISH
0
0
0
GERMAN
0
0
1
TURKISH
1
1
0
ITALIAN
0
1
1
FRENCH
1
0
0
SPANISH
1
0
1
2/4
4/0
5 / 11 5 / 12 5 / 13 5 / 14 5 / 15
6/0
7 / 11 7 / 12 7 / 13 7 / 14
MBA430
(1) PHCB are the Page Header Control Bits. Other combinations default to English. Only the above characters change with the PHCB. All other
characters in the basic set are shown in Table 16.
1996 Nov 07
29
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
Table 20 SAA5254P/R national option character set
handbook, full pagewidth
PHCB
(1)
CHARACTER POSITION (COLUMN / ROW)
LANGUAGE
C12 C13 C14 2 / 3
ESTONIAN
0
1
0
LETTISH /
LITHUANIAN
0
1
1
RUSSIAN
1
0
0
2
2/4
4/0
3
4
5 / 11 5 / 12 5 / 13 5 / 14 5 / 15
5
6
7
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
MEA597
(1) PHCB are the Page Header Control Bits. Other combinations default to Estonian.
1996 Nov 07
30
6 / 0 7 / 11 7 / 12 7 / 13 7 / 14
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
APPLICATION INFORMATION
V DD1
40
1
39
OSCOUT
C4
1 nF
L1
3.3 µH
C3
C2
15 pF 8.2 pF 100 nF OSCIN
R1
3.3 kΩ
OSCGND
X1
27 MHz, 3rd Overtone
VSS1
V DD
VSS
100 nF
REF
BLACK
37
3
36
35
4
34
5
6
33
7
32
8
CVBS
VSS
38
31
100 nF
R17 27 k Ω
IREF
VDD2
9
SAA5254
30
10
POL
LK2
11
29
28
STTV/LFB
12
VCR/FFB
13
27
VSS2
14
25
R
15
G
16
B
17
VDDD
LK1
(1)
R9
R10
(1)
VSS
i.c.
C7 100 nF
VSS
C8
100 nF
2
C1
RGBREF
(1)
18
25
SDA
24
SCL
23
Y
BLAN
19
22
ODD/EVEN
VSS3
20
21
COR
2.7 kΩ
2.7 kΩ
MLB210
VDD
(1) Value dependent on application.
Fig.11 Application diagram; SOT129 (DIP40).
1996 Nov 07
31
VDD
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
PACKAGE OUTLINE
seating plane
DIP40: plastic dual in-line package; 40 leads (600 mil)
SOT129-1
ME
D
A2
L
A
A1
c
e
Z
w M
b1
(e 1)
b
MH
21
40
pin 1 index
E
1
20
0
5
10 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
UNIT
A
max.
A1
min.
A2
max.
b
b1
c
mm
4.7
0.51
4.0
1.70
1.14
0.53
0.38
0.36
0.23
52.50
51.50
inches
0.19
0.020
0.16
0.067
0.045
0.021
0.015
0.014
0.009
2.067
2.028
D
(1)
e
e1
L
ME
MH
w
Z (1)
max.
14.1
13.7
2.54
15.24
3.60
3.05
15.80
15.24
17.42
15.90
0.254
2.25
0.56
0.54
0.10
0.60
0.14
0.12
0.62
0.60
0.69
0.63
0.01
0.089
E
(1)
Note
1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.
REFERENCES
OUTLINE
VERSION
IEC
JEDEC
SOT129-1
051G08
MO-015AJ
1996 Nov 07
EIAJ
EUROPEAN
PROJECTION
ISSUE DATE
92-11-17
95-01-14
32
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (Tstg max). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.
SOLDERING
Introduction
There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.
Repairing soldered joints
Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our “IC Package Databook” (order code 9398 652 90011).
Soldering by dipping or by wave
The maximum permissible temperature of the solder is
260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.
1996 Nov 07
33
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
DEFINITIONS
Data sheet status
Objective specification
This data sheet contains target or goal specifications for product development.
Preliminary specification
This data sheet contains preliminary data; supplementary data may be published later.
Product specification
This data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
PURCHASE OF PHILIPS I2C COMPONENTS
Purchase of Philips I2C components conveys a license under the Philips’ I2C patent to use the
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.
1996 Nov 07
34
Philips Semiconductors
Preliminary specification
Integrated VIP and teletext decoder
(IVT1.1X)
SAA5254
NOTES
1996 Nov 07
35
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Middle East: see Italy
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Tel. +31 40 27 82785, Fax. +31 40 27 88399
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Tel. +64 9 849 4160, Fax. +64 9 849 7811
Norway: Box 1, Manglerud 0612, OSLO,
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Portugal: see Spain
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2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
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For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
Internet: http://www.semiconductors.philips.com
© Philips Electronics N.V. 1996
SCA52
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
537021/00/02/pp36
Date of release: 1996 Nov 07
Document order number:
9397 750 01015