PTMA080302M Confidential, Limited Internal Distribution Wideband RF LDMOS Integrated Power Amplifier 30 W, 700 – 1000 MHz Description The PTMA080302M is a wideband, matched, 30-watt, 2-stage LDMOS integrated amplifier intended for use in all typical modulation formats from 700 to 1000 MHz. This device is offered in a 20-lead, thermally-enhanced, overmolded package for cool and reliable operation. PTMA080302M Package PG-DSO-20-63 Features • VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, fixture tuned for 920 - 960 MHz Designed for wide RF modulation bandwidths, and low memory effects • On-chip matching, integrated input DC block, 50-ohm input and ~ 8-ohm output Typical GSM/EDGE performance, 940 MHz, 28 V - Output power = 15 W Avg. - Linear gain = 31 dB - Power added efficiency = 36% - EVM at 15 W = 1.7 % - ACPR at 400 kHz = –61 dBc - ACPR at 600 kHz = –73 dBc Typical CW performance at 940 MHz, 28 V - Output power at P–1dB = 32 W - Linear gain (1 W) = 31 dB - Power added efficiency = 46% Capable of handling 10:1 VSWR @ 28 V, 30 W (CW) output power Integrated ESD protection. Meets HBM Class 1B (minimum), per JESD22-A114F 10 30 5 0 Gain 20 -5 15 -10 10 -15 5 Return Loss • Return Loss (dB) 35 25 Gain (dB) Broadband Performance • -20 • 0 -25 700 750 800 850 900 950 1000 1050 1100 • Frequency (MHz) • RoHS-compliant package RF Characteristics GSM/EDGE Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, ƒ = 920 to 960 MHz, POUT = 15 W Avg. Characteristic Symbol Min Typ Max Unit Gain Gps — 31 — dB Power-added Efficiency PAE — 36 — % Error Vector Magnitude EVM (RMS) — 1.7 — % All published data at T CASE = 25°C unless otherwise indicated ESD: Electrostatic discharge sensitive device—observe handling precautions! Data Sheet 1 of 11 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution RF Characteristics (cont.) GSM/EDGE Measurements (cont.) VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, ƒ = 920 to 960 MHz, POUT = 15 W Avg. Characteristic Symbol Min Typ Max Unit 400 kHz offset ACPR1 — –61 — dBc 600 kHz offset ACPR2 — –73 — dBc Input Return Loss IRL — –15 — dB Gain Flatness ∆G — 0.2 — dB Modulation Spectrum Two-tone Measurements (tested in Infineon test fixture) VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, POUT = 32 W PEP, ƒ = 940 MHz, tone spacing = 1 MHz Characteristic Symbol Min Typ Max Unit Gain Gps 31 32 — dB Power-added Efficiency PAE 34 35 — % IMD — –33 –31 dBc Intermodulation Distortion Single-tone Measurements (not subject to production test—verified by design/characterization in Infineon test fixture) VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, ƒ = 940 MHz Characteristic Symbol Min Typ Max Unit Gain Gps — 32 — dB Power-added Efficiency PAE — 46 — % P–1dB — 31 — W Output Power DC Characteristics Characteristic Conditions Symbol Min Typ Max Unit Drain-Source Breakdown Voltage VGS = 0 V, IDS = 10 mA V(BR)DSS 65 — — V Drain Leakage Current VDS = 28 V, V GS = 0 V IDSS — — 1.0 µA VDS = 63 V, V GS = 0 V IDSS — — 10.0 µA On-State Resistance Operating Gate Voltage Stage 1 VGS = 10 V, V DS = 0.1 V RDS(on) — 0.25 — Ω Stage 2 VGS = 10 V, V DS = 0.1 V RDS(on) — 1.85 — Ω VGS 2.0 2.5 3.0 V IGSS — — 1.0 µA VDS = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA Gate Leakage Current Data Sheet VGS = 10 V, V DS = 0 V 2 of 11 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Maximum Ratings Parameter Symbol Value Unit Drain-Source Voltage VDSS 65 V Gate-Source Voltage VGS –0.5 to +12 V Junction Temperature TJ 200 °C Input Power PIN 16 dBm Total Device Dissipation PD 129.5 W 0.74 W/°C Above 25°C derate by Storage Temperature Range TSTG –40 to +150 °C Thermal Resistance (TCASE = 70°C) Stage 1 RθJC 6.7 °C/W Stage 2 RθJC 1.7 °C/W Moisture Sensitivity Level Level Test Standard Package Temperature Unit 3 IPC/JEDEC J-STD-020 260 °C Ordering Information Type and Version Package Outline Package Description Shipping PTMA080302M V1 PG-DSO-20-63 Copper heat slug, plastic EMC body Tape Data Sheet 3 of 11 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Typical Performance (data taken in a production test fixture) CW Power Performance Two-tone Drive-up VDD = 28 V, I DQ1 = 120 mA, I DQ2 = 280 mA, ƒ = 920, 940, 960 MHz VDD = 28 V, I DQ1 = 120 mA, IDQ2 = 280 mA, selected frequencies 28 50 Efficiency 24 40 20 30 16 20 920 MHz 940 MHz 960 MHz 12 10 8 -30 32 36 40 44 -40 30 IMD3 -50 20 Efficiency 10 -70 0 27 48 29 31 33 35 37 39 41 43 Output Power (dBm) Output Power (dBm) Power Sweep at Selected Drain Voltages EDGE Modulation Spectrum Performance VDD1=28 V, VDD2 = 24 V, 28 V and 32 V, IDQ1 = 120 mA, ƒ = 940 MHz VDD = 28 V, I DQ1 = 120 mA, IDQ2 = 280 mA, series show ƒ = 942 MHz at selected temperatures 25 °C 42 34 –25 °C 25 °C 90 °C 40 38 32 Gain 36 30 Gain (dB) Power Gain (dB) 40 -60 0 28 50 920 MHz 940 MHz 960 MHz Power Added Efficiency (%) 60 Gain IMD3 (dBc) 32 Gain (dB) -20 70 Power Added Efficiency (%) 36 32 V 28 V 24 V 28 34 32 30 28 26 26 24 29 31 33 35 37 39 41 43 45 47 30 Output Power (dBm) Data Sheet 32 34 36 38 40 42 44 46 Output Power (dBm) 4 of 11 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Typical Performance (cont.) EDGE Modulation Spectrum Performance EDGE Modulation Spectrum Performance VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, series show ƒ = 942 MHz at selected temperatures VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, series are at selected frequencies 25 -50 -55 -60 400 kHz 20 -65 15 -70 600 kHz 10 -75 5 -80 0 -85 30 32 34 36 38 40 42 -40 40 925.2 MHz 942.6 MHz 959.8 MHz 35 30 -45 -50 -55 25 -60 20 -65 400 kHz 15 -70 10 -75 600 kHz 5 -80 0 44 -85 30 32 Output Power (dBm) 34 36 38 40 42 44 Output Power (dBm) EDGE EVM EDGE EVM VD D = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, series show ƒ = 942 MHz at selected temperatures VDD = 28 V, IDQ1 = 120 mA, IDQ2 = 280 mA, series are at selected frequencies 14 60 50 12 10 40 8 Efficiency 30 6 20 4 EVM 10 2 0 70 Power Added Efficiency (%) –25 °C 25 °C 90 °C Error Vector Magnitude(%) 70 Power Added Efficiency (%) Efficiency 32 34 36 38 40 42 60 50 12 10 Efficiency 40 8 30 6 20 4 EVM 10 2 0 30 44 Output Power (dBm) Data Sheet 14 925.2 MHz 942.6 MHz 959.8 MHz 0 0 30 Edge Modulation Spectrum (dBc) 30 Efficiency 45 Error Vector Magnitude(%) 35 -45 Power Added Efficiency (%) -40 –25 °C 25 °C 90 °C 40 Edge Modulation Spectrum (dBc) Power Added Efficiency (%) 45 32 34 36 38 40 42 44 Output Power (dBm) 5 of 11 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Typical Performance (cont.) Gate – Source Voltage vs. Temperature Normalized Gate – Source Voltage (threshold), V VDD = 28 V, I DQ1 = 120 mA, IDQ2 = 280 mA 1.15 VGS1 VGS2 1.10 1.05 1.00 0.95 0.90 0.85 -30 Slope = –1.3 mV/°C -10 10 30 50 70 90 Temperature (°C) Broadband Circuit Impedance Z Load Ω jX 9.8 –3.1 780 9.3 –2.6 800 8.9 –2.1 820 8.6 –1.6 840 8.3 –1.0 860 8.0 –0.5 880 7.8 0.0 900 7.7 0.6 920 7.6 1.1 940 7.5 1.7 960 7.4 2.3 980 7.4 2.9 1000 7.5 3.5 Z0 = 50 Ω 1000 MHz 0.4 760 S 0.3 –3.6 0.2 10.3 0.1 740 0. 0 –4.0 Z Load 700 MHz 0. 1 < -- 11.0 ER 720 S NG TH E LE WAV –4.5 G EN 11.7 AD T OW AR D L O 700 IN HS TO W A RD R - W AV EL EN GT MHz Data Sheet Z Load D 0.1 Frequency 0. 6 of 11 2 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Reference Circuit — for evaluation only VD1 D2 C1 100µF 50V C2 10µF C3 1µF C4 0.1µF C14 0.1µF C5 47pF J1 l1 VG 1 R3 C6 10µF R1 0O C7 1µF C8 0.1µF C9 47pF C17 100µF 50V C22 0.6pF l3 C25 33pF l2 l7 l8 l9 l10 J2 C24 6.8pF l5 Q1 VG2 C16 10µF l4 DUT 1 20 2 19 3 18 4 17 PTMA080302M 5 16 6 15 7 14 8 13 9 12 10 11 C15 1µF C23 0.6pF l6 R4 R2 0O C10 10µF C11 1µF C12 0.1µF C18 0.1µF C13 47pF Q2 C19 1µF C20 10µF C21 100µF 50V Reference circuit schematic for ƒ = 940 MHz Circuit Assembly Information DUT PCB Microstrip l1 l2 l3, l5 l4, l6 l7 l8 l9 l10 Data Sheet PTMA080302M 0.76 mm [.030"] thick, εr = 3.48 Electrical Characteristics at 940 MHz 0.143 λ, 0.012 λ, 0.012 λ, 0.156 λ, 0.040 λ, 0.020 λ, 0.086 λ, 0.026 λ, LDMOS IC Rogers RO4350 Dimensions: L x W (mm) 50.0 Ω 10.4 Ω 10.4 Ω 60.0 Ω 34.0 Ω 43.3 Ω 43.3 Ω 50.0 Ω 27.76 x 1.70 2.01 x 13.00 2.06 x 13.00 30.61 x 1.22 7.52 x 3.00 3.81 x 2.11 16.43 x 2.11 5.03 x 1.70 7 of 11 1 oz. copper Dimensions: L x W (in.) 1.093 x 0.067 0.079 x 0.512 0.081 x 0.512 1.205 x 0.048 0.296 x 0.118 0.150 x 0.083 0.647 x 0.083 0.198 x 0.067 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Reference Circuit (cont.) VD 2 VD1 C14 C16 C15 C1 C17 PTMA080302M_01 C2 C3 C4 C5 C22 C9 RF_IN C8 C7 RF_OUT C25 C24 C23 C6 C13 C12 C11 C10 VD1 VG1 R3 Q1 R4 C19 C18 C20 V G2 C21 VD2 Q2 RO4350 , .030 R2 a0 8 0 3 0 2 m _c d_ 1 - 30 - 0 9 Reference circuit asembly diagram* (not to scale) Component Description Suggested Manufacturer P/N or Comment C1, C17, C21 C2, C6, C10, C16, C20 C3, C7, C11, C15, C19 C4, C8, C12, C14, C18 C5, C9, C13 C22, C23 C24 C25 Q1 , Q2 R1, R2 R3, R4 Electrolytic capacitor, 100 µF, 50 V Ceramic capacitor, 10 µF Digi-Key Murata PCE3718CT-ND GRM422Y5V106Z050AL Ceramic capacitor, 1 µF Digi-Key 445-1411-2-ND Capacitor, 0.1 µF Digi-Key 399-1267-2-ND Ceramic capacitor, 47 pF Ceramic capacitor, 0.6 pF Ceramic capacitor, 6.8 pF Ceramic capacitor, 33 pF Transistor Resistor, 0 Ω Potentiometer 2k Ω ATC ATC ATC ATC Infineon Technologies Digi-Key Digi-Key 600F470JT 600S0R6BT 600S6R8CT 600F330JT BCP56 603 3224W-202ETR-ND *Gerber Files for this circuit available on request Data Sheet 8 of 11 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Package Outline Specifications Package PG-DSO-20-63 6. 13.00 [0.512] MAX INDEX PIN 1 10 1 2X 2.90 [0.114] MAX (2 PLS) 14.20±0.30 [0.559±0.012] 6.00 6. 2.95 [0.116] [0.236] 11.00 [0.433] 11 20 9 X 1.27 = 11.43 9 X .050 = .450 TOP VIEW BOTTOM VIEW 1.10 [0.043] MAX (2 PLS) 4. 11.00±0.10 [0.433±0.004] 14°±1° (2 PLS) TOP/BOTTOM ALL SIDES SEE DETAIL A 3.50 [0.137] MAX 1.27 [0.050] 15.90±0.10 [0.626±0.004] 0.40+0.13 [0.015+0.005] 5. END VIEW 0.25mm M C A S B S SIDE VIEW 0.35 [0.014] GAUGE PLANE 0.15 [0.006] REF 0.25+0.07 –0.02 [0.010+0.003 –0.001 ] PG-DSO- 0 2- 3 6 _ po_0 2 -1 9 -2 0 1 0 0+0.1 [0+0.004] STANDOFF 0.95±0.15 [0.037±0.006] 1.60 [0.063] REF DETAIL A Diagram Notes—unless otherwise specified: 1. Interpret dimensions and tolerances per ASME Y14.5M-1994. 2. Package dimensions: 11.0 mm by 15.9 mm by 3.35 mm. 3. JEDEC drawing number: MO-166. 4. Does not include plastic or metal protrusion of 0.15 mm max per side. 5. Does not include dambar protrusion; maximum allowable dambar protrusion shall be 0.08 mm. 6. Bottom metallization. 7. Sn plating (matte) : 5 – 15 micron [196.85 – 590.55 microinch]. Refer to Application Note “Recommendations for Printed Circuit Board Assembly of Infineon DSO and SSOP Packages” for additional information. Data Sheet 9 of 11 Rev. 05.1, 2010-11-09 PTMA080302M Confidential, Limited Internal Distribution Pinout Diagram PTMA080302M VDD 1 1 VDD 1 Thermal FET 20 NC 2 19 NC VD Thermal FET 3 18 VDD 2, RF Out VG Thermal FET 4 17 VDD 2, RF Out RF In 5 16 VDD 2, RF Out RF In 6 15 VDD 2, RF Out VG 1 7 14 VDD 2, RF Out VG 2 8 13 VDD 2, RF Out NC 9 12 NC NC 10 11 NC a0 8 0 3 0 2 m_ p d _ 8 - 1 9 - 1 0 Source: Plated copper heatslug on backside of package Find the latest and most complete information about products and packaging at the Infineon Internet page http://www.infineon.com/rfpower Data Sheet 10 of 11 Rev. 05.1, 2010-11-09 PTMA080302M V1 Confidential, Limited Internal Distribution Revision History: 2010-11-09 2010-04-16, Data Sheet Previous Revision: Page 7 Data Sheet Subjects (major changes since last revision) Revise circuit measurments We Listen to Your Comments Any information within this document that you feel is wrong, unclear or missing at all? Your feedback will help us to continuously improve the quality of this document. Please send your proposal (including a reference to this document) to: [email protected] To request other information, contact us at: +1 877 465 3667 (1-877-GO-LDMOS) USA or +1 408 776 0600 International Edition 2010-11-09 Published by Infineon Technologies AG 81726 Munich, Germany © 2009 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com/rfpower). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. Infineon Technologies components may be used in life-support devices or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Data Sheet 11 of 11 Rev. 05.1, 2010-11-09