Philips Semiconductors Product specification Silicon Diffused Power Transistor PHE13003AU GENERAL DESCRIPTION High-voltage, high-speed planar-passivated npn power switching transistor in the SOT533 envelope intended for use in high frequency electronic lighting ballast applications, converters and inverters, etc. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS VCESM VCBO VCEO IC ICM Ptot VCEsat hFE tfi Collector-emitter voltage peak value Collector-Base voltage (open emitter) Collector-emitter voltage (open base) Collector current (DC) Collector current peak value Total power dissipation Collector-emitter saturation voltage VBE = 0 V PIN UNIT - 700 700 400 1.5 3 50 1.0 25 150 V V V A A W V PIN CONFIGURATION base 2 collector 3 emitter ns SYMBOL DESCRIPTION 1 tab MAX. Tmb ≤ 25 ˚C IC = 1.0 A;IB = 0.25 A IC = 1.0 A; VCE = 5 V IC = 1.0 A; IBON = 0.2 A Fall time (Inductive) PINNING - SOT533 TYP. c b collector 1 2 Top view 3 e MBK915 LIMITING VALUES Limiting values in accordance with the Absolute Maximum Rating System (IEC 134) SYMBOL PARAMETER CONDITIONS VCESM VCEO VCBO IC ICM IB IBM Ptot Tstg Tj Collector to emitter voltage Collector to emitter voltage (open base) Collector to base voltage (open emitter) Collector current (DC) Collector current peak value Base current (DC) Base current peak value Total power dissipation Storage temperature Junction temperature VBE = 0 V Tmb ≤ 25 ˚C MIN. MAX. UNIT -65 - 700 400 700 1.5 3 0.75 1.5 50 150 150 V V V A A A A W ˚C ˚C TYP. MAX. UNIT - 2.5 K/W 70 - K/W THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Junction to mounting base Rth j-a Junction to ambient September 1999 CONDITIONS in free air 1 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor PHE13003AU STATIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL PARAMETER CONDITIONS ICES,ICBO ICES Collector cut-off current 1 VBE = 0 V; VCE = VCESMmax VBE = 0 V; VCE = VCESMmax; Tj = 125 ˚C ICEO IEBO VCEOsust Collector cut-off current 1 Emitter cut-off current Collector-emitter sustaining voltage VCEsat VBEsat hFE hFE Collector-emitter saturation voltage Base-emitter saturation voltage DC current gain VCEO = VCEOMmax (400V) VEB = 9 V; IC = 0 A IB = 0 A; IC = 10 mA; L = 25 mH IC = 1.0 A;IB = 0.25 A IC = 1.0 A;IB = 0.25 A IC = 100mA; VCE = 5 V IC = 1.0 A; VCE = 5 V MIN. TYP. MAX. UNIT - - 1.0 5.0 mA mA 400 - 0.1 1 - mA mA V 8 5 - 1.0 1.2 40 25 V V TYP. MAX. UNIT - 0.9 4.0 0.7 µs µs µs - 2 100 µs ns - 4 150 µs ns DYNAMIC CHARACTERISTICS Tmb = 25 ˚C unless otherwise specified SYMBOL ton ts tf PARAMETER CONDITIONS Switching times (resistive load) ICon = 1.0 A; IBon = -IBoff = 0.2 A; RL = 75 ohms; VBB2 = 4V; Turn-on time Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time Switching times (inductive load) ts tf Turn-off storage time Turn-off fall time ICon = 1.0 A; IBon = 0.2 A; LB = 1 µH; -VBB = 5 V ICon = 1.0 A; IBon = 0.2 A; LB = 1 µH; -VBB = 5 V; Tj = 100 ˚C 1 Measured with half sine-wave voltage (curve tracer). September 1999 2 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor PHE13003AU ! + 50v 100-200R 10 Zth j-mb / (K/W) D= 1 0.5 0.2 Horizontal 0.1 Oscilloscope 0.05 0.1 Vertical 1R 300R 30-60 Hz 0.02 PD tp D= tp T 0 6V t T 0.01 10us Fig.1. Test circuit for VCEOsust. 1ms t/s 0.1s 10ms Fig.4. Transient thermal impedance. Zth j-lead = f(t); parameter D = tp/T HFE 30 IC / mA 125 C 20 15 -40 C 10 25 C 250 VCE = 1V 5 100 10 0 min VCE / V VCEOsust 1 0.001 Fig.2. Oscilloscope display for VCEOsust. 0.01 0.1 IC/A 1 2 3 5 Fig.5. Typical DC current gain. hFE = f(IC) parameter VCE 120 HFE 30 Normalised Power Derating PD% 125 C 110 100 90 -40 C 25 C 80 10 70 VCE = 5V 60 50 40 30 20 10 0 0 20 40 60 80 100 Tmb / C 120 140 1 0.001 Fig.3. Normalised power dissipation. PD% = 100⋅PD/PD 25˚C = f (Tmb) September 1999 0.01 0.1 IC/A 1 2 3 5 Fig.6. Typical DC current gain. hFE = f(IC) parameter VCE 3 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor PHE13003AU VBEsat VOLTAGE/V 1.5 VCEsat VOLTAGE/V 2 1.4 IC/IB = 3 1.3 125 C 1.5 1.2 1.1 1 -40 C 1 IC/IB = 3 25 C 0.9 25 C 0.8 0.5 0.7 125 C 0.6 -40 C 0 0.01 0.1 IC, COLLECTOR CURRENT/A 1 0.5 0.01 2 Fig.7. Collector-Emitter saturation voltage. Solid Lines = typ values, IC/IB = 3 0.1 IC, COLLECTOR CURRENT/A 1 2 Fig.8. Base-Emitter saturation voltage. Solid Lines = typ values, IC/IB = 3 VCC ICon 90 % IC LC 10 % tf ts IBon LB t toff T.U.T. IBon IB -VBB t -IBoff Fig.9. Test circuit inductive load. VCC = 300 V; -VBE = 5 V, LC = 200 µH; LB = 1 µH Fig.10. Switching times waveforms with inductive load. VCC ICon 90 % 90 % IC RL 10 % ts VIM RB 0 ton IBon IB tp tf toff T.U.T. 10 % T tr 30ns -IBoff Fig.11. Test circuit resistive load. VIM = -6 to +8 V VCC = 250 V; tp = 20 µs; δ = tp / T = 0.01. RB and RL calculated from ICon and IBon requirements. September 1999 Fig.12. Switching times waveforms with resistive load. 4 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor PHE13003AU IC/A VCC 2.5 2.25 2 1.75 LC 1.5 1.25 VCL(RBSOAR) IBon 1 PROBE POINT LB -9V 0.75 -5V -3V 0.5 -1V -VBB T.U.T. 0.25 0 0 100 200 300 400 500 600 700 800 VCEclamp/V Fig.14. Reverse bias safe operating area Tj ≤ Tjmax for -VBE = 9V, 5V,3V & 1V Fig.13. Test Circuit for the RBSOA test. Vcl ≤ 700V; Vcc = 150V; LB = 1µH; Lc = 200µH September 1999 5 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor PHE13003AU MECHANICAL DATA Plastic single-ended package (Philips version of I-PAK); 3 leads (in-line) SOT533 E A A1 E1 D1 mounting base D Q L 1 2 e1 3 b c w M e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 mm 2.38 2.22 0.89 0.71 OUTLINE VERSION SOT533 b c 0.89 0.56 0.71 0.46 D D1 E E1 7.28 6.94 1.06 0.96 6.73 6.47 5.36 5.26 e L Q 9.8 9.4 1.00 1.10 e1 4.57 2.285 REFERENCES IEC JEDEC EIAJ TO-251 EUROPEAN PROJECTION ISSUE DATE 99-02-18 Fig.15. SOT533 surface mounting package. Pin 2 connected to mounting base. September 1999 6 Rev 1.000 Philips Semiconductors Product specification Silicon Diffused Power Transistor PHE13003AU DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 1999 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. September 1999 7 Rev 1.000