INTEGRATED CIRCUITS DATA SHEET TDA3605Q Multiple voltage regulator with switch Preliminary specification Supersedes data of 1995 Nov 20 File under Integrated Circuits, IC01 1997 Jul 09 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q FEATURES GENERAL DESCRIPTION • Two VP-state controlled regulators (regulator 1 and regulator 3) and a power switch The TDA3605Q is a multiple output voltage regulator with a power switch, intended for use in car radios with or without a microcontroller. It contains: • Regulator 2, reset and ignition buffer operates during load dump and thermal shutdown 1. Two fixed voltage regulators with a foldback current protection (regulator 1 and regulator 3) and one fixed voltage regulator (regulator 2), intended to supply a microcontroller, that also operates during load dump and thermal shutdown. • Separate control pins for switching regulator 1, regulator 3 and the power switch • Supply voltage range of −18 to +50 V (operating from 11 V) 2. A power switch with protections, operated by an enable input. • Low reverse current of regulator 2 • Low quiescent current (when regulator 1, regulator 3, and power switch are switched off) 3. Reset and hold outputs can be used to interface by the microcontroller. The reset signal can be used to call up the microcontroller and the hold output indicates regulator 1 voltage available and within range. • Hold output (only valid when regulator 1 is switched on) • Reset and hold outputs (open collector outputs) • Adjustable reset delay time 4. A supply pin which can withstand load dump pulses and negative supply voltage. • High ripple rejection 5. Regulator 2 will be switched on at a supply voltage >6.5 V and off at a voltage of regulator 2 <1.9 V. • Back-up capacitor for regulator 2. 6. Also there is a provision for use of a reserve supply capacitor that will hold enough energy for regulator 2 (5 V continuous) to allow a microcontroller to prepare for loss of voltage. PROTECTIONS • Reverse polarity safe (down to −18 V without high reverse current) • Able to withstand voltages up to 18 V at the outputs (supply line may be short-circuited) • ESD protected on all pins • Thermal protection • Local thermal protection for power switch • Load dump protection • Foldback current limit protection for regulators 1, 2 and 3 • Delayed second current limit protection for the power switch (at short-circuit) • The regulator outputs and the power switch are DC short-circuited safe to ground and VP. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME TDA3605Q 1997 Jul 09 DBS13P DESCRIPTION plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) 2 VERSION SOT141-6 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage operating 11 14.4 18 V reverse battery −18 − − V regulator 2 on 2.4 14.4 18 V V jump start t ≤ 10 minutes − − 30 load dump protection during ≤50 ms; tr ≥ 2.5 ms − − 50 V Iq(tot) total quiescent supply current standby mode − 500 600 µA Tj junction temperature − − 150 °C Voltage regulators VREG1 output voltage regulator 1 0.5 mA ≤ IREG1 ≤ 600 mA 10.0 10.5 V VREG2 output voltage regulator 2 0.5 mA ≤ IREG2 ≤ 300 mA; VP = 14.4 V 4.75 5.0 5.25 V VREG3 output voltage regulator 3 0.5 mA ≤ IREG3 ≤ 400 mA 4.75 5.0 5.25 V drop-out voltage Isw = 1 A − 0.45 0.7 V Isw = 1.8 A − 1 1.8 V 3 − − A 9.5 Power switch Vsw(d) IswM 1997 Jul 09 peak current 3 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q BLOCK DIAGRAM handbook, full pagewidth VP (14.4 V) POWER SWITCH 1 13 (14.2 V/3 A) 1 A after 10 ms (short-circuit) 7 TEMPERATURE LOAD DUMP PROTECTION & Ven(sw) Vsw BACK-UP SWITCH 12 (14.2 V/100 mA) Vbu BACK-UP CONTROL 11 (5 V/100 mA) REG2 REGULATOR 2 3 REGULATOR 3 & (5 V/400 mA) REG3 4 Ven3 2 REGULATOR 1 & (10 V/600 mA) REG1 6 Ven1 8 TDA3605Q 5 9 VC 10 GND Fig.1 Block diagram. 1997 Jul 09 4 MGB753 Vhold RES Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q PINNING SYMBOL PIN DESCRIPTION handbook, halfpage VP 1 regulator 1 output REG1 2 3 regulator 3 output REG3 3 Ven3 4 enable input regulator 3 Ven3 4 RES 5 reset output voltage RES 5 Ven1 6 enable input regulator 1 Ven(sw) 7 enable input power switch Ven1 6 Vhold 8 hold output Ven(sw) 7 Vhold 8 VC 9 VP 1 supply voltage REG1 2 REG3 VC 9 reset delay capacitor GND 10 ground (0 V) REG2 11 regulator 2 output Vbu 12 back-up Vsw 13 power switch output voltage TDA3605Q GND 10 REG2 11 Vbu 12 Vsw 13 MGB752 Fig.2 Pin configuration. Regulator 1 has a hold output (open collector) indicating that the output voltage of this regulator is settled (held HIGH by external pull-up resistor) and when the output voltage of this regulator drops out of regulation (because of supply voltage drop or high load) the hold output will go LOW. The hold output signal is only valid when regulator 1 is enabled by its enable input (pin 6). FUNCTIONAL DESCRIPTION The TDA3605Q is a multiple output voltage regulator with a power switch, intended for use in car radios with or without a microcontroller. Because of low-voltage operation of the car radio, low-voltage drop regulators are used in the TDA3605Q. Regulator 2 will switch-on when the back-up voltage exceeds 6.5 V for the first time and will switch-off again when the output voltage of regulator 2 is below 1.9 V (this is far below an engine start). When regulator 2 is switched on and the output voltage of this regulator is within its voltage range, the reset output will be enabled (reset will go HIGH via a pull-up resistor) to generate a reset to the microcontroller. The reset cycles can be extended by an external capacitor at pin 9. The above mentioned start-up feature is built-in to secure a smooth start-up of the microcontroller at first connection, without uncontrolled switching of regulator 2 during the start-up sequence. The power switch can also be controlled by means of a separate enable input (pin 7). All output pins are fully protected. The regulators are protected against load dump (regulator 1 and 3 will switch off at supply voltages >18 V) and short-circuit (foldback current protection). The switch contains a current protection, but this protection is delayed at short-circuit condition for at least 10 ms. During this time the output current is limited to a peak value of at least 3 A and 2 A (DC) (VP ≤ 18 V). At supply voltages >17 V the switch is clamped at maximum 16 V (to avoid external connected circuitry being damaged by an overvoltage) and the switch will switch-off at load dump. The charge of the back-up capacitor can be used to supply regulator 2 for a short period when the supply falls to 0 V (time depends on value of storage capacitor). When both regulator 2 and the supply voltage (VP > 4.5 V) are available, regulators 1 and 3 can be operated by means of enable inputs (pins 6 and 4 respectively). 1997 Jul 09 The total timing of a semi on/off logic set is shown in Fig.3. 5 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch handbook, full pagewidth TDA3605Q load dump VP Vbu 6.5 V 5.4 V 4.0 V regulator 2 5.0 V 1.9 V 0V reset delay capacitor reset 5.0 V 3.0 V 0V 6.0 V Back-up Schmitt-trigger and reset behaviour load dump 18.0 V VP 10.4 V 4.5 V 4.0 V ≥2.2 V enable regulator 1 ≤2.0 V 10.0 V regulator 1 0V ≥2.2 V enable regulator 3 ≤2.0 V 5.0 V regulator 3 0V VP and enable Schmitt-trigger load dump 16.9 V VP 4.5 V 4.0 V enable power switch power switch output ≥2.2 V ≤2.0 V 0V Switch behaviour Fig.3 Timing diagram. 1997 Jul 09 6 MGB759 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP PARAMETER CONDITIONS MIN. MAX. UNIT supply voltage operating − 18 V jump start t ≤ 10 minutes − 30 V load dump protection during ≤50 ms; tr ≥ 2.5 ms − 50 V non-operating − −18 V − 62 W VP reverse battery voltage Ptot total power dissipation Tstg storage temperature non-operating −55 +150 °C Tamb ambient temperature operating −40 +85 °C Tj junction temperature operating −40 +150 °C THERMAL CHARACTERISTICS SYMBOL PARAMETER VALUE UNIT Rth j-c thermal resistance from junction to case 2 K/W Rth j-a thermal resistance from junction to ambient in free air 50 K/W CHARACTERISTICS VP = 14.4 V; Tamb = 25 °C; see Fig.6; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT Supply VP supply voltage operating Iq 11 14.4 18 V regulator 2 on note 1 2.4 14.4 18 V jump start t ≤ 10 minutes − − 30 V load dump protection during ≤50 ms; tr ≥ 2.5 ms − − 50 V VP = 12.4 V; note 2; IR2 = 0.1 mA − 500 600 µA VP = 14.4 V; note 2; IR2 = 0.1 mA − 520 − µA quiescent current Schmitt-trigger power supply for switch, regulator 1 and regulator 3 Vthr rising voltage threshold 4.0 4.5 5.0 V Vthf falling voltage threshold 3.5 4.0 4.5 V Vhys hysteresis − 0.5 − V Schmitt-trigger power supply for regulator 2 Vthr rising voltage threshold 6.0 6.5 7.1 V Vthf falling voltage threshold 1.7 1.9 2.2 V Vhys hysteresis − 4.6 − V 1997 Jul 09 7 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch SYMBOL PARAMETER TDA3605Q CONDITIONS MIN. TYP. MAX. UNIT Schmitt-trigger for enable input (regulator 1, regulator 3 and switch) Vthr rising voltage threshold 1.7 2.2 2.7 V Vthf falling voltage threshold 1.5 2.0 2.5 V Vhys hysteresis IREG = ISW = 1 mA 0.1 0.2 0.5 V ILI input leakage current Ven = 5 V 1 5 10 µA Schmitt-trigger for reset buffer Vthr rising voltage threshold of regulator 2 VP rising; IREG1 = 50 mA; note 3 − VREG2 − 0.15 VREG2 − 0.075 V Vthf falling voltage threshold of regulator 2 VP rising; IREG1 = 50 mA; note 3 4.3 VREG2 − 0.35 − V Vhys hysteresis 0.1 0.2 V 0.3 Schmitt-trigger for hold Vthr rising voltage threshold of regulator 1 VP rising; note 3 − VREG1 − 0.15 VREG1 − 0.075 V Vthf falling voltage threshold of regulator 1 VP rising; note 3 9.2 VREG1 − 0.35 − V Vhys hysteresis 0.1 0.2 0.3 V Reset and hold buffer ILsink LOW level sink current VRES/hold ≤ 0.8 V 2 − − mA ILO output leakage current VP = 14.4 V; VRES/hold = 5 V − 16 32 µA tr rise time note 4 − 7 50 µs tf fall time note 4 − 1 50 µs Reset delay Ich charge current 2 4 8 µA Idch discharge current 500 800 − µA Vthr rising voltage threshold 2.5 3.0 3.5 V td delay time 20 35 70 ms − 1 400 mV 9.5 10.0 10.5 V C = 47 nF; note 5 Regulator 1 (IREG1 = 5 mA) VREG1(off) output voltage off VREG1 output voltage 11 V ≤ VP ≤ 18 V 9.5 10.0 10.5 V ∆VREG1 line regulation 11 V ≤ VP ≤ 18 V − 2 75 mV ∆VREGL1 load regulation 1 mA ≤ IREG1 ≤ 600 mA − 20 50 mV 1 mA ≤ IREG1 ≤ 600 mA Iq quiescent current IR1 = 600 mA − 25 60 mA SVRR1 supply voltage ripple rejection fi = 3 kHz; Vi(p-p) = 2 V 60 70 − dB VREGd1 drop-out voltage IREG1 = 550 mA; VP = 9.5 V; note 6 − 0.4 0.7 V IREGm1 current limit VREG1 > 8.5 V; note 7 0.65 1.2 − A 1997 Jul 09 8 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch SYMBOL IREGsc1 PARAMETER short-circuit current TDA3605Q CONDITIONS RL ≤ 0.5 Ω; note 8 MIN. TYP. MAX. UNIT 250 800 − mA Regulator 2 (IREG2 = 5 mA) VREG2 ∆VREG2 ∆VREGL2 output voltage line regulation load regulation 0.5 mA ≤ IREG2 ≤ 150 mA 4.75 5.0 5.25 V 0.5 mA ≤ IREG2 ≤ 300 mA 4.75 5.0 5.25 V 7 V ≤ VP ≤ 18 V 4.75 5.0 5.25 V 18 V ≤ VP ≤ 50 V; IREG2 ≤ 150 mA 4.75 5.0 5.25 V 6 V ≤ VP ≤ 18 V − 2 50 mV 6 V ≤ VP ≤ 50 V − 15 75 mV 1 mA ≤ IREG2 ≤ 150 mA − 20 50 mV 1 mA ≤ IREG2 ≤ 300 mA − − 100 mV SVRR2 supply voltage ripple rejection f = 3 kHz; Vi(p-p) = 2 V 60 70 − dB VREGd2 drop-out voltage IREG2 = 100 mA; VP = 4.75 V; note 6 − 0.4 0.6 V IREG2 = 200 mA; VP = 5.75 V; note 6 − 0.8 1.2 V IREG2 = 100 mA; Vbu = 4.75 V; note 7 − 0.2 0.5 V IREG2 = 200 mA; Vbu = 5.75 V; note 7 − 0.8 1.0 V IREGm2 current limit VREG2 > 4.5 V; note 7 0.32 0.37 − A IREGsc2 short-circuit current RL ≤ 0.5 Ω; note 8 20 100 − mA − 1 400 mV 1 mA ≤ IREG3 ≤ 400 mA 4.75 5.0 5.25 V 7 V ≤ VP ≤ 18 V 4.75 5.0 5.25 V Regulator 3 (IREG3 = 5 mA) VREG3(off) output voltage off VREG3 output voltage ∆VREG3 line regulation 7 V ≤ VP ≤ 18 V − 2 50 mV ∆VREGL3 load regulation 1 mA ≤ IREG3 ≤ 400 mA − 20 50 mV Iq quiescent current IR3 = 400 mA − 15 40 mA SVRR3 supply voltage ripple rejection fi = 3 kHz; Vi(p-p) = 2 V 60 70 − dB VREGd3 drop-out voltage IREG3 = 400 mA; VP = 5.75 V; note 6 − 1 1.5 V IREGm3 current limit VREG3 > 4.5 V; note 7 0.45 0.70 − A IREGsc3 short-circuit current RL ≤ 0.5 Ω; note 8 100 400 1997 Jul 09 9 mA Philips Semiconductors Preliminary specification Multiple voltage regulator with switch SYMBOL PARAMETER TDA3605Q CONDITIONS MIN. TYP. MAX. UNIT Power switch Vswd drop-out voltage Isw = 1 A; note 10 − 0.45 0.7 V Isw = 1.8 A; note 10 − 1.0 1.8 V − A Isw(dc) continuous current VP = 16 V; VSW = 13.5 V 1.8 2.0 Vswcl clamping voltage VP ≥ 17 V 13.5 15.0 16.0 V IswM peak current VP = 17 V; notes 11 and 12 3 − − A Vswfb fly back voltage behaviour Isw = −100 mA − VP + 3 22 V Isw(sc) short-circuit current VP = 14.4 V; Vsw ≤ 1.2 V; note 12 − 0.8 − A 0.3 0.35 − A Back-up switch Ibu(DC) continuous current Vbucl clamping voltage VP ≥ 16.7 V − − 16 V Vr reverse current VP = 0 V; Vbu = 12.4 V − − 900 ms Notes 1. Minimum operating voltage, only if VP has exceeded 6.5 V. 2. The quiescent current is measured in the standby mode. So, the enable inputs of regulators 1 and 3 and the switch are grounded and R2 = ∞ (see Fig.6). 3. The voltage of the regulator sinks as a result of a VP drop. 4. The rise and fall times are measured with a 10 kΩ pull-up resistor and a 50 pF load capacitor. 5. The delay time depends on the value of the capacitor: C 3 t d = ------- × V C ( th ) = C × ( 750 ×10 ) (ms) I ch 6. The drop-out voltage of regulators 1, 2 and 3 is measured between VP and VREGn. 7. At current limit, IREGmn is held constant (see Fig.4 for behaviour of IREGmn). 8. The foldback current protection limits the dissipated power at short-circuit (see Fig.4). 9. The peak current of 300 mA can only be applied for short periods (t < 100 ms). 10. The drop-out voltage of the power switch is measured between VP and Vsw. 11. The maximum output current of the switch is limited to 1.8 A when the supply voltage exceeds 18 V. A test-mode is built-in. The delay time of the switch will be disabled when a voltage of VP + 1 V is applied to the switch enable input. 12. At short circuit, Isw(sc) of the power switch is held constant to a lower value than the continuous current after a delay of at least 10 ms. A test-mode is built-in. The delay time of the switch will be disabled when a voltage of VP + 1 V is applied to the switch enable input. 1997 Jul 09 10 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch handbook, halfpage TDA3605Q MGB755 9V handbook, halfpage VREG2 VREG1 MGB756 5.0 V 2V 1V ≥300 mA IREGsc1 IREGsc2 ≥50 mA IREGm1 a. Regulator 1. b. Regulator 2. handbook, halfpage VREG3 MGB757 5.0 V 1V IREGsc3 ≥200 mA IREGm3 IREG3 c. Regulator 3. Fig.4 Foldback current protection of the regulators. handbook, halfpage MGB758 ≥3 Isw (A) 1.8 t (ms) ≥10 VSW ≥ 5 V. Fig.5 Current protection of the power switch. 1997 Jul 09 IREGm2 IREG2 IREG1 11 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q TEST AND APPLICATION INFORMATION Test information handbook, full pagewidth VP C1 220 nF VP (1) 13 1 Vsw C2 220 nF RL(sw) 1 kΩ enable input power switch 11 7 regulator 2 5V C3 10 µF Ven(sw) RL(REG2) 1 kΩ enable input regulator 1 6 2 regulator 1 10 V C4 10 µF Ven1 enable input regulator 3 TDA3605Q regulator 3 4 RL(REG1) 1 kΩ 5V 3 C5 10 µF Ven3 reset capacitor 9 5 C7 47 nF back-up capacitor hold output 1 kΩ R2 10 kΩ C6 1 µF 12 R1 1 kΩ Vbu reset output RL(REG3) R3 10 kΩ 8 C8 220 nF 10 GND MGB754 (1) Capacitor not required for stability. Fig.6 Test circuit. The noise on the supply line depends on the value of the supply capacitor and is caused by a current noise (output noise of the regulators is translated into a current noise by means of the output capacitors). Application information NOISE Table 1 Noise figures When a high frequency capacitor of 220 nF in parallel with an electrolytic capacitor of 100 µF is connected directly to pins 3 and 8 (supply and ground) the noise is minimal. NOISE FIGURE (µV)(1) REGULATOR at OUTPUT CAPACITOR 10 µF 47 µF 100 µF 1 − 150 − STABILITY 2 − 150 − 3 − 200 − The regulators are made stable with the externally connected output capacitors. The value of the output capacitors can be selected by referring to the graphs illustrated in Figs 7 and 8. Note 1. Measured at a bandwidth of 200 kHz. 1997 Jul 09 12 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q When an electrolytic capacitor is used the temperature behaviour of this output capacitor can cause oscillations at cold temperature. Example 2 The following two examples explain how an output capacitor value is selected. Regulator 2 is made stable with a 10 µF electrolytic capacitor (ESR = 3 Ω). At −30 °C the capacitor value is decreased to 3 µF and the ESR is increased to 23.1 Ω. The regulator will be unstable at −30 °C (see Fig.7). Example 1 Solution Regulator 1 is made stable with an electrolytic output capacitor of 220 µF (ESR = 0.15 Ω). At −30 °C the capacitor value is decreased to 73 µF and the ESR is increased to 1.1 Ω. The regulator will remain stable at −30 °C. Use a tantalum capacitor of 10 µF or a large electrolytic capacitor. The use of tantalum capacitors is recommended to avoid problems with stability at cold temperatures. handbook, halfpage handbook, halfpage MBK099 14 MBK100 4 maximum ESR R 12 (Ω) 10 maximum ESR R (Ω) 3 8 stable region 2 stable region 6 1 4 minimum ESR 2 0 minimum ESR 1 0 0.22 1 10 10 100 C (µF) 100 C (µF) Fig.7 Curve for selecting the value of output capacitor for regulator 2. 1997 Jul 09 Fig.8 13 Curve for selecting the value of output capacitor for regulators 1 and 3. Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q PACKAGE OUTLINE DBS13P: plastic DIL-bent-SIL power package; 13 leads (lead length 12 mm) SOT141-6 non-concave Dh x D Eh view B: mounting base side d A2 B j E A L3 L Q c 1 13 e1 Z e e2 m w M bp 0 5 v M 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A2 bp c D (1) d Dh E (1) e e1 e2 Eh j L L3 m Q v w x Z (1) mm 17.0 15.5 4.6 4.2 0.75 0.60 0.48 0.38 24.0 23.6 20.0 19.6 10 12.2 11.8 3.4 1.7 5.08 6 3.4 3.1 12.4 11.0 2.4 1.6 4.3 2.1 1.8 0.8 0.25 0.03 2.00 1.45 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION REFERENCES IEC JEDEC EIAJ ISSUE DATE 92-11-17 95-03-11 SOT141-6 1997 Jul 09 EUROPEAN PROJECTION 14 Philips Semiconductors Preliminary specification Multiple voltage regulator with switch TDA3605Q The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 °C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 °C, contact may be up to 5 seconds. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “IC Package Databook” (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 °C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. DEFINITIONS Data sheet status Objective specification This data sheet contains target or goal specifications for product development. Preliminary specification This data sheet contains preliminary data; supplementary data may be published later. Product specification This data sheet contains final product specifications. Limiting values Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. 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The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547027/1200/02/pp16 Date of release: 1997 Jul 09 Document order number: 9397 750 02236