PSMN045-80YS N-channel LFPAK 80 V 45 mΩ standard level MOSFET Rev. 01 — 19 March 2010 Objective data sheet 1. Product profile 1.1 General description Standard level N-channel MOSFET in LFPAK package qualified to 175 °C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits Advanced TrenchMOS provides low RDSon and low gate charge Improved mechanical and thermal characteristics High efficiency gains in switching power converters LFPAK provides maximum power density in a Power SO8 package 1.3 Applications DC-to-DC converters Motor control Lithium-ion battery protection Server power supplies Load switching 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 80 V ID drain current Tmb = 25 °C; VGS = 10 V - - 24 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 56 W Tj junction temperature -55 - 175 °C - - 18 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source avalanche energy VGS = 10 V; Tj(init) = 25 °C; ID = 22 A; Vsup ≤ 80 V; RGS = 50 Ω; unclamped Dynamic characteristics QGD gate-drain charge QG(tot) total gate charge VGS = 10 V; ID = 25 A; VDS = 40 V; see Figure 14 and 15 - 3.1 - nC - 12.5 - nC PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET Table 1. Quick reference …continued Symbol Parameter Conditions Min Typ Max Unit VGS = 10 V; ID = 10 A; Tj = 100 °C; see Figure 13 - - 72 mΩ VGS = 10 V; ID = 10 A; Tj = 25 °C - 37 45 mΩ Static characteristics RDSon drain-source on-state resistance 2. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 S source 2 S source 3 S source 4 G gate mb D mounting base; connected to drain Graphic symbol D mb G mbb076 S 1 2 3 4 SOT669 (LFPAK) 3. Ordering information Table 3. Ordering information Type number PSMN045-80YS PSMN045-80YS_1 Objective data sheet Package Name Description Version LFPAK plastic single-ended surface-mounted package (LFPAK); 4 leads SOT669 All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 2 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 80 V VDGR drain-gate voltage Tj ≥ 25 °C; Tj ≤ 175 °C; RGS = 20 kΩ - 80 V VGS gate-source voltage ID drain current -20 20 V VGS = 10 V; Tmb = 100 °C; see Figure 1 - 17 A VGS = 10 V; Tmb = 25 °C - 24 A - 86 A IDM peak drain current tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 56 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C Source-drain diode IS source current Tmb = 25 °C - 24 A ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C - 86 A - 18 mJ Avalanche ruggedness non-repetitive VGS = 10 V; Tj(init) = 25 °C; ID = 22 A; Vsup ≤ 80 V; drain-source avalanche RGS = 50 Ω; unclamped energy EDS(AL)S 001aal626 30 03aa16 120 Pder (%) ID (A) 20 80 10 40 0 0 0 50 100 150 0 200 Tmb (°C) Fig 1. Objective data sheet 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature PSMN045-80YS_1 50 Fig 2. Normalized total power dissipation as a function of mounting base temperature All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 3 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 003aad301 103 ID (A) 10 μs Limit RDSon = VDS / ID 102 10 100 μs 1 DC 1 ms 10 10 ms 100 ms -1 10-2 1 Fig 3. 102 10 103 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Rth(j-mb) thermal resistance from see Figure 4 junction to mounting base Min Typ Max Unit - 1.9 2.7 K/W 001aal675 10 Zth(j-mb) (K/W) δ = 0.5 1 0.2 0.1 0.05 10−1 single shot 10−2 10−6 δ= P 0.02 tp T t tp T 10−5 10−4 10−3 10−2 10−1 1 tp (s) Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN045-80YS_1 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 4 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 6. Characteristics Table 6. Symbol Characteristics Parameter Conditions Min Typ Max Unit ID = 250 µA; VGS = 0 V; Tj = -55 °C 73 - - V ID = 250 µA; VGS = 0 V; Tj = 25 °C 80 - - V ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 11 and 12 1 - - V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 11 and 12 - - 4.6 V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 12 and 11 2 3 4 V - - 1 µA Static characteristics V(BR)DSS drain-source breakdown voltage VGS(th) gate-source threshold voltage IDSS drain leakage current VDS = 80 V; VGS = 0 V; Tj = 25 °C VDS = 80 V; VGS = 0 V; Tj = 175 °C - - 15 µA IGSS gate leakage current VGS = -20 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 20 V; VDS = 0 V; Tj = 25 °C - - 100 nA VGS = 10 V; ID = 10 A; Tj = 175 °C; see Figure 13 - - 103 mΩ VGS = 10 V; ID = 10 A; Tj = 100 °C; see Figure 13 - - 72 mΩ VGS = 10 V; ID = 10 A; Tj = 25 °C - 37 45 mΩ - 2 - Ω 9 - nC RDSon RG drain-source on-state resistance internal gate resistance f = 1 MHz (AC) Dynamic characteristics QG(tot) total gate charge ID = 0 A; VDS = 0 V; VGS = 10 V - 12.5 - nC gate-source charge ID = 25 A; VDS = 40 V; VGS = 10 V; see Figure 14 and 15 - QGS - 3.8 - nC QGS(th) pre-threshold gate-source charge - 1.9 - nC QGS(th-pl) post-threshold gate-source charge ID = 25 A; VDS = 40 V; VGS = 10 V; see Figure 14 - 1.9 - nC QGD gate-drain charge ID = 25 A; VDS = 40 V; VGS = 10 V; see Figure 14 and 15 - 3.1 - nC VGS(pl) gate-source plateau voltage ID = 25 A; VDS = 40 V; see Figure 14 - 5.2 - V Ciss input capacitance - 633 - pF Coss output capacitance VDS = 40 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 16 - 100 - pF Crss reverse transfer capacitance - 50 - pF td(on) turn-on delay time - 9.2 - ns tr rise time - 4.6 - ns td(off) turn-off delay time - 18 - ns tf fall time - 4.4 - ns PSMN045-80YS_1 Objective data sheet VDS = 40 V; RL = 0.5 Ω; VGS = 10 V; RG(ext) = 4.7 Ω All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 5 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit Source-drain diode VSD source-drain voltage IS = 15 A; VGS = 0 V; Tj = 25 °C; see Figure 17 - 0.86 1.2 V trr reverse recovery time 32 - ns recovered charge IS = 5 A; dIS/dt = 100 A/µs; VGS = 0 V; VDS = 40 V - Qr - 42 - nC 003aad046 40 20 10 ID (A) 003aad047 100 VGS (V) = 5 8 5.5 RDSon (mΩ) 5.5 6 30 6 80 8 5 10 60 20 VGS (V) = 10 4.5 40 20 0 0 Fig 5. 20 2 4 6 8 VDS (V) Output characteristics: drain current as a function of drain-source voltage; typical values 003aad052 1000 C (pF) 0 10 Ciss Fig 6. 10 20 30 ID (A) 40 Drain-source on-state resistance as a function of drain current; typical values 003aad053 35 gfs (S) 30 800 25 600 20 Crss 15 400 10 200 5 0 0 2 Fig 7. 4 6 8 VGS (V) Input and reverse transfer capacitances as a function of gate-source voltage; typical values PSMN045-80YS_1 Objective data sheet 0 10 Fig 8. 10 20 30 40 I (A) 50 D Forward transconductance as a function of drain current; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 6 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 003aad054 100 RDSon (mΩ) ID (A) 80 30 60 20 40 10 20 Tj = 175 °C 25 °C 0 0 Fig 9. 003aad048 40 5 10 15 VGS (V) 20 Drain-source on-state resistance as a function of gate-source voltage; typical values 003aad280 5 4 6 V (V) GS 8 Fig 10. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values 03aa35 10−1 min typ max 10−3 typ 2 10−4 min 10−5 1 10−6 0 60 120 180 0 Tj (°C) 2 4 6 VGS (V) Fig 11. Gate-source threshold voltage as a function of junction temperature Objective data sheet 4 10−2 max 3 PSMN045-80YS_1 2 ID (A) VGS(th) (V) 0 −60 0 Fig 12. Sub-threshold drain current as a function of gate-source voltage All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 7 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 003aad045 2.5 a VDS 2.0 ID 1.5 VGS(pl) VGS(th) 1.0 VGS QGS1 0.5 QGS2 QGS 0.0 -60 -30 0 30 60 90 120 003aad050 VGS (V) 8 003aaa508 150 180 Tj (°C) Fig 13. Normalized drain-source on-state resistance factor as a function of junction temperature 10 QGD QG(tot) Fig 14. Gate charge waveform definitions 003aad051 103 Ciss C (pF) VDS = 40 V 6 102 Coss 4 Crss 2 0 0 5 10 QG (nC) 15 Fig 15. Gate-source voltage as a function of gate charge; typical values PSMN045-80YS_1 Objective data sheet 10 10-1 1 10 2 VDS (V) 10 Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 8 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 003aad049 100 IS (A) 80 60 40 175 °C Tj = 25 °C 20 0 0 0.5 1 VSD (V) 1.5 Fig 17. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values PSMN045-80YS_1 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 9 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 7. Package outline Plastic single-ended surface-mounted package (LFPAK); 4 leads A2 A E SOT669 C c2 b2 E1 b3 L1 mounting base b4 D1 D H L2 1 2 3 e 4 w M A b 1/2 X c e A (A 3) A1 C θ L detail X y C 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) A UNIT A1 A2 A3 b b2 1.20 0.15 1.10 0.50 4.41 0.25 1.01 0.00 0.95 0.35 3.62 mm b3 b4 2.2 2.0 0.9 0.7 c D (1) c2 D1(1) E(1) E1(1) max 0.25 0.30 4.10 4.20 0.19 0.24 3.80 5.0 4.8 3.3 3.1 e H L L1 L2 w y θ 1.27 6.2 5.8 0.85 0.40 1.3 0.8 1.3 0.8 0.25 0.1 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT669 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 04-10-13 06-03-16 MO-235 Fig 18. Package outline SOT669 (LFPAK) PSMN045-80YS_1 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 10 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN045-80YS _1 20100319 Objective data sheet - - PSMN045-80YS_1 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 11 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 9. Legal information 9.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 9.3 Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. PSMN045-80YS_1 Objective data sheet Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 12 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PSMN045-80YS_1 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 01 — 19 March 2010 © NXP B.V. 2010. All rights reserved. 13 of 14 PSMN045-80YS NXP Semiconductors N-channel LFPAK 80 V 45 mΩ standard level MOSFET 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 19 March 2010 Document identifier: PSMN045-80YS_1