SO T3 23 NUP1301U Ultra low capacitance ESD protection array Rev. 1 — 28 January 2011 Product data sheet 1. Product profile 1.1 General description Ultra low capacitance ElectroStatic Discharge (ESD) protection array in a small SOT323 (SC-70) Surface-Mounted Device (SMD) plastic package designed to protect one signal line in rail-to-rail configuration from the damage caused by ESD and other transients. 1.2 Features and benefits ESD protection of one signal line (rail-to-rail configuration) Ultra low diode capacitance: Cd = 0.6 pF ESD protection up to 30 kV IEC 61000-4-2; level 4 (ESD) IEC 61000-4-5 (surge); IPP = 11 A AEC-Q101 qualified 1.3 Applications Telecommunication networks Video line protection Microcontroller protection I2C-bus protection Antenna power supply Analog audio Class-D amplifier 1.4 Quick reference data Table 1. Quick reference data Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit - - 80 V Per diode VRRM repetitive peak reverse voltage Cd diode capacitance f = 1 MHz; VR = 0 V - 0.6 0.75 pF IR reverse current VR = 80 V - - 100 nA NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 2. Pinning information Table 2. Pinning Pin Symbol Description 1 GND ground 2 VCC supply voltage 3 I/O input/output Simplified outline Graphic symbol 3 1 3 2 1 2 006aaa763 3. Ordering information Table 3. Ordering information Type number NUP1301U Package Name Description Version - plastic surface-mounted package; 3 leads SOT323 4. Marking Table 4. Marking Type number Marking code[1] NUP1301U *VU [1] * = placeholder for manufacturing site code 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit - 80 V - 80 V - 215 mA - 500 mA tp = 1 s - 4 A tp = 1 ms - 1 A tp = 1 s - 0.5 A Per diode NUP1301U Product data sheet VRRM repetitive peak reverse voltage VR reverse voltage [1] IF forward current IFRM repetitive peak forward current tp 1 ms; 0.25 IFSM non-repetitive peak forward current square wave All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 [2] © NXP B.V. 2011. All rights reserved. 2 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit peak pulse power tp = 8/20 s [3][4] - 220 W tp = 8/20 s [3][4] IPP peak pulse current Ptot total power dissipation - 11 A Tamb 25 C [5][6] - 200 mW Tj junction temperature - 150 C Tamb ambient temperature 55 +150 C Tstg storage temperature 65 +150 C Per device PPP [1] Pulse test: tp 300 s; 0.02. [2] Tj = 25 C prior to surge. [3] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5. [4] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected). [5] Single diode loaded. [6] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. Table 6. ESD maximum ratings Symbol Parameter Conditions VESD electrostatic discharge voltage IEC 61000-4-2 (contact discharge) Product data sheet Max Unit - 30 kV machine model - 400 V MIL-STD-883 (human body model) - 10 kV [1] Device stressed with ten non-repetitive ESD pulses. [2] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected). Table 7. NUP1301U Min [1][2] ESD standards compliance Standard Conditions IEC 61000-4-2; level 4 (ESD) > 15 kV (air); > 8 kV (contact) MIL-STD-883; class 3B (human body model) > 8 kV All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 3 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 001aaa631 IPP 001aaa630 120 100 % 90 % 100 % IPP; 8 μs IPP (%) 80 e−t 50 % IPP; 20 μs 40 10 % 0 10 20 30 30 ns 40 t (μs) Fig 1. t tr = 0.7 ns to 1 ns 0 60 ns 8/20 s pulse waveform according to IEC 61000-4-5 Fig 2. ESD pulse waveform according to IEC 61000-4-2 6. Thermal characteristics Table 8. Thermal characteristics Symbol Parameter Conditions Rth(j-a) thermal resistance from junction to ambient in free air Rth(j-sp) thermal resistance from junction to solder point Min Typ Max Unit - - 625 K/W - - 300 K/W Per device NUP1301U Product data sheet [1][2] [1] Single diode loaded. [2] Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 4 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 7. Characteristics Table 9. Electrical characteristics Tamb = 25 C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit VBR breakdown voltage IR = 100 A VF forward voltage 100 - - V IF = 1 mA - - 715 mV IF = 10 mA - - 855 mV Per diode IF = 50 mA - - 1 V IF = 150 mA - - 1.25 V VR = 25 V - - 30 nA VR = 80 V - - 100 nA VR = 25 V; Tj = 150 C - - 25 A VR = 80 V; Tj = 150 C - - 35 A diode capacitance f = 1 MHz; VR = 0 V - 0.6 0.75 pF clamping voltage IPP = 1 A [2][3] - - 3 V IPP = 11 A [2][3] - - 20 V reverse current IR Cd [1] Per device VCL NUP1301U Product data sheet [1] Pulse test: tp 300 s; 0.02. [2] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5. [3] Measured from pin 3 to pins 1 and 2 (pins 1 and 2 are connected). All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 5 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 006aab132 103 IF (mA) mbg704 102 IFSM (A) 102 10 10 1 (1) (2) (3) (4) 1 10−1 10−1 0 0.2 0.4 0.6 0.8 1.0 1 1.2 1.4 VF (V) 10 102 103 104 tp (μs) (1) Tamb = 150 C Based on square wave currents. (2) Tamb = 85 C Tj = 25 C; prior to surge (3) Tamb = 25 C (4) Tamb = 40 C Fig 3. Forward current as a function of forward voltage; typical values Fig 4. 006aab133 102 IR (μA) 10 (1) 1 (2) Non-repetitive peak forward current as a function of pulse duration; typical values mbg446 0.8 Cd (pF) 0.6 10−1 0.4 (3) 10−2 10−3 0.2 10−4 (4) 10−5 0 0 20 40 60 80 0 100 4 8 VR (V) (1) Tamb = 150 C 12 VR (V) 16 Tamb = 25 C; f = 1 MHz (2) Tamb = 85 C (3) Tamb = 25 C (4) Tamb = 40 C Fig 5. Reverse current as a function of reverse voltage; typical values NUP1301U Product data sheet Fig 6. Diode capacitance as a function of reverse voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 6 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array ESD TESTER acc. to IEC 61000-4-2 CZ = 150 pF; RZ = 330 Ω 4 GHz DIGITAL OSCILLOSCOPE RZ 450 Ω RG 223/U 50 Ω coax 10× ATTENUATOR 50 Ω CZ DUT (DEVICE UNDER TEST) vertical scale = 10 V/div horizontal scale = 15 ns/div vertical scale = 10 A/div horizontal scale = 15 ns/div GND GND clamped +8 kV ESD pulse waveform (IEC 61000-4-2 network), pin 3 to 1 and 2 unclamped +8 kV ESD pulse waveform (IEC 61000-4-2 network) vertical scale = 10 V/div horizontal scale = 15 ns/div vertical scale = 10 A/div horizontal scale = 15 ns/div GND GND clamped −8 kV ESD pulse waveform (IEC 61000-4-2 network), pin 3 to 1 and 2 unclamped −8 kV ESD pulse waveform (IEC 61000-4-2 network) Fig 7. 006aab567 ESD clamping test setup and waveforms NUP1301U Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 7 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 8. Application information Protection of a single (high-speed) data line in rail-to-rail configuration. The protected data line is connected to pin 3. Pin 1 is connected to ground (GND) and pin 2 is connected to the supply rail (supply voltage VCC). When the transient voltage exceeds the forward voltage drop of one diode, the transient is directed either to the supply rail or to GND. The advantages of these solutions are: low line capacitance (0.6 pF typically), fast response time, and low clamping voltage. VCC VCC D1 NUP1301U Audio interface D2 NUP1301U 006aac518 Fig 8. Typical application for the protection of one signal line Circuit board layout and protection device placement: Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT) and surge transients. The following guidelines are recommended: 1. Place the NUP1301U as close to the input terminal or connector as possible. 2. The path length between the NUP1301U and the protected line should be minimized. 3. Keep parallel signal paths to a minimum. 4. Avoid running protected conductors in parallel with unprotected conductors. 5. Minimize all Printed-Circuit Board (PCB) conductive loops including power and ground loops. 6. Minimize the length of the transient return path to ground. 7. Avoid using shared transient return paths to a common ground point. 8. Ground planes should be used whenever possible. For multilayer PCBs, use ground vias. 9. Test information 9.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. NUP1301U Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 8 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 10. Package outline 2.2 1.8 1.1 0.8 0.45 0.15 3 2.2 1.35 2.0 1.15 1 2 0.4 0.3 0.25 0.10 1.3 Dimensions in mm Fig 9. 04-11-04 Package outline SOT323 (SC-70) 11. Packing information Table 10. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number NUP1301U [1] NUP1301U Product data sheet Package SOT323 Description 4 mm pitch, 8 mm tape and reel Packing quantity 3000 10000 -115 -135 For further information and the availability of packing methods, see Section 15. All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 9 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 12. Soldering 2.65 1.85 1.325 solder lands solder resist 2 2.35 0.6 (3×) 3 solder paste 1.3 1 occupied area 0.5 (3×) Dimensions in mm 0.55 (3×) sot323_fr Fig 10. Reflow soldering footprint SOT323 (SC-70) 4.6 2.575 1.425 (3×) solder lands solder resist occupied area 1.8 3.65 2.1 09 (2×) Dimensions in mm preferred transport direction during soldering sot323_fw Fig 11. Wave soldering footprint SOT323 (SC-70) NUP1301U Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 10 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes NUP1301U v.1 20110128 Product data sheet - - NUP1301U Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 11 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 14. Legal information 14.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 14.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. NUP1301U Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 12 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 14.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 15. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] NUP1301U Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 28 January 2011 © NXP B.V. 2011. All rights reserved. 13 of 14 NUP1301U NXP Semiconductors Ultra low capacitance ESD protection array 16. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 10 11 12 13 14 14.1 14.2 14.3 14.4 15 16 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Application information. . . . . . . . . . . . . . . . . . . 8 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 8 Quality information . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Packing information . . . . . . . . . . . . . . . . . . . . . 9 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . 12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Contact information. . . . . . . . . . . . . . . . . . . . . 13 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2011. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 28 January 2011 Document identifier: NUP1301U