PUML1/DG 50 V, 200 mA NPN general-purpose transistor/ 100 mA NPN resistor-equipped transistor Rev. 01 — 14 July 2008 Product data sheet 1. Product profile 1.1 General description NPN general-purpose transistor and NPN Resistor-Equipped Transistor (RET) in one SOT363 (SC-88) very small Surface-Mounted Device (SMD) plastic package. 1.2 Features n General-purpose transistor: u 200 mA collector current IC n Resistor-equipped transistor: u Built-in bias resistors n Simplifies circuit design n Reduces component count n Reduces pick and place costs n Very small SMD plastic package n AEC-Q101 qualified 1.3 Applications n Inverter and switches n Low-frequency amplifier n Driver stages 1.4 Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit open base - - 50 V - - 200 mA VCE = 10 V; IC = 2 mA 210 - 340 open base - - 50 TR1 (general-purpose transistor) VCEO collector-emitter voltage IC collector current hFE DC current gain TR2 (resistor-equipped transistor) VCEO collector-emitter voltage V IO output current - - 100 mA R1 bias resistor 1 (input) 7 10 13 kΩ R2/R1 bias resistor ratio 0.8 1 1.2 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 2. Pinning information Table 2. Pinning Pin Description Simplified outline 1 emitter TR1 2 base TR1 3 output (collector) TR2 4 GND (emitter) TR2 5 input (base) TR2 6 collector TR1 6 5 Graphic symbol 6 4 5 4 R2 R1 TR2 1 2 3 TR1 1 2 3 006aab253 3. Ordering information Table 3. Ordering information Type number PUML1/DG Package Name Description Version SC-88 plastic surface-mounted package; 6 leads SOT363 4. Marking Table 4. Marking codes Type number Marking code[1] PUML1/DG PA* [1] * = -: made in Hong Kong * = p: made in Hong Kong * = t: made in Malaysia * = W: made in China 5. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit TR1 (general-purpose transistor) VCBO collector-base voltage open emitter - 60 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 6 V IC collector current - 200 mA ICM peak collector current single pulse; tp ≤ 1 ms - 200 mA IBM peak base current single pulse; tp ≤ 1 ms - 100 mA PUML1_DG_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 2 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET Table 5. Limiting values …continued In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Ptot Parameter Conditions total power dissipation Tamb ≤ 25 °C [1] Min Max Unit - 200 mW TR2 (resistor-equipped transistor) VCBO collector-base voltage open emitter - 50 V VCEO collector-emitter voltage open base - 50 V VEBO emitter-base voltage open collector - 10 V VI input voltage positive - +40 V negative - −10 V IO output current - 100 mA ICM peak collector current single pulse; tp ≤ 1 ms - 100 mA Ptot total power dissipation Tamb ≤ 25 °C [1] - 200 mW Ptot total power dissipation Tamb ≤ 25 °C [1] - 300 mW Tj junction temperature - 150 °C Tamb ambient temperature −55 +150 °C Tstg storage temperature −65 +150 °C Per device [1] Device mounted on an FR4 Printed-Circuit Board (PCB), single-sided copper, tin-plated and standard footprint. 006aab254 300 Ptot (mW) 200 100 0 −75 −25 25 75 125 175 Tamb (°C) FR4 PCB, standard footprint Fig 1. Per transistor: Power derating curve PUML1_DG_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 3 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 6. Thermal characteristics Table 6. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Per transistor Rth(j-a) thermal resistance from junction in free air to ambient [1] - - 625 K/W thermal resistance from junction in free air to ambient [1] - - 417 K/W Per device Rth(j-a) [1] 103 Device mounted on an FR4 PCB, single-sided copper, tin-plated and standard footprint. 006aab255 duty cycle = 1 Zth(j-a) (K/W) 0.5 102 0.2 0.75 0.33 0.1 0.05 0.02 10 0.01 0 1 10−5 10−4 10−3 10−2 10−1 1 10 102 103 tp (s) FR4 PCB, standard footprint Fig 2. Per transistor: Transient thermal impedance from junction to ambient as a function of pulse duration PUML1_DG_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 4 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 7. Characteristics Table 7. Characteristics Tamb = 25 °C unless otherwise specified. Symbol Parameter Conditions Min Typ Max Unit TR1 (general-purpose transistor) ICBO collector-base cut-off current VCB = 60 V; IE = 0 A - - 10 nA VCB = 60 V; IE = 0 A; Tj = 150 °C - - 5 µA nA IEBO emitter-base cut-off current VEB = 5 V; IC = 0 A - - 10 hFE DC current gain VCE = 2 V; IC = 100 mA 90 - - VCE = 10 V; IC = 2 mA 210 - 340 VCEsat collector-emitter saturation voltage IC = 100 mA; IB = 10 mA - - 250 mV fT transition frequency VCE = 10 V; IC = 2 mA; f = 100 MHz 100 - - MHz VCE = 6 V; IC = 10 mA; f = 100 MHz - 230 - MHz VCB = 10 V; IE = ie = 0 A; f = 1 MHz - - 3 pF Cc collector capacitance TR2 (resistor-equipped transistor) ICBO collector-base cut-off current VCB = 50 V; IE = 0 A - - 100 nA ICEO collector-emitter cut-off current VCE = 30 V; IB = 0 A - - 1 µA VCE = 30 V; IB = 0 A; Tj = 150 °C - - 50 µA µA IEBO emitter-base cut-off current VEB = 5 V; IC = 0 A - - 400 hFE DC current gain VCE = 5 V; IC = 5 mA 30 - - VCEsat collector-emitter saturation voltage IC = 10 mA; IB = 0.5 mA - - 150 mV VI(off) off-state input voltage VCE = 5 V; IC = 100 µA - 1.1 0.8 V VI(on) on-state input voltage VCE = 0.3 V; IC = 10 mA 2.5 1.8 - V R1 bias resistor 1 (input) 7 10 13 kΩ R2/R1 bias resistor ratio 0.8 1 1.2 Cc collector capacitance - - 2.5 VCB = 10 V; IE = ie = 0 A; f = 1 MHz PUML1_DG_1 Product data sheet pF © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 5 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 006aab256 500 006aaa993 0.1 hFE IB (mA) = 0.56 IC (A) (1) 400 0.50 0.44 0.08 0.38 0.32 300 0.26 0.06 (2) 0.20 200 0.04 0.14 (3) 100 0.08 0.02 0.02 0 10−1 1 10 102 0 103 0 2 4 6 8 IC (mA) 10 VCE (V) Tamb = 25 °C VCE = 10 V (1) Tamb = 150 °C (2) Tamb = 25 °C (3) Tamb = −55 °C Fig 3. TR1: DC current gain as a function of collector current; typical values Fig 4. 006aab257 1.3 TR1: Collector current as a function of collector-emitter voltage; typical values 006aab258 1 VBEsat (V) VCEsat (V) (1) 0.9 (2) 10−1 (3) (1) 0.5 (2) (3) 0.1 10−1 1 10 102 103 10−2 10−1 1 IC (mA) IC/IB = 10 IC/IB = 10 (1) Tamb = 150 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 150 °C (3) Tamb = −55 °C TR1: Base-emitter saturation voltage as a function of collector current; typical values Fig 6. 103 TR1: Collector-emitter saturation voltage as a function of collector current; typical values PUML1_DG_1 Product data sheet 102 IC (mA) (1) Tamb = −55 °C Fig 5. 10 © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 6 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 006aaa034 103 (1) (2) (3) hFE 006aaa035 1 VCEsat (V) 102 (1) (2) (3) 10−1 10 1 10−1 1 102 10 10−2 1 IC (mA) VCE = 5 V IC/IB = 20 (1) Tamb = 150 °C (1) Tamb = 100 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = −40 °C (3) Tamb = −40 °C Fig 7. TR2: DC current gain as a function of collector current; typical values 006aaa036 10 102 10 IC (mA) Fig 8. TR2: Collector-emitter saturation voltage as a function of collector current; typical values 006aaa037 10 VI(off) (V) VI(on) (V) (1) (2) (1) (3) 1 (2) 1 (3) 10−1 10−1 1 102 10 10−1 10−2 10−1 IC (mA) VCE = 0.3 V VCE = 5 V (1) Tamb = −40 °C (2) Tamb = 25 °C (2) Tamb = 25 °C (3) Tamb = 100 °C (3) Tamb = 100 °C TR2: On-state input voltage as a function of collector current; typical values Fig 10. TR2: Off-state input voltage as a function of collector current; typical values PUML1_DG_1 Product data sheet 10 IC (mA) (1) Tamb = −40 °C Fig 9. 1 © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 7 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 8. Test information 8.1 Quality information This product has been qualified in accordance with the Automotive Electronics Council (AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is suitable for use in automotive applications. 9. Package outline 2.2 1.8 6 2.2 1.35 2.0 1.15 1.1 0.8 5 4 2 3 0.45 0.15 pin 1 index 1 0.3 0.2 0.65 0.25 0.10 1.3 Dimensions in mm 06-03-16 Fig 11. Package outline SOT363 (SC-88) 10. Packing information Table 8. Packing methods The indicated -xxx are the last three digits of the 12NC ordering code.[1] Type number PUML1/DG Package Description SOT363 3000 10000 4 mm pitch, 8 mm tape and reel; T1 [2] -115 -135 4 mm pitch, 8 mm tape and reel; T2 [3] -125 -165 [1] For further information and the availability of packing methods, see Section 14. [2] T1: normal taping [3] T2: reverse taping PUML1_DG_1 Product data sheet Packing quantity © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 8 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 11. Soldering 2.65 solder lands 2.35 1.5 0.4 (2×) 0.6 0.5 (4×) (4×) solder resist solder paste 0.5 (4×) 0.6 (2×) occupied area 0.6 (4×) Dimensions in mm 1.8 sot363_fr Fig 12. Reflow soldering footprint SOT363 (SC-88) 1.5 solder lands 0.3 2.5 4.5 solder resist occupied area 1.5 Dimensions in mm 1.3 1.3 preferred transport direction during soldering 2.45 5.3 sot363_fw Fig 13. Wave soldering footprint SOT363 (SC-88) PUML1_DG_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 9 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 12. Revision history Table 9. Revision history Document ID Release date Data sheet status Change notice Supersedes PUML1_DG_1 20080714 Product data sheet - - PUML1_DG_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 10 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 13. Legal information 13.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 13.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 13.3 Disclaimers General — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) may cause permanent damage to the device. Limiting values are stress ratings only and operation of the device at these or any other conditions above those given in the Characteristics sections of this document is not implied. Exposure to limiting values for extended periods may affect device reliability. Terms and conditions of sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, including those pertaining to warranty, intellectual property rights infringement and limitation of liability, unless explicitly otherwise agreed to in writing by NXP Semiconductors. In case of any inconsistency or conflict between information in this document and such terms and conditions, the latter will prevail. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 13.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 14. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PUML1_DG_1 Product data sheet © NXP B.V. 2008. All rights reserved. Rev. 01 — 14 July 2008 11 of 12 PUML1/DG NXP Semiconductors 50 V, 200 mA NPN general-purpose transistor/100 mA NPN RET 15. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 8.1 9 10 11 12 13 13.1 13.2 13.3 13.4 14 15 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General description. . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data. . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Test information . . . . . . . . . . . . . . . . . . . . . . . . . 8 Quality information . . . . . . . . . . . . . . . . . . . . . . 8 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Packing information. . . . . . . . . . . . . . . . . . . . . . 8 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Contact information. . . . . . . . . . . . . . . . . . . . . 11 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2008. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 14 July 2008 Document identifier: PUML1_DG_1