PSMN9R5-100PS N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 Rev. 02 — 23 February 2010 Product data sheet 1. Product profile 1.1 General description Standard level N-channel MOSFET in a TO220 packages qualified to 175C. This product is designed and qualified for use in a wide range of industrial, communications and domestic equipment. 1.2 Features and benefits High efficiency due to low switching and conduction losses Suitable for standard level gate drive 1.3 Applications DC-to-DC converters Motor control Load switching Server power supplies 1.4 Quick reference data Table 1. Quick reference Symbol Parameter Conditions Min Typ Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - - 100 V ID drain current Tmb = 25 °C; VGS = 10 V; see Figure 1 - - 89 A Ptot total power dissipation Tmb = 25 °C; see Figure 2 - - 211 W VGS = 10 V; ID = 60 A; VDS = 50 V; see Figure 14 and 15 - 23 - nC - 82 - nC - 8.16 9.6 mΩ Dynamic characteristics QGD gate-drain charge QG(tot) total gate charge Static characteristics RDSon drain-source on-state resistance VGS = 10 V; ID = 15 A; Tj = 25 °C; see Figure 13 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 2. Pinning information Table 2. Pinning information Pin Symbol Description 1 G gate 2 D drain Simplified outline Graphic symbol D mb 3 S source mb D mounting base; connected to drain G S mbb076 1 2 3 SOT78 (TO-220AB) 3. Ordering information Table 3. Ordering information Type number Package Name PSMN9R5-100PS TO-220AB Description Version plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead SOT78 TO-220AB 4. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VDS drain-source voltage Tj ≥ 25 °C; Tj ≤ 175 °C - 100 V VDGR drain-gate voltage Tj ≤ 175 °C; Tj ≥ 25 °C; RGS = 20 kΩ - 100 V VGS gate-source voltage ID drain current -20 20 V VGS = 10 V; Tmb = 100 °C; see Figure 1 - 63 A VGS = 10 V; Tmb = 25 °C; see Figure 1 - 89 A - 355 A IDM peak drain current tp ≤ 10 µs; pulsed; Tmb = 25 °C; see Figure 3 Ptot total power dissipation Tmb = 25 °C; see Figure 2 - 211 W Tstg storage temperature -55 175 °C Tj junction temperature -55 175 °C Tsld(M) peak soldering temperature - 260 °C Source-drain diode IS source current Tmb = 25 °C - 89 A ISM peak source current tp ≤ 10 µs; pulsed; Tmb = 25 °C - 355 A - 177 mJ Avalanche ruggedness EDS(AL)S non-repetitive drain-source VGS = 10 V; Tj(init) = 25 °C; ID = 89 A; avalanche energy Vsup ≤ 100 V; unclamped; RGS = 50 Ω PSMN9R5-100PS_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 2 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 003aae016 100 ID (A) 03aa16 120 Pder (%) 80 80 60 40 40 20 0 0 0 Fig 1. 50 100 150 200 Tmb (°C) Continuous drain current as a function of mounting base temperature 0 50 100 150 200 Tmb (°C) Fig 2. Normalized total power dissipation as a function of mounting base temperature 003aae017 103 ID (A) Limit RDSon = VDS / ID 102 tp = 10 μs 100 μs 10 DC 1 1 ms 10 ms 100 ms 10−1 1 Fig 3. 102 10 103 VDS (V) Safe operating area; continuous and peak drain currents as a function of drain-source voltage PSMN9R5-100PS_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 3 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 5. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Rth(j-mb) thermal resistance from junction to mounting see Figure 4 base Min Typ Max Unit - 0.38 0.71 K/W 003aad142 1 Zth(j-mb) δ = 0.5 (K/W) 10−1 0.2 0.1 0.05 0.02 10−2 single shot δ= P tp T 10−3 t tp 10−4 10−6 Fig 4. T 10−5 10−4 10−3 10−2 10−1 1 tp (s) 10 Transient thermal impedance from junction to mounting base as a function of pulse duration PSMN9R5-100PS_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 4 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 6. Characteristics Table 6. Symbol Characteristics Parameter Conditions Min Typ Max Unit Static characteristics V(BR)DSS drain-source breakdown voltage ID = 0.25 mA; VGS = 0 V; Tj = -55 °C 90 - - V ID = 0.25 mA; VGS = 0 V; Tj = 25 °C 100 - - V VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Tj = 175 °C; see Figure 10 and 11 1 - - V ID = 1 mA; VDS = VGS; Tj = 25 °C; see Figure 10 and 11 2 3 4 V ID = 1 mA; VDS = VGS; Tj = -55 °C; see Figure 10 and 11 - - 4.8 V IDSS drain leakage current VDS = 100 V; VGS = 0 V; Tj = 125 °C - - 100 µA VDS = 100 V; VGS = 0 V; Tj = 25 °C - 0.02 4 µA IGSS gate leakage current VGS = 20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = -20 V; VDS = 0 V; Tj = 25 °C - 10 100 nA VGS = 10 V; ID = 15 A; Tj = 100 °C; see Figure 12 - - 17.3 mΩ VGS = 10 V; ID = 15 A; Tj = 175 °C; see Figure 12 - 23.5 27.4 mΩ VGS = 10 V; ID = 15 A; Tj = 25 °C; see Figure 13 - 8.16 9.6 mΩ - 0.7 - Ω 67 - nC RDSon RG drain-source on-state resistance internal gate resistance f = 1 MHz (AC) Dynamic characteristics QG(tot) total gate charge ID = 0 A; VDS = 0 V; VGS = 10 V; see Figure 14 - 82 - nC gate-source charge ID = 60 A; VDS = 50 V; VGS = 10 V; see Figure 14 and 15 - QGS - 21 - nC QGS(th) pre-threshold gate-source charge ID = 60 A; VDS = 50 V; VGS = 3 V; see Figure 14 - 13.1 - nC QGS(th-pl) post-threshold gate-source charge ID = 60 A; VDS = 50 V; VGS = 10 V; see Figure 14 - 7.8 - nC QGD gate-drain charge ID = 60 A; VDS = 50 V; VGS = 10 V; see Figure 14 and 15 - 23 - nC VGS(pl) gate-source plateau voltage VDS = 50 V; see Figure 14 and 15 - 4.5 - V Ciss input capacitance - 4454 - pF Coss output capacitance VDS = 50 V; VGS = 0 V; f = 1 MHz; Tj = 25 °C; see Figure 16 - 302 - pF Crss reverse transfer capacitance - 185 - pF td(on) turn-on delay time - 22 - ns tr rise time - 25.2 - ns td(off) turn-off delay time - 52.2 - ns tf fall time - 22.8 - ns PSMN9R5-100PS_2 Product data sheet VDS = 50 V; RL = 0.8 Ω; VGS = 10 V; RG(ext) = 4.7 Ω; Tj = 25 °C All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 5 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 Table 6. Characteristics …continued Symbol Parameter Conditions Min Typ Max Unit Source-drain diode VSD source-drain voltage IS = 15 A; VGS = 0 V; Tj = 25 °C; see Figure 17 - 0.85 1.2 V trr reverse recovery time - 61.5 - ns Qr recovered charge IS = 20 A; dIS/dt = 100 A/µs; VGS = 0 V; VDS = 50 V - 157 - nC 003aae025 30 RDSon (mΩ) 003aae022 8000 C (pF) Ciss 24 6000 18 4000 Crss 12 2000 6 0 4 Fig 5. 8 12 16 VGS (V) 20 Drain-source on-state resistance as a function of gate-source voltage; typical values. 003aae021 150 0 Fig 6. 3 9 VGS (V) 12 Input and reverse transfer capacitances as a function of gate-source voltage; typical values 003aae019 100 5 10 5.5 ID (A) gfs (S) 6 75 4.8 100 4.7 50 4.5 50 25 4.3 VGS (V) = 4 0 0 0 Fig 7. 20 40 60 I D (A) 80 Forward transconductance as a function of drain current; typical values PSMN9R5-100PS_2 Product data sheet 0 Fig 8. 0.5 1 1.5 VDS (V) 2 Output characteristics: drain current as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 6 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 003aae020 80 03aa35 10−1 ID (A) ID (A) min 10−2 typ max 60 10−3 40 10−4 20 Tj = 175 °C 10−5 Tj = 25 °C 10−6 0 0 Fig 9. 2 4 VGS (V) 6 0 4 6 VGS (V) Transfer characteristics: drain current as a function of gate-source voltage; typical valuesvalues Fig 10. Sub-threshold drain current as a function of gate-source voltage 003aad280 5 2 VGS(th) (V) 003aad774 3.2 a 4 max 3 2.4 typ 1.6 2 min 0.8 1 0 −60 0 60 120 180 Fig 11. Gate-source threshold voltage as a function of junction temperature PSMN9R5-100PS_2 Product data sheet 0 -60 Tj (°C) 0 60 120 Tj (°C) 180 Fig 12. Normalized drain-source on-state resistance factor as a function of junction temperature All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 7 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 003aae024 40 VGS (V) = 4.5 RDSon (mΩ) 4.7 VDS 4.8 ID 30 VGS(pl) VGS(th) 5 20 VGS QGS1 10 5.5 10 QGS2 QGS QGD QG(tot) 003aaa508 0 0 25 50 75 100 I D (A) Fig 13. Drain-source on-state resistance as a function of drain current; typical values 003aae026 10 VGS (V) Fig 14. Gate charge waveform definitions C (pF) 8 003aae023 104 Ciss Coss VDS = 20 V 50 V Crss 6 103 4 2 0 0 25 50 75 QG (nC) 100 Fig 15. Gate-source voltage as a function of gate charge; typical values PSMN9R5-100PS_2 Product data sheet 102 10−2 10−1 1 102 10 VDS (V) Fig 16. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 8 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 003aae027 100 IS (A) 75 50 25 Tj = 175 °C Tj = 25 °C 0 0 0.3 0.6 0.9 VSD (V) 1.2 Fig 17. Source current as a function of source-drain voltage; typical values PSMN9R5-100PS_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 9 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 7. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 E A A1 p q mounting base D1 D L1(1) L2(1) Q L b1(2) (3×) b2(2) (2×) 1 2 3 b(3×) c e e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1(2) b2(2) c D D1 E e L L1(1) L2(1) max. p q Q mm 4.7 4.1 1.40 1.25 0.9 0.6 1.6 1.0 1.3 1.0 0.7 0.4 16.0 15.2 6.6 5.9 10.3 9.7 2.54 15.0 12.8 3.30 2.79 3.0 3.8 3.5 3.0 2.7 2.6 2.2 Notes 1. Lead shoulder designs may vary. 2. Dimension includes excess dambar. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 08-04-23 08-06-13 Fig 18. Package outline SOT78 (TO-220AB) PSMN9R5-100PS_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 10 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 8. Revision history Table 7. Revision history Document ID Release date Data sheet status Change notice Supersedes PSMN9R5-100PS_2 20100223 Product data sheet - PSMN9R5-100PS_1 - - Modifications: PSMN9R5-100PS_1 PSMN9R5-100PS_2 Product data sheet • Various changes to content. 20100122 Objective data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 11 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 9. Legal information 9.1 Data sheet status Document status [1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term 'short data sheet' is explained in section "Definitions". [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 9.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on a weakness or default in the customer application/use or the application/use of customer’s third party customer(s) (hereinafter both referred to as “Application”). It is customer’s sole responsibility to check whether the NXP Semiconductors product is suitable and fit for the Application planned. Customer has to do all necessary testing for the Application in order to avoid a default of the Application and the product. NXP Semiconductors does not accept any liability in this respect. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. 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This document supersedes and replaces all information supplied prior to the publication hereof. PSMN9R5-100PS_2 Product data sheet Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 12 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. 9.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. TrenchMOS — is a trademark of NXP B.V. 10. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] PSMN9R5-100PS_2 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 02 — 23 February 2010 © NXP B.V. 2010. All rights reserved. 13 of 14 PSMN9R5-100PS NXP Semiconductors N-channel 100 V 9.6 mΩ standard level MOSFET in T0220 11. Contents 1 1.1 1.2 1.3 1.4 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 10 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1 General description . . . . . . . . . . . . . . . . . . . . . .1 Features and benefits . . . . . . . . . . . . . . . . . . . . .1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1 Quick reference data . . . . . . . . . . . . . . . . . . . . .1 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2 Ordering information . . . . . . . . . . . . . . . . . . . . . .2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .2 Thermal characteristics . . . . . . . . . . . . . . . . . . .4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . .10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . 11 Legal information. . . . . . . . . . . . . . . . . . . . . . . .12 Data sheet status . . . . . . . . . . . . . . . . . . . . . . .12 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Contact information. . . . . . . . . . . . . . . . . . . . . .13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2010. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 23 February 2010 Document identifier: PSMN9R5-100PS_2